2 * Copyright (C) 2008-2009 ST-Ericsson SA
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
11 #include <linux/types.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/amba/bus.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/platform_device.h>
19 #include <linux/mfd/abx500/ab8500.h>
20 #include <linux/platform_data/usb-musb-ux500.h>
21 #include <linux/random.h>
24 #include <asm/mach/map.h>
25 #include <plat/gpio-nomadik.h>
26 #include <mach/hardware.h>
27 #include <mach/setup.h>
28 #include <mach/devices.h>
29 #include <mach/db8500-regs.h>
31 #include "devices-db8500.h"
32 #include "ste-dma40-db8500.h"
34 /* minimum static i/o mapping required to boot U8500 platforms */
35 static struct map_desc u8500_uart_io_desc[] __initdata = {
36 __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
37 __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
39 /* U8500 and U9540 common io_desc */
40 static struct map_desc u8500_common_io_desc[] __initdata = {
41 /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
42 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
43 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
44 __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
45 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
46 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
48 __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
49 __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
50 __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
51 __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
52 __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
54 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
55 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
56 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
57 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
60 /* U8500 IO map specific description */
61 static struct map_desc u8500_io_desc[] __initdata = {
62 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
63 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
67 /* U9540 IO map specific description */
68 static struct map_desc u9540_io_desc[] __initdata = {
69 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
70 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
73 void __init u8500_map_io(void)
76 * Map the UARTs early so that the DEBUG_LL stuff continues to work.
78 iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
82 iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
84 if (cpu_is_ux540_family())
85 iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
87 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
89 _PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
92 static struct resource db8500_pmu_resources[] = {
94 .start = IRQ_DB8500_PMU,
95 .end = IRQ_DB8500_PMU,
96 .flags = IORESOURCE_IRQ,
101 * The PMU IRQ lines of two cores are wired together into a single interrupt.
102 * Bounce the interrupt to the other core if it's not ours.
104 static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
106 irqreturn_t ret = handler(irq, dev);
107 int other = !smp_processor_id();
109 if (ret == IRQ_NONE && cpu_online(other))
110 irq_set_affinity(irq, cpumask_of(other));
113 * We should be able to get away with the amount of IRQ_NONEs we give,
114 * while still having the spurious IRQ detection code kick in if the
115 * interrupt really starts hitting spuriously.
120 struct arm_pmu_platdata db8500_pmu_platdata = {
121 .handle_irq = db8500_pmu_handler,
124 static struct platform_device db8500_pmu_device = {
127 .num_resources = ARRAY_SIZE(db8500_pmu_resources),
128 .resource = db8500_pmu_resources,
129 .dev.platform_data = &db8500_pmu_platdata,
132 static struct platform_device db8500_prcmu_device = {
133 .name = "db8500-prcmu",
136 static struct platform_device *platform_devs[] __initdata = {
139 &db8500_prcmu_device,
142 static resource_size_t __initdata db8500_gpio_base[] = {
143 U8500_GPIOBANK0_BASE,
144 U8500_GPIOBANK1_BASE,
145 U8500_GPIOBANK2_BASE,
146 U8500_GPIOBANK3_BASE,
147 U8500_GPIOBANK4_BASE,
148 U8500_GPIOBANK5_BASE,
149 U8500_GPIOBANK6_BASE,
150 U8500_GPIOBANK7_BASE,
151 U8500_GPIOBANK8_BASE,
154 static void __init db8500_add_gpios(struct device *parent)
156 struct nmk_gpio_platform_data pdata = {
157 .supports_sleepmode = true,
160 dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
161 IRQ_DB8500_GPIO0, &pdata);
162 dbx500_add_pinctrl(parent, "pinctrl-db8500");
165 static int usb_db8500_rx_dma_cfg[] = {
166 DB8500_DMA_DEV38_USB_OTG_IEP_1_9,
167 DB8500_DMA_DEV37_USB_OTG_IEP_2_10,
168 DB8500_DMA_DEV36_USB_OTG_IEP_3_11,
169 DB8500_DMA_DEV19_USB_OTG_IEP_4_12,
170 DB8500_DMA_DEV18_USB_OTG_IEP_5_13,
171 DB8500_DMA_DEV17_USB_OTG_IEP_6_14,
172 DB8500_DMA_DEV16_USB_OTG_IEP_7_15,
173 DB8500_DMA_DEV39_USB_OTG_IEP_8
176 static int usb_db8500_tx_dma_cfg[] = {
177 DB8500_DMA_DEV38_USB_OTG_OEP_1_9,
178 DB8500_DMA_DEV37_USB_OTG_OEP_2_10,
179 DB8500_DMA_DEV36_USB_OTG_OEP_3_11,
180 DB8500_DMA_DEV19_USB_OTG_OEP_4_12,
181 DB8500_DMA_DEV18_USB_OTG_OEP_5_13,
182 DB8500_DMA_DEV17_USB_OTG_OEP_6_14,
183 DB8500_DMA_DEV16_USB_OTG_OEP_7_15,
184 DB8500_DMA_DEV39_USB_OTG_OEP_8
187 static const char *db8500_read_soc_id(void)
189 void __iomem *uid = __io_address(U8500_BB_UID_BASE);
191 /* Throw these device-specific numbers into the entropy pool */
192 add_device_randomness(uid, 0x14);
193 return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
195 readl((u32 *)uid+1), readl((u32 *)uid+2),
196 readl((u32 *)uid+3), readl((u32 *)uid+4));
199 static struct device * __init db8500_soc_device_init(void)
201 const char *soc_id = db8500_read_soc_id();
203 return ux500_soc_device_init(soc_id);
207 * This function is called from the board init
209 struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
211 struct device *parent;
214 parent = db8500_soc_device_init();
216 db8500_add_rtc(parent);
217 db8500_add_gpios(parent);
218 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
220 platform_device_register_data(parent,
221 "cpufreq-u8500", -1, NULL, 0);
223 for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
224 platform_devs[i]->dev.parent = parent;
226 db8500_prcmu_device.dev.platform_data = ab8500;
228 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
233 /* TODO: Once all pieces are DT:ed, remove completely. */
234 struct device * __init u8500_of_init_devices(void)
236 struct device *parent;
238 parent = db8500_soc_device_init();
240 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
242 platform_device_register_data(parent,
243 "cpufreq-u8500", -1, NULL, 0);
245 u8500_dma40_device.dev.parent = parent;
248 * Devices to be DT:ed:
249 * u8500_dma40_device = todo
250 * db8500_pmu_device = done
251 * db8500_prcmu_device = done
253 platform_device_register(&u8500_dma40_device);