2 * Copyright (C) 2008-2009 ST-Ericsson
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
11 #include <linux/types.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/amba/bus.h>
15 #include <linux/irq.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
20 #include <asm/mach/map.h>
21 #include <mach/hardware.h>
22 #include <mach/setup.h>
23 #include <mach/devices.h>
25 #include "devices-db8500.h"
27 static struct platform_device *platform_devs[] __initdata = {
31 /* minimum static i/o mapping required to boot U8500 platforms */
32 static struct map_desc u8500_io_desc[] __initdata = {
33 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
34 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
35 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
36 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
37 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
38 __MEM_DEV_DESC(U8500_BOOT_ROM_BASE, SZ_1M),
41 static struct map_desc u8500_ed_io_desc[] __initdata = {
42 __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
43 __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K),
46 static struct map_desc u8500_v1_io_desc[] __initdata = {
47 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
48 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE_V1, SZ_4K),
51 static struct map_desc u8500_v2_io_desc[] __initdata = {
52 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
56 * Functions to differentiate between later ASICs
57 * We look into the end of the ROM to locate the hardcoded ASIC ID.
58 * This is only needed to differentiate between minor revisions and
59 * process variants of an ASIC, the major revisions are encoded in
62 #define U8500_ASIC_ID_LOC_ED_V1 (U8500_BOOT_ROM_BASE + 0x1FFF4)
63 #define U8500_ASIC_ID_LOC_V2 (U8500_BOOT_ROM_BASE + 0x1DBF4)
64 #define U8500_ASIC_REV_ED 0x01
65 #define U8500_ASIC_REV_V10 0xA0
66 #define U8500_ASIC_REV_V11 0xA1
67 #define U8500_ASIC_REV_V20 0xB0
70 * struct db8500_asic_id - fields of the ASIC ID
71 * @process: the manufacturing process, 0x40 is 40 nm
73 * @partnumber: hithereto 0x8500 for DB8500
74 * @revision: version code in the series
75 * This field definion is not formally defined but makes
78 struct db8500_asic_id {
84 /* This isn't going to change at runtime */
85 static struct db8500_asic_id db8500_id;
87 static void __init get_db8500_asic_id(void)
91 if (cpu_is_u8500v1() || cpu_is_u8500ed())
92 asicid = readl(__io_address(U8500_ASIC_ID_LOC_ED_V1));
93 else if (cpu_is_u8500v2())
94 asicid = readl(__io_address(U8500_ASIC_ID_LOC_V2));
98 db8500_id.process = (asicid >> 24);
99 db8500_id.partnumber = (asicid >> 16) & 0xFFFFU;
100 db8500_id.revision = asicid & 0xFFU;
103 bool cpu_is_u8500v10(void)
105 return (db8500_id.revision == U8500_ASIC_REV_V10);
108 bool cpu_is_u8500v11(void)
110 return (db8500_id.revision == U8500_ASIC_REV_V11);
113 bool cpu_is_u8500v20(void)
115 return (db8500_id.revision == U8500_ASIC_REV_V20);
118 void __init u8500_map_io(void)
122 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
124 if (cpu_is_u8500ed())
125 iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc));
126 else if (cpu_is_u8500v1())
127 iotable_init(u8500_v1_io_desc, ARRAY_SIZE(u8500_v1_io_desc));
128 else if (cpu_is_u8500v2())
129 iotable_init(u8500_v2_io_desc, ARRAY_SIZE(u8500_v2_io_desc));
131 /* Read out the ASIC ID as early as we can */
132 get_db8500_asic_id();
135 static resource_size_t __initdata db8500_gpio_base[] = {
136 U8500_GPIOBANK0_BASE,
137 U8500_GPIOBANK1_BASE,
138 U8500_GPIOBANK2_BASE,
139 U8500_GPIOBANK3_BASE,
140 U8500_GPIOBANK4_BASE,
141 U8500_GPIOBANK5_BASE,
142 U8500_GPIOBANK6_BASE,
143 U8500_GPIOBANK7_BASE,
144 U8500_GPIOBANK8_BASE,
147 static void __init db8500_add_gpios(void)
149 struct nmk_gpio_platform_data pdata = {
150 /* No custom data yet */
153 dbx500_add_gpios(ARRAY_AND_SIZE(db8500_gpio_base),
154 IRQ_DB8500_GPIO0, &pdata);
158 * This function is called from the board init
160 void __init u8500_init_devices(void)
162 /* Display some ASIC boilerplate */
163 pr_info("DB8500: process: %02x, revision ID: 0x%02x\n",
164 db8500_id.process, db8500_id.revision);
165 if (cpu_is_u8500ed())
166 pr_info("DB8500: Early Drop (ED)\n");
167 else if (cpu_is_u8500v10())
168 pr_info("DB8500: version 1.0\n");
169 else if (cpu_is_u8500v11())
170 pr_info("DB8500: version 1.1\n");
171 else if (cpu_is_u8500v20())
172 pr_info("DB8500: version 2.0\n");
174 pr_warning("ASIC: UNKNOWN SILICON VERSION!\n");
176 if (cpu_is_u8500ed())
177 dma40_u8500ed_fixup();
182 platform_device_register_simple("cpufreq-u8500", -1, NULL, 0);
183 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));