arch/arm/mach-vexpress/v2m.c

   1 /*
   2  * Versatile Express V2M Motherboard Support
   3  */
   4 #include <linux/device.h>
   5 #include <linux/amba/bus.h>
   6 #include <linux/amba/mmci.h>
   7 #include <linux/io.h>
   8 #include <linux/smp.h>
   9 #include <linux/init.h>
  10 #include <linux/of_address.h>
  11 #include <linux/of_fdt.h>
  12 #include <linux/of_irq.h>
  13 #include <linux/of_platform.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/ata_platform.h>
  16 #include <linux/smsc911x.h>
  17 #include <linux/spinlock.h>
  18 #include <linux/usb/isp1760.h>
  19 #include <linux/clkdev.h>
  20 #include <linux/clk-provider.h>
  21 #include <linux/mtd/physmap.h>
  22 #include <linux/regulator/fixed.h>
  23 #include <linux/regulator/machine.h>
  24
  25 #include <asm/arch_timer.h>
  26 #include <asm/mach-types.h>
  27 #include <asm/sizes.h>
  28 #include <asm/smp_twd.h>
  29 #include <asm/mach/arch.h>
  30 #include <asm/mach/map.h>
  31 #include <asm/mach/time.h>
  32 #include <asm/hardware/arm_timer.h>
  33 #include <asm/hardware/cache-l2x0.h>
  34 #include <asm/hardware/gic.h>
  35 #include <asm/hardware/timer-sp.h>
  36 #include <asm/hardware/sp810.h>
  37
  38 #include <mach/ct-ca9x4.h>
  39 #include <mach/motherboard.h>
  40
  41 #include <plat/sched_clock.h>
  42 #include <plat/platsmp.h>
  43
  44 #include "core.h"
  45
  46 #define V2M_PA_CS0      0x40000000
  47 #define V2M_PA_CS1      0x44000000
  48 #define V2M_PA_CS2      0x48000000
  49 #define V2M_PA_CS3      0x4c000000
  50 #define V2M_PA_CS7      0x10000000
  51
  52 static struct map_desc v2m_io_desc[] __initdata = {
  53         {
  54                 .virtual        = V2M_PERIPH,
  55                 .pfn            = __phys_to_pfn(V2M_PA_CS7),
  56                 .length         = SZ_128K,
  57                 .type           = MT_DEVICE,
  58         },
  59 };
  60
  61 static void __iomem *v2m_sysreg_base;
  62
  63 static void __init v2m_sysctl_init(void __iomem *base)
  64 {
  65         u32 scctrl;
  66
  67         if (WARN_ON(!base))
  68                 return;
  69
  70         /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
  71         scctrl = readl(base + SCCTRL);
  72         scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
  73         scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
  74         writel(scctrl, base + SCCTRL);
  75 }
  76
  77 static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
  78 {
  79         if (WARN_ON(!base || irq == NO_IRQ))
  80                 return;
  81
  82         writel(0, base + TIMER_1_BASE + TIMER_CTRL);
  83         writel(0, base + TIMER_2_BASE + TIMER_CTRL);
  84
  85         sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1");
  86         sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0");
  87 }
  88
  89
  90 static DEFINE_SPINLOCK(v2m_cfg_lock);
  91
  92 int v2m_cfg_write(u32 devfn, u32 data)
  93 {
  94         /* Configuration interface broken? */
  95         u32 val;
  96
  97         printk("%s: writing %08x to %08x\n", __func__, data, devfn);
  98
  99         devfn |= SYS_CFG_START | SYS_CFG_WRITE;
 100
 101         spin_lock(&v2m_cfg_lock);
 102         val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 103         writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 104
 105         writel(data, v2m_sysreg_base +  V2M_SYS_CFGDATA);
 106         writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 107
 108         do {
 109                 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 110         } while (val == 0);
 111         spin_unlock(&v2m_cfg_lock);
 112
 113         return !!(val & SYS_CFG_ERR);
 114 }
 115
 116 int v2m_cfg_read(u32 devfn, u32 *data)
 117 {
 118         u32 val;
 119
 120         devfn |= SYS_CFG_START;
 121
 122         spin_lock(&v2m_cfg_lock);
 123         writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 124         writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 125
 126         mb();
 127
 128         do {
 129                 cpu_relax();
 130                 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 131         } while (val == 0);
 132
 133         *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA);
 134         spin_unlock(&v2m_cfg_lock);
 135
 136         return !!(val & SYS_CFG_ERR);
 137 }
 138
 139 void __init v2m_flags_set(u32 data)
 140 {
 141         writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR);
 142         writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET);
 143 }
 144
 145 int v2m_get_master_site(void)
 146 {
 147         u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC);
 148
 149         return misc & SYS_MISC_MASTERSITE ? SYS_CFG_SITE_DB2 : SYS_CFG_SITE_DB1;
 150 }
 151
 152
 153 static struct resource v2m_pcie_i2c_resource = {
 154         .start  = V2M_SERIAL_BUS_PCI,
 155         .end    = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
 156         .flags  = IORESOURCE_MEM,
 157 };
 158
 159 static struct platform_device v2m_pcie_i2c_device = {
 160         .name           = "versatile-i2c",
 161         .id             = 0,
 162         .num_resources  = 1,
 163         .resource       = &v2m_pcie_i2c_resource,
 164 };
 165
 166 static struct resource v2m_ddc_i2c_resource = {
 167         .start  = V2M_SERIAL_BUS_DVI,
 168         .end    = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
 169         .flags  = IORESOURCE_MEM,
 170 };
 171
 172 static struct platform_device v2m_ddc_i2c_device = {
 173         .name           = "versatile-i2c",
 174         .id             = 1,
 175         .num_resources  = 1,
 176         .resource       = &v2m_ddc_i2c_resource,
 177 };
 178
 179 static struct resource v2m_eth_resources[] = {
 180         {
 181                 .start  = V2M_LAN9118,
 182                 .end    = V2M_LAN9118 + SZ_64K - 1,
 183                 .flags  = IORESOURCE_MEM,
 184         }, {
 185                 .start  = IRQ_V2M_LAN9118,
 186                 .end    = IRQ_V2M_LAN9118,
 187                 .flags  = IORESOURCE_IRQ,
 188         },
 189 };
 190
 191 static struct smsc911x_platform_config v2m_eth_config = {
 192         .flags          = SMSC911X_USE_32BIT,
 193         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 194         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 195         .phy_interface  = PHY_INTERFACE_MODE_MII,
 196 };
 197
 198 static struct platform_device v2m_eth_device = {
 199         .name           = "smsc911x",
 200         .id             = -1,
 201         .resource       = v2m_eth_resources,
 202         .num_resources  = ARRAY_SIZE(v2m_eth_resources),
 203         .dev.platform_data = &v2m_eth_config,
 204 };
 205
 206 static struct regulator_consumer_supply v2m_eth_supplies[] = {
 207         REGULATOR_SUPPLY("vddvario", "smsc911x"),
 208         REGULATOR_SUPPLY("vdd33a", "smsc911x"),
 209 };
 210
 211 static struct resource v2m_usb_resources[] = {
 212         {
 213                 .start  = V2M_ISP1761,
 214                 .end    = V2M_ISP1761 + SZ_128K - 1,
 215                 .flags  = IORESOURCE_MEM,
 216         }, {
 217                 .start  = IRQ_V2M_ISP1761,
 218                 .end    = IRQ_V2M_ISP1761,
 219                 .flags  = IORESOURCE_IRQ,
 220         },
 221 };
 222
 223 static struct isp1760_platform_data v2m_usb_config = {
 224         .is_isp1761             = true,
 225         .bus_width_16           = false,
 226         .port1_otg              = true,
 227         .analog_oc              = false,
 228         .dack_polarity_high     = false,
 229         .dreq_polarity_high     = false,
 230 };
 231
 232 static struct platform_device v2m_usb_device = {
 233         .name           = "isp1760",
 234         .id             = -1,
 235         .resource       = v2m_usb_resources,
 236         .num_resources  = ARRAY_SIZE(v2m_usb_resources),
 237         .dev.platform_data = &v2m_usb_config,
 238 };
 239
 240 static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
 241 {
 242         writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH);
 243 }
 244
 245 static struct physmap_flash_data v2m_flash_data = {
 246         .width          = 4,
 247         .set_vpp        = v2m_flash_set_vpp,
 248 };
 249
 250 static struct resource v2m_flash_resources[] = {
 251         {
 252                 .start  = V2M_NOR0,
 253                 .end    = V2M_NOR0 + SZ_64M - 1,
 254                 .flags  = IORESOURCE_MEM,
 255         }, {
 256                 .start  = V2M_NOR1,
 257                 .end    = V2M_NOR1 + SZ_64M - 1,
 258                 .flags  = IORESOURCE_MEM,
 259         },
 260 };
 261
 262 static struct platform_device v2m_flash_device = {
 263         .name           = "physmap-flash",
 264         .id             = -1,
 265         .resource       = v2m_flash_resources,
 266         .num_resources  = ARRAY_SIZE(v2m_flash_resources),
 267         .dev.platform_data = &v2m_flash_data,
 268 };
 269
 270 static struct pata_platform_info v2m_pata_data = {
 271         .ioport_shift   = 2,
 272 };
 273
 274 static struct resource v2m_pata_resources[] = {
 275         {
 276                 .start  = V2M_CF,
 277                 .end    = V2M_CF + 0xff,
 278                 .flags  = IORESOURCE_MEM,
 279         }, {
 280                 .start  = V2M_CF + 0x100,
 281                 .end    = V2M_CF + SZ_4K - 1,
 282                 .flags  = IORESOURCE_MEM,
 283         },
 284 };
 285
 286 static struct platform_device v2m_cf_device = {
 287         .name           = "pata_platform",
 288         .id             = -1,
 289         .resource       = v2m_pata_resources,
 290         .num_resources  = ARRAY_SIZE(v2m_pata_resources),
 291         .dev.platform_data = &v2m_pata_data,
 292 };
 293
 294 static unsigned int v2m_mmci_status(struct device *dev)
 295 {
 296         return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0);
 297 }
 298
 299 static struct mmci_platform_data v2m_mmci_data = {
 300         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
 301         .status         = v2m_mmci_status,
 302 };
 303
 304 static AMBA_APB_DEVICE(aaci,  "mb:aaci",  0, V2M_AACI, IRQ_V2M_AACI, NULL);
 305 static AMBA_APB_DEVICE(mmci,  "mb:mmci",  0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
 306 static AMBA_APB_DEVICE(kmi0,  "mb:kmi0",  0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
 307 static AMBA_APB_DEVICE(kmi1,  "mb:kmi1",  0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
 308 static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
 309 static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
 310 static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
 311 static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
 312 static AMBA_APB_DEVICE(wdt,   "mb:wdt",   0, V2M_WDT, IRQ_V2M_WDT, NULL);
 313 static AMBA_APB_DEVICE(rtc,   "mb:rtc",   0, V2M_RTC, IRQ_V2M_RTC, NULL);
 314
 315 static struct amba_device *v2m_amba_devs[] __initdata = {
 316         &aaci_device,
 317         &mmci_device,
 318         &kmi0_device,
 319         &kmi1_device,
 320         &uart0_device,
 321         &uart1_device,
 322         &uart2_device,
 323         &uart3_device,
 324         &wdt_device,
 325         &rtc_device,
 326 };
 327
 328
 329 static unsigned long v2m_osc_recalc_rate(struct clk_hw *hw,
 330                 unsigned long parent_rate)
 331 {
 332         struct v2m_osc *osc = to_v2m_osc(hw);
 333
 334         return !parent_rate ? osc->rate_default : parent_rate;
 335 }
 336
 337 static long v2m_osc_round_rate(struct clk_hw *hw, unsigned long rate,
 338                 unsigned long *parent_rate)
 339 {
 340         struct v2m_osc *osc = to_v2m_osc(hw);
 341
 342         if (WARN_ON(rate < osc->rate_min))
 343                 rate = osc->rate_min;
 344
 345         if (WARN_ON(rate > osc->rate_max))
 346                 rate = osc->rate_max;
 347
 348         return rate;
 349 }
 350
 351 static int v2m_osc_set_rate(struct clk_hw *hw, unsigned long rate,
 352                 unsigned long parent_rate)
 353 {
 354         struct v2m_osc *osc = to_v2m_osc(hw);
 355
 356         v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE(osc->site) |
 357                         SYS_CFG_STACK(osc->stack) | osc->osc, rate);
 358
 359         return 0;
 360 }
 361
 362 static struct clk_ops v2m_osc_ops = {
 363         .recalc_rate = v2m_osc_recalc_rate,
 364         .round_rate = v2m_osc_round_rate,
 365         .set_rate = v2m_osc_set_rate,
 366 };
 367
 368 struct clk * __init v2m_osc_register(const char *name, struct v2m_osc *osc)
 369 {
 370         struct clk_init_data init;
 371
 372         WARN_ON(osc->site > 2);
 373         WARN_ON(osc->stack > 15);
 374         WARN_ON(osc->osc > 4095);
 375
 376         init.name = name;
 377         init.ops = &v2m_osc_ops;
 378         init.flags = CLK_IS_ROOT;
 379         init.num_parents = 0;
 380
 381         osc->hw.init = &init;
 382
 383         return clk_register(NULL, &osc->hw);
 384 }
 385
 386 static struct v2m_osc v2m_mb_osc1 = {
 387         .site = SYS_CFG_SITE_MB,
 388         .osc = 1,
 389         .rate_min = 23750000,
 390         .rate_max = 63500000,
 391         .rate_default = 23750000,
 392 };
 393
 394 static const char *v2m_ref_clk_periphs[] __initconst = {
 395         "mb:wdt",   "1000f000.wdt",  "1c0f0000.wdt",    /* SP805 WDT */
 396 };
 397
 398 static const char *v2m_osc1_periphs[] __initconst = {
 399         "mb:clcd",  "1001f000.clcd", "1c1f0000.clcd",   /* PL111 CLCD */
 400 };
 401
 402 static const char *v2m_osc2_periphs[] __initconst = {
 403         "mb:mmci",  "10005000.mmci", "1c050000.mmci",   /* PL180 MMCI */
 404         "mb:kmi0",  "10006000.kmi",  "1c060000.kmi",    /* PL050 KMI0 */
 405         "mb:kmi1",  "10007000.kmi",  "1c070000.kmi",    /* PL050 KMI1 */
 406         "mb:uart0", "10009000.uart", "1c090000.uart",   /* PL011 UART0 */
 407         "mb:uart1", "1000a000.uart", "1c0a0000.uart",   /* PL011 UART1 */
 408         "mb:uart2", "1000b000.uart", "1c0b0000.uart",   /* PL011 UART2 */
 409         "mb:uart3", "1000c000.uart", "1c0c0000.uart",   /* PL011 UART3 */
 410 };
 411
 412 static void __init v2m_clk_init(void)
 413 {
 414         struct clk *clk;
 415         int i;
 416
 417         clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL,
 418                         CLK_IS_ROOT, 0);
 419         WARN_ON(clk_register_clkdev(clk, "apb_pclk", NULL));
 420
 421         clk = clk_register_fixed_rate(NULL, "mb:ref_clk", NULL,
 422                         CLK_IS_ROOT, 32768);
 423         for (i = 0; i < ARRAY_SIZE(v2m_ref_clk_periphs); i++)
 424                 WARN_ON(clk_register_clkdev(clk, NULL, v2m_ref_clk_periphs[i]));
 425
 426         clk = clk_register_fixed_rate(NULL, "mb:sp804_clk", NULL,
 427                         CLK_IS_ROOT, 1000000);
 428         WARN_ON(clk_register_clkdev(clk, "v2m-timer0", "sp804"));
 429         WARN_ON(clk_register_clkdev(clk, "v2m-timer1", "sp804"));
 430
 431         clk = v2m_osc_register("mb:osc1", &v2m_mb_osc1);
 432         for (i = 0; i < ARRAY_SIZE(v2m_osc1_periphs); i++)
 433                 WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc1_periphs[i]));
 434
 435         clk = clk_register_fixed_rate(NULL, "mb:osc2", NULL,
 436                         CLK_IS_ROOT, 24000000);
 437         for (i = 0; i < ARRAY_SIZE(v2m_osc2_periphs); i++)
 438                 WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc2_periphs[i]));
 439 }
 440
 441 static void __init v2m_timer_init(void)
 442 {
 443         v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K));
 444         v2m_clk_init();
 445         v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
 446 }
 447
 448 static struct sys_timer v2m_timer = {
 449         .init   = v2m_timer_init,
 450 };
 451
 452 static void __init v2m_init_early(void)
 453 {
 454         if (ct_desc->init_early)
 455                 ct_desc->init_early();
 456         versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
 457 }
 458
 459 static void v2m_power_off(void)
 460 {
 461         if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0))
 462                 printk(KERN_EMERG "Unable to shutdown\n");
 463 }
 464
 465 static void v2m_restart(char str, const char *cmd)
 466 {
 467         if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0))
 468                 printk(KERN_EMERG "Unable to reboot\n");
 469 }
 470
 471 struct ct_desc *ct_desc;
 472
 473 static struct ct_desc *ct_descs[] __initdata = {
 474 #ifdef CONFIG_ARCH_VEXPRESS_CA9X4
 475         &ct_ca9x4_desc,
 476 #endif
 477 };
 478
 479 static void __init v2m_populate_ct_desc(void)
 480 {
 481         int i;
 482         u32 current_tile_id;
 483
 484         ct_desc = NULL;
 485         current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0)
 486                                 & V2M_CT_ID_MASK;
 487
 488         for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
 489                 if (ct_descs[i]->id == current_tile_id)
 490                         ct_desc = ct_descs[i];
 491
 492         if (!ct_desc)
 493                 panic("vexpress: this kernel does not support core tile ID 0x%08x when booting via ATAGs.\n"
 494                       "You may need a device tree blob or a different kernel to boot on this board.\n",
 495                       current_tile_id);
 496 }
 497
 498 static void __init v2m_map_io(void)
 499 {
 500         iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
 501         v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K);
 502         v2m_populate_ct_desc();
 503         ct_desc->map_io();
 504 }
 505
 506 static void __init v2m_init_irq(void)
 507 {
 508         ct_desc->init_irq();
 509 }
 510
 511 static void __init v2m_init(void)
 512 {
 513         int i;
 514
 515         regulator_register_fixed(0, v2m_eth_supplies,
 516                         ARRAY_SIZE(v2m_eth_supplies));
 517
 518         platform_device_register(&v2m_pcie_i2c_device);
 519         platform_device_register(&v2m_ddc_i2c_device);
 520         platform_device_register(&v2m_flash_device);
 521         platform_device_register(&v2m_cf_device);
 522         platform_device_register(&v2m_eth_device);
 523         platform_device_register(&v2m_usb_device);
 524
 525         for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
 526                 amba_device_register(v2m_amba_devs[i], &iomem_resource);
 527
 528         pm_power_off = v2m_power_off;
 529
 530         ct_desc->init_tile();
 531 }
 532
 533 MACHINE_START(VEXPRESS, "ARM-Versatile Express")
 534         .atag_offset    = 0x100,
 535         .smp            = smp_ops(vexpress_smp_ops),
 536         .map_io         = v2m_map_io,
 537         .init_early     = v2m_init_early,
 538         .init_irq       = v2m_init_irq,
 539         .timer          = &v2m_timer,
 540         .handle_irq     = gic_handle_irq,
 541         .init_machine   = v2m_init,
 542         .restart        = v2m_restart,
 543 MACHINE_END
 544
 545 #if defined(CONFIG_ARCH_VEXPRESS_DT)
 546
 547 static struct map_desc v2m_rs1_io_desc __initdata = {
 548         .virtual        = V2M_PERIPH,
 549         .pfn            = __phys_to_pfn(0x1c000000),
 550         .length         = SZ_2M,
 551         .type           = MT_DEVICE,
 552 };
 553
 554 static int __init v2m_dt_scan_memory_map(unsigned long node, const char *uname,
 555                 int depth, void *data)
 556 {
 557         const char **map = data;
 558
 559         if (strcmp(uname, "motherboard") != 0)
 560                 return 0;
 561
 562         *map = of_get_flat_dt_prop(node, "arm,v2m-memory-map", NULL);
 563
 564         return 1;
 565 }
 566
 567 void __init v2m_dt_map_io(void)
 568 {
 569         const char *map = NULL;
 570
 571         of_scan_flat_dt(v2m_dt_scan_memory_map, &map);
 572
 573         if (map && strcmp(map, "rs1") == 0)
 574                 iotable_init(&v2m_rs1_io_desc, 1);
 575         else
 576                 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
 577
 578 #if defined(CONFIG_SMP)
 579         vexpress_dt_smp_map_io();
 580 #endif
 581 }
 582
 583 void __init v2m_dt_init_early(void)
 584 {
 585         struct device_node *node;
 586         u32 dt_hbi;
 587
 588         node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
 589         v2m_sysreg_base = of_iomap(node, 0);
 590         if (WARN_ON(!v2m_sysreg_base))
 591                 return;
 592
 593         /* Confirm board type against DT property, if available */
 594         if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) {
 595                 int site = v2m_get_master_site();
 596                 u32 id = readl(v2m_sysreg_base + (site == SYS_CFG_SITE_DB2 ?
 597                                 V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
 598                 u32 hbi = id & SYS_PROCIDx_HBI_MASK;
 599
 600                 if (WARN_ON(dt_hbi != hbi))
 601                         pr_warning("vexpress: DT HBI (%x) is not matching "
 602                                         "hardware (%x)!\n", dt_hbi, hbi);
 603         }
 604 }
 605
 606 static  struct of_device_id vexpress_irq_match[] __initdata = {
 607         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
 608         {}
 609 };
 610
 611 static void __init v2m_dt_init_irq(void)
 612 {
 613         of_irq_init(vexpress_irq_match);
 614 }
 615
 616 static void __init v2m_dt_timer_init(void)
 617 {
 618         struct device_node *node;
 619         const char *path;
 620         int err;
 621
 622         node = of_find_compatible_node(NULL, NULL, "arm,sp810");
 623         v2m_sysctl_init(of_iomap(node, 0));
 624
 625         v2m_clk_init();
 626
 627         err = of_property_read_string(of_aliases, "arm,v2m_timer", &path);
 628         if (WARN_ON(err))
 629                 return;
 630         node = of_find_node_by_path(path);
 631         v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0));
 632         if (arch_timer_of_register() != 0)
 633                 twd_local_timer_of_register();
 634
 635         if (arch_timer_sched_clock_init() != 0)
 636                 versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
 637 }
 638
 639 static struct sys_timer v2m_dt_timer = {
 640         .init = v2m_dt_timer_init,
 641 };
 642
 643 static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = {
 644         OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash",
 645                         &v2m_flash_data),
 646         OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data),
 647         /* RS1 memory map */
 648         OF_DEV_AUXDATA("arm,vexpress-flash", 0x08000000, "physmap-flash",
 649                         &v2m_flash_data),
 650         OF_DEV_AUXDATA("arm,primecell", 0x1c050000, "mb:mmci", &v2m_mmci_data),
 651         {}
 652 };
 653
 654 static void __init v2m_dt_init(void)
 655 {
 656         l2x0_of_init(0x00400000, 0xfe0fffff);
 657         of_platform_populate(NULL, of_default_bus_match_table,
 658                         v2m_dt_auxdata_lookup, NULL);
 659         pm_power_off = v2m_power_off;
 660 }
 661
 662 const static char *v2m_dt_match[] __initconst = {
 663         "arm,vexpress",
 664         NULL,
 665 };
 666
 667 DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
 668         .dt_compat      = v2m_dt_match,
 669         .smp            = smp_ops(vexpress_smp_ops),
 670         .map_io         = v2m_dt_map_io,
 671         .init_early     = v2m_dt_init_early,
 672         .init_irq       = v2m_dt_init_irq,
 673         .timer          = &v2m_dt_timer,
 674         .init_machine   = v2m_dt_init,
 675         .handle_irq     = gic_handle_irq,
 676         .restart        = v2m_restart,
 677 MACHINE_END
 678
 679 #endif