2 * Just-In-Time compiler for BPF filters on 32bit ARM
4 * Copyright (c) 2011 Mircea Gherzan <mgherzan@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License.
11 #include <linux/bitops.h>
12 #include <linux/compiler.h>
13 #include <linux/errno.h>
14 #include <linux/filter.h>
15 #include <linux/netdevice.h>
16 #include <linux/string.h>
17 #include <linux/slab.h>
18 #include <linux/if_vlan.h>
20 #include <asm/cacheflush.h>
21 #include <asm/hwcap.h>
22 #include <asm/opcodes.h>
24 #include "bpf_jit_32.h"
32 * r6 pointer to the skb
37 #define r_scratch ARM_R0
38 /* r1-r3 are (also) used for the unaligned loads on the non-ARMv7 slowpath */
43 #define r_skb_data ARM_R7
44 #define r_skb_hl ARM_R8
46 #define SCRATCH_SP_OFFSET 0
47 #define SCRATCH_OFF(k) (SCRATCH_SP_OFFSET + 4 * (k))
49 #define SEEN_MEM ((1 << BPF_MEMWORDS) - 1)
50 #define SEEN_MEM_WORD(k) (1 << (k))
51 #define SEEN_X (1 << BPF_MEMWORDS)
52 #define SEEN_CALL (1 << (BPF_MEMWORDS + 1))
53 #define SEEN_SKB (1 << (BPF_MEMWORDS + 2))
54 #define SEEN_DATA (1 << (BPF_MEMWORDS + 3))
56 #define FLAG_NEED_X_RESET (1 << 0)
57 #define FLAG_IMM_OVERFLOW (1 << 1)
60 const struct bpf_prog *skf;
62 unsigned prologue_bytes;
68 #if __LINUX_ARM_ARCH__ < 7
75 int bpf_jit_enable __read_mostly;
77 static inline int call_neg_helper(struct sk_buff *skb, int offset, void *ret,
80 void *ptr = bpf_internal_load_pointer_neg_helper(skb, offset, size);
84 memcpy(ret, ptr, size);
88 static u64 jit_get_skb_b(struct sk_buff *skb, int offset)
94 err = call_neg_helper(skb, offset, &ret, 1);
96 err = skb_copy_bits(skb, offset, &ret, 1);
98 return (u64)err << 32 | ret;
101 static u64 jit_get_skb_h(struct sk_buff *skb, int offset)
107 err = call_neg_helper(skb, offset, &ret, 2);
109 err = skb_copy_bits(skb, offset, &ret, 2);
111 return (u64)err << 32 | ntohs(ret);
114 static u64 jit_get_skb_w(struct sk_buff *skb, int offset)
120 err = call_neg_helper(skb, offset, &ret, 4);
122 err = skb_copy_bits(skb, offset, &ret, 4);
124 return (u64)err << 32 | ntohl(ret);
128 * Wrapper that handles both OABI and EABI and assures Thumb2 interworking
129 * (where the assembly routines like __aeabi_uidiv could cause problems).
131 static u32 jit_udiv(u32 dividend, u32 divisor)
133 return dividend / divisor;
136 static inline void _emit(int cond, u32 inst, struct jit_ctx *ctx)
138 inst |= (cond << 28);
139 inst = __opcode_to_mem_arm(inst);
141 if (ctx->target != NULL)
142 ctx->target[ctx->idx] = inst;
148 * Emit an instruction that will be executed unconditionally.
150 static inline void emit(u32 inst, struct jit_ctx *ctx)
152 _emit(ARM_COND_AL, inst, ctx);
155 static u16 saved_regs(struct jit_ctx *ctx)
159 if ((ctx->skf->len > 1) ||
160 (ctx->skf->insns[0].code == (BPF_RET | BPF_A)))
163 #ifdef CONFIG_FRAME_POINTER
164 ret |= (1 << ARM_FP) | (1 << ARM_IP) | (1 << ARM_LR) | (1 << ARM_PC);
166 if (ctx->seen & SEEN_CALL)
169 if (ctx->seen & (SEEN_DATA | SEEN_SKB))
171 if (ctx->seen & SEEN_DATA)
172 ret |= (1 << r_skb_data) | (1 << r_skb_hl);
173 if (ctx->seen & SEEN_X)
179 static inline int mem_words_used(struct jit_ctx *ctx)
181 /* yes, we do waste some stack space IF there are "holes" in the set" */
182 return fls(ctx->seen & SEEN_MEM);
185 static inline bool is_load_to_a(u16 inst)
188 case BPF_LD | BPF_W | BPF_LEN:
189 case BPF_LD | BPF_W | BPF_ABS:
190 case BPF_LD | BPF_H | BPF_ABS:
191 case BPF_LD | BPF_B | BPF_ABS:
198 static void jit_fill_hole(void *area, unsigned int size)
201 /* We are guaranteed to have aligned memory. */
202 for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
203 *ptr++ = __opcode_to_mem_arm(ARM_INST_UDF);
206 static void build_prologue(struct jit_ctx *ctx)
208 u16 reg_set = saved_regs(ctx);
209 u16 first_inst = ctx->skf->insns[0].code;
212 #ifdef CONFIG_FRAME_POINTER
213 emit(ARM_MOV_R(ARM_IP, ARM_SP), ctx);
214 emit(ARM_PUSH(reg_set), ctx);
215 emit(ARM_SUB_I(ARM_FP, ARM_IP, 4), ctx);
218 emit(ARM_PUSH(reg_set), ctx);
221 if (ctx->seen & (SEEN_DATA | SEEN_SKB))
222 emit(ARM_MOV_R(r_skb, ARM_R0), ctx);
224 if (ctx->seen & SEEN_DATA) {
225 off = offsetof(struct sk_buff, data);
226 emit(ARM_LDR_I(r_skb_data, r_skb, off), ctx);
227 /* headlen = len - data_len */
228 off = offsetof(struct sk_buff, len);
229 emit(ARM_LDR_I(r_skb_hl, r_skb, off), ctx);
230 off = offsetof(struct sk_buff, data_len);
231 emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
232 emit(ARM_SUB_R(r_skb_hl, r_skb_hl, r_scratch), ctx);
235 if (ctx->flags & FLAG_NEED_X_RESET)
236 emit(ARM_MOV_I(r_X, 0), ctx);
238 /* do not leak kernel data to userspace */
239 if ((first_inst != (BPF_RET | BPF_K)) && !(is_load_to_a(first_inst)))
240 emit(ARM_MOV_I(r_A, 0), ctx);
242 /* stack space for the BPF_MEM words */
243 if (ctx->seen & SEEN_MEM)
244 emit(ARM_SUB_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
247 static void build_epilogue(struct jit_ctx *ctx)
249 u16 reg_set = saved_regs(ctx);
251 if (ctx->seen & SEEN_MEM)
252 emit(ARM_ADD_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
254 reg_set &= ~(1 << ARM_LR);
256 #ifdef CONFIG_FRAME_POINTER
257 /* the first instruction of the prologue was: mov ip, sp */
258 reg_set &= ~(1 << ARM_IP);
259 reg_set |= (1 << ARM_SP);
260 emit(ARM_LDM(ARM_SP, reg_set), ctx);
263 if (ctx->seen & SEEN_CALL)
264 reg_set |= 1 << ARM_PC;
265 emit(ARM_POP(reg_set), ctx);
268 if (!(ctx->seen & SEEN_CALL))
269 emit(ARM_BX(ARM_LR), ctx);
273 static int16_t imm8m(u32 x)
277 for (rot = 0; rot < 16; rot++)
278 if ((x & ~ror32(0xff, 2 * rot)) == 0)
279 return rol32(x, 2 * rot) | (rot << 8);
284 #if __LINUX_ARM_ARCH__ < 7
286 static u16 imm_offset(u32 k, struct jit_ctx *ctx)
288 unsigned i = 0, offset;
291 /* on the "fake" run we just count them (duplicates included) */
292 if (ctx->target == NULL) {
297 while ((i < ctx->imm_count) && ctx->imms[i]) {
298 if (ctx->imms[i] == k)
303 if (ctx->imms[i] == 0)
306 /* constants go just after the epilogue */
307 offset = ctx->offsets[ctx->skf->len];
308 offset += ctx->prologue_bytes;
309 offset += ctx->epilogue_bytes;
312 ctx->target[offset / 4] = k;
314 /* PC in ARM mode == address of the instruction + 8 */
315 imm = offset - (8 + ctx->idx * 4);
319 * literal pool is too far, signal it into flags. we
320 * can only detect it on the second pass unfortunately.
322 ctx->flags |= FLAG_IMM_OVERFLOW;
329 #endif /* __LINUX_ARM_ARCH__ */
332 * Move an immediate that's not an imm8m to a core register.
334 static inline void emit_mov_i_no8m(int rd, u32 val, struct jit_ctx *ctx)
336 #if __LINUX_ARM_ARCH__ < 7
337 emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx);
339 emit(ARM_MOVW(rd, val & 0xffff), ctx);
341 emit(ARM_MOVT(rd, val >> 16), ctx);
345 static inline void emit_mov_i(int rd, u32 val, struct jit_ctx *ctx)
347 int imm12 = imm8m(val);
350 emit(ARM_MOV_I(rd, imm12), ctx);
352 emit_mov_i_no8m(rd, val, ctx);
355 #if __LINUX_ARM_ARCH__ < 6
357 static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
359 _emit(cond, ARM_LDRB_I(ARM_R3, r_addr, 1), ctx);
360 _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
361 _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 3), ctx);
362 _emit(cond, ARM_LSL_I(ARM_R3, ARM_R3, 16), ctx);
363 _emit(cond, ARM_LDRB_I(ARM_R0, r_addr, 2), ctx);
364 _emit(cond, ARM_ORR_S(ARM_R3, ARM_R3, ARM_R1, SRTYPE_LSL, 24), ctx);
365 _emit(cond, ARM_ORR_R(ARM_R3, ARM_R3, ARM_R2), ctx);
366 _emit(cond, ARM_ORR_S(r_res, ARM_R3, ARM_R0, SRTYPE_LSL, 8), ctx);
369 static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
371 _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
372 _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 1), ctx);
373 _emit(cond, ARM_ORR_S(r_res, ARM_R2, ARM_R1, SRTYPE_LSL, 8), ctx);
376 static inline void emit_swap16(u8 r_dst, u8 r_src, struct jit_ctx *ctx)
378 /* r_dst = (r_src << 8) | (r_src >> 8) */
379 emit(ARM_LSL_I(ARM_R1, r_src, 8), ctx);
380 emit(ARM_ORR_S(r_dst, ARM_R1, r_src, SRTYPE_LSR, 8), ctx);
383 * we need to mask out the bits set in r_dst[23:16] due to
384 * the first shift instruction.
386 * note that 0x8ff is the encoded immediate 0x00ff0000.
388 emit(ARM_BIC_I(r_dst, r_dst, 0x8ff), ctx);
393 static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
395 _emit(cond, ARM_LDR_I(r_res, r_addr, 0), ctx);
396 #ifdef __LITTLE_ENDIAN
397 _emit(cond, ARM_REV(r_res, r_res), ctx);
401 static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
403 _emit(cond, ARM_LDRH_I(r_res, r_addr, 0), ctx);
404 #ifdef __LITTLE_ENDIAN
405 _emit(cond, ARM_REV16(r_res, r_res), ctx);
409 static inline void emit_swap16(u8 r_dst __maybe_unused,
410 u8 r_src __maybe_unused,
411 struct jit_ctx *ctx __maybe_unused)
413 #ifdef __LITTLE_ENDIAN
414 emit(ARM_REV16(r_dst, r_src), ctx);
418 #endif /* __LINUX_ARM_ARCH__ < 6 */
421 /* Compute the immediate value for a PC-relative branch. */
422 static inline u32 b_imm(unsigned tgt, struct jit_ctx *ctx)
426 if (ctx->target == NULL)
429 * BPF allows only forward jumps and the offset of the target is
430 * still the one computed during the first pass.
432 imm = ctx->offsets[tgt] + ctx->prologue_bytes - (ctx->idx * 4 + 8);
437 #define OP_IMM3(op, r1, r2, imm_val, ctx) \
439 imm12 = imm8m(imm_val); \
441 emit_mov_i_no8m(r_scratch, imm_val, ctx); \
442 emit(op ## _R((r1), (r2), r_scratch), ctx); \
444 emit(op ## _I((r1), (r2), imm12), ctx); \
448 static inline void emit_err_ret(u8 cond, struct jit_ctx *ctx)
450 if (ctx->ret0_fp_idx >= 0) {
451 _emit(cond, ARM_B(b_imm(ctx->ret0_fp_idx, ctx)), ctx);
452 /* NOP to keep the size constant between passes */
453 emit(ARM_MOV_R(ARM_R0, ARM_R0), ctx);
455 _emit(cond, ARM_MOV_I(ARM_R0, 0), ctx);
456 _emit(cond, ARM_B(b_imm(ctx->skf->len, ctx)), ctx);
460 static inline void emit_blx_r(u8 tgt_reg, struct jit_ctx *ctx)
462 #if __LINUX_ARM_ARCH__ < 5
463 emit(ARM_MOV_R(ARM_LR, ARM_PC), ctx);
465 if (elf_hwcap & HWCAP_THUMB)
466 emit(ARM_BX(tgt_reg), ctx);
468 emit(ARM_MOV_R(ARM_PC, tgt_reg), ctx);
470 emit(ARM_BLX_R(tgt_reg), ctx);
474 static inline void emit_udiv(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx)
476 #if __LINUX_ARM_ARCH__ == 7
477 if (elf_hwcap & HWCAP_IDIVA) {
478 emit(ARM_UDIV(rd, rm, rn), ctx);
484 * For BPF_ALU | BPF_DIV | BPF_K instructions, rm is ARM_R4
485 * (r_A) and rn is ARM_R0 (r_scratch) so load rn first into
486 * ARM_R1 to avoid accidentally overwriting ARM_R0 with rm
487 * before using it as a source for ARM_R1.
489 * For BPF_ALU | BPF_DIV | BPF_X rm is ARM_R4 (r_A) and rn is
490 * ARM_R5 (r_X) so there is no particular register overlap
494 emit(ARM_MOV_R(ARM_R1, rn), ctx);
496 emit(ARM_MOV_R(ARM_R0, rm), ctx);
498 ctx->seen |= SEEN_CALL;
499 emit_mov_i(ARM_R3, (u32)jit_udiv, ctx);
500 emit_blx_r(ARM_R3, ctx);
503 emit(ARM_MOV_R(rd, ARM_R0), ctx);
506 static inline void update_on_xread(struct jit_ctx *ctx)
508 if (!(ctx->seen & SEEN_X))
509 ctx->flags |= FLAG_NEED_X_RESET;
514 static int build_body(struct jit_ctx *ctx)
516 void *load_func[] = {jit_get_skb_b, jit_get_skb_h, jit_get_skb_w};
517 const struct bpf_prog *prog = ctx->skf;
518 const struct sock_filter *inst;
519 unsigned i, load_order, off, condt;
523 for (i = 0; i < prog->len; i++) {
526 inst = &(prog->insns[i]);
527 /* K as an immediate value operand */
529 code = bpf_anc_helper(inst);
531 /* compute offsets only in the fake pass */
532 if (ctx->target == NULL)
533 ctx->offsets[i] = ctx->idx * 4;
536 case BPF_LD | BPF_IMM:
537 emit_mov_i(r_A, k, ctx);
539 case BPF_LD | BPF_W | BPF_LEN:
540 ctx->seen |= SEEN_SKB;
541 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
542 emit(ARM_LDR_I(r_A, r_skb,
543 offsetof(struct sk_buff, len)), ctx);
545 case BPF_LD | BPF_MEM:
547 ctx->seen |= SEEN_MEM_WORD(k);
548 emit(ARM_LDR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
550 case BPF_LD | BPF_W | BPF_ABS:
553 case BPF_LD | BPF_H | BPF_ABS:
556 case BPF_LD | BPF_B | BPF_ABS:
559 emit_mov_i(r_off, k, ctx);
561 ctx->seen |= SEEN_DATA | SEEN_CALL;
563 if (load_order > 0) {
564 emit(ARM_SUB_I(r_scratch, r_skb_hl,
565 1 << load_order), ctx);
566 emit(ARM_CMP_R(r_scratch, r_off), ctx);
569 emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
574 * test for negative offset, only if we are
575 * currently scheduled to take the fast
576 * path. this will update the flags so that
577 * the slowpath instruction are ignored if the
578 * offset is negative.
580 * for loard_order == 0 the HI condition will
581 * make loads at offset 0 take the slow path too.
583 _emit(condt, ARM_CMP_I(r_off, 0), ctx);
585 _emit(condt, ARM_ADD_R(r_scratch, r_off, r_skb_data),
589 _emit(condt, ARM_LDRB_I(r_A, r_scratch, 0),
591 else if (load_order == 1)
592 emit_load_be16(condt, r_A, r_scratch, ctx);
593 else if (load_order == 2)
594 emit_load_be32(condt, r_A, r_scratch, ctx);
596 _emit(condt, ARM_B(b_imm(i + 1, ctx)), ctx);
599 emit_mov_i(ARM_R3, (u32)load_func[load_order], ctx);
600 emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
601 /* the offset is already in R1 */
602 emit_blx_r(ARM_R3, ctx);
603 /* check the result of skb_copy_bits */
604 emit(ARM_CMP_I(ARM_R1, 0), ctx);
605 emit_err_ret(ARM_COND_NE, ctx);
606 emit(ARM_MOV_R(r_A, ARM_R0), ctx);
608 case BPF_LD | BPF_W | BPF_IND:
611 case BPF_LD | BPF_H | BPF_IND:
614 case BPF_LD | BPF_B | BPF_IND:
617 update_on_xread(ctx);
618 OP_IMM3(ARM_ADD, r_off, r_X, k, ctx);
620 case BPF_LDX | BPF_IMM:
622 emit_mov_i(r_X, k, ctx);
624 case BPF_LDX | BPF_W | BPF_LEN:
625 ctx->seen |= SEEN_X | SEEN_SKB;
626 emit(ARM_LDR_I(r_X, r_skb,
627 offsetof(struct sk_buff, len)), ctx);
629 case BPF_LDX | BPF_MEM:
630 ctx->seen |= SEEN_X | SEEN_MEM_WORD(k);
631 emit(ARM_LDR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
633 case BPF_LDX | BPF_B | BPF_MSH:
634 /* x = ((*(frame + k)) & 0xf) << 2; */
635 ctx->seen |= SEEN_X | SEEN_DATA | SEEN_CALL;
636 /* the interpreter should deal with the negative K */
639 /* offset in r1: we might have to take the slow path */
640 emit_mov_i(r_off, k, ctx);
641 emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
643 /* load in r0: common with the slowpath */
644 _emit(ARM_COND_HI, ARM_LDRB_R(ARM_R0, r_skb_data,
647 * emit_mov_i() might generate one or two instructions,
648 * the same holds for emit_blx_r()
650 _emit(ARM_COND_HI, ARM_B(b_imm(i + 1, ctx) - 2), ctx);
652 emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
654 emit_mov_i(ARM_R3, (u32)jit_get_skb_b, ctx);
655 emit_blx_r(ARM_R3, ctx);
656 /* check the return value of skb_copy_bits */
657 emit(ARM_CMP_I(ARM_R1, 0), ctx);
658 emit_err_ret(ARM_COND_NE, ctx);
660 emit(ARM_AND_I(r_X, ARM_R0, 0x00f), ctx);
661 emit(ARM_LSL_I(r_X, r_X, 2), ctx);
664 ctx->seen |= SEEN_MEM_WORD(k);
665 emit(ARM_STR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
668 update_on_xread(ctx);
669 ctx->seen |= SEEN_MEM_WORD(k);
670 emit(ARM_STR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
672 case BPF_ALU | BPF_ADD | BPF_K:
674 OP_IMM3(ARM_ADD, r_A, r_A, k, ctx);
676 case BPF_ALU | BPF_ADD | BPF_X:
677 update_on_xread(ctx);
678 emit(ARM_ADD_R(r_A, r_A, r_X), ctx);
680 case BPF_ALU | BPF_SUB | BPF_K:
682 OP_IMM3(ARM_SUB, r_A, r_A, k, ctx);
684 case BPF_ALU | BPF_SUB | BPF_X:
685 update_on_xread(ctx);
686 emit(ARM_SUB_R(r_A, r_A, r_X), ctx);
688 case BPF_ALU | BPF_MUL | BPF_K:
690 emit_mov_i(r_scratch, k, ctx);
691 emit(ARM_MUL(r_A, r_A, r_scratch), ctx);
693 case BPF_ALU | BPF_MUL | BPF_X:
694 update_on_xread(ctx);
695 emit(ARM_MUL(r_A, r_A, r_X), ctx);
697 case BPF_ALU | BPF_DIV | BPF_K:
700 emit_mov_i(r_scratch, k, ctx);
701 emit_udiv(r_A, r_A, r_scratch, ctx);
703 case BPF_ALU | BPF_DIV | BPF_X:
704 update_on_xread(ctx);
705 emit(ARM_CMP_I(r_X, 0), ctx);
706 emit_err_ret(ARM_COND_EQ, ctx);
707 emit_udiv(r_A, r_A, r_X, ctx);
709 case BPF_ALU | BPF_OR | BPF_K:
711 OP_IMM3(ARM_ORR, r_A, r_A, k, ctx);
713 case BPF_ALU | BPF_OR | BPF_X:
714 update_on_xread(ctx);
715 emit(ARM_ORR_R(r_A, r_A, r_X), ctx);
717 case BPF_ALU | BPF_XOR | BPF_K:
719 OP_IMM3(ARM_EOR, r_A, r_A, k, ctx);
721 case BPF_ANC | SKF_AD_ALU_XOR_X:
722 case BPF_ALU | BPF_XOR | BPF_X:
724 update_on_xread(ctx);
725 emit(ARM_EOR_R(r_A, r_A, r_X), ctx);
727 case BPF_ALU | BPF_AND | BPF_K:
729 OP_IMM3(ARM_AND, r_A, r_A, k, ctx);
731 case BPF_ALU | BPF_AND | BPF_X:
732 update_on_xread(ctx);
733 emit(ARM_AND_R(r_A, r_A, r_X), ctx);
735 case BPF_ALU | BPF_LSH | BPF_K:
736 if (unlikely(k > 31))
738 emit(ARM_LSL_I(r_A, r_A, k), ctx);
740 case BPF_ALU | BPF_LSH | BPF_X:
741 update_on_xread(ctx);
742 emit(ARM_LSL_R(r_A, r_A, r_X), ctx);
744 case BPF_ALU | BPF_RSH | BPF_K:
745 if (unlikely(k > 31))
747 emit(ARM_LSR_I(r_A, r_A, k), ctx);
749 case BPF_ALU | BPF_RSH | BPF_X:
750 update_on_xread(ctx);
751 emit(ARM_LSR_R(r_A, r_A, r_X), ctx);
753 case BPF_ALU | BPF_NEG:
755 emit(ARM_RSB_I(r_A, r_A, 0), ctx);
757 case BPF_JMP | BPF_JA:
759 emit(ARM_B(b_imm(i + k + 1, ctx)), ctx);
761 case BPF_JMP | BPF_JEQ | BPF_K:
762 /* pc += (A == K) ? pc->jt : pc->jf */
765 case BPF_JMP | BPF_JGT | BPF_K:
766 /* pc += (A > K) ? pc->jt : pc->jf */
769 case BPF_JMP | BPF_JGE | BPF_K:
770 /* pc += (A >= K) ? pc->jt : pc->jf */
775 emit_mov_i_no8m(r_scratch, k, ctx);
776 emit(ARM_CMP_R(r_A, r_scratch), ctx);
778 emit(ARM_CMP_I(r_A, imm12), ctx);
782 _emit(condt, ARM_B(b_imm(i + inst->jt + 1,
785 _emit(condt ^ 1, ARM_B(b_imm(i + inst->jf + 1,
788 case BPF_JMP | BPF_JEQ | BPF_X:
789 /* pc += (A == X) ? pc->jt : pc->jf */
792 case BPF_JMP | BPF_JGT | BPF_X:
793 /* pc += (A > X) ? pc->jt : pc->jf */
796 case BPF_JMP | BPF_JGE | BPF_X:
797 /* pc += (A >= X) ? pc->jt : pc->jf */
800 update_on_xread(ctx);
801 emit(ARM_CMP_R(r_A, r_X), ctx);
803 case BPF_JMP | BPF_JSET | BPF_K:
804 /* pc += (A & K) ? pc->jt : pc->jf */
806 /* not set iff all zeroes iff Z==1 iff EQ */
810 emit_mov_i_no8m(r_scratch, k, ctx);
811 emit(ARM_TST_R(r_A, r_scratch), ctx);
813 emit(ARM_TST_I(r_A, imm12), ctx);
816 case BPF_JMP | BPF_JSET | BPF_X:
817 /* pc += (A & X) ? pc->jt : pc->jf */
818 update_on_xread(ctx);
820 emit(ARM_TST_R(r_A, r_X), ctx);
822 case BPF_RET | BPF_A:
823 emit(ARM_MOV_R(ARM_R0, r_A), ctx);
825 case BPF_RET | BPF_K:
826 if ((k == 0) && (ctx->ret0_fp_idx < 0))
827 ctx->ret0_fp_idx = i;
828 emit_mov_i(ARM_R0, k, ctx);
830 if (i != ctx->skf->len - 1)
831 emit(ARM_B(b_imm(prog->len, ctx)), ctx);
833 case BPF_MISC | BPF_TAX:
836 emit(ARM_MOV_R(r_X, r_A), ctx);
838 case BPF_MISC | BPF_TXA:
840 update_on_xread(ctx);
841 emit(ARM_MOV_R(r_A, r_X), ctx);
843 case BPF_ANC | SKF_AD_PROTOCOL:
844 /* A = ntohs(skb->protocol) */
845 ctx->seen |= SEEN_SKB;
846 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
848 off = offsetof(struct sk_buff, protocol);
849 emit(ARM_LDRH_I(r_scratch, r_skb, off), ctx);
850 emit_swap16(r_A, r_scratch, ctx);
852 case BPF_ANC | SKF_AD_CPU:
853 /* r_scratch = current_thread_info() */
854 OP_IMM3(ARM_BIC, r_scratch, ARM_SP, THREAD_SIZE - 1, ctx);
855 /* A = current_thread_info()->cpu */
856 BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);
857 off = offsetof(struct thread_info, cpu);
858 emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
860 case BPF_ANC | SKF_AD_IFINDEX:
861 case BPF_ANC | SKF_AD_HATYPE:
862 /* A = skb->dev->ifindex */
863 /* A = skb->dev->type */
864 ctx->seen |= SEEN_SKB;
865 off = offsetof(struct sk_buff, dev);
866 emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
868 emit(ARM_CMP_I(r_scratch, 0), ctx);
869 emit_err_ret(ARM_COND_EQ, ctx);
871 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
873 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
876 if (code == (BPF_ANC | SKF_AD_IFINDEX)) {
877 off = offsetof(struct net_device, ifindex);
878 emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
881 * offset of field "type" in "struct
882 * net_device" is above what can be
883 * used in the ldrh rd, [rn, #imm]
884 * instruction, so load the offset in
885 * a register and use ldrh rd, [rn, rm]
887 off = offsetof(struct net_device, type);
888 emit_mov_i(ARM_R3, off, ctx);
889 emit(ARM_LDRH_R(r_A, r_scratch, ARM_R3), ctx);
892 case BPF_ANC | SKF_AD_MARK:
893 ctx->seen |= SEEN_SKB;
894 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
895 off = offsetof(struct sk_buff, mark);
896 emit(ARM_LDR_I(r_A, r_skb, off), ctx);
898 case BPF_ANC | SKF_AD_RXHASH:
899 ctx->seen |= SEEN_SKB;
900 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4);
901 off = offsetof(struct sk_buff, hash);
902 emit(ARM_LDR_I(r_A, r_skb, off), ctx);
904 case BPF_ANC | SKF_AD_VLAN_TAG:
905 case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
906 ctx->seen |= SEEN_SKB;
907 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2);
908 off = offsetof(struct sk_buff, vlan_tci);
909 emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
910 if (code == (BPF_ANC | SKF_AD_VLAN_TAG))
911 OP_IMM3(ARM_AND, r_A, r_A, ~VLAN_TAG_PRESENT, ctx);
913 OP_IMM3(ARM_LSR, r_A, r_A, 12, ctx);
914 OP_IMM3(ARM_AND, r_A, r_A, 0x1, ctx);
917 case BPF_ANC | SKF_AD_PKTTYPE:
918 ctx->seen |= SEEN_SKB;
919 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
920 __pkt_type_offset[0]) != 1);
921 off = PKT_TYPE_OFFSET();
922 emit(ARM_LDRB_I(r_A, r_skb, off), ctx);
923 emit(ARM_AND_I(r_A, r_A, PKT_TYPE_MAX), ctx);
924 #ifdef __BIG_ENDIAN_BITFIELD
925 emit(ARM_LSR_I(r_A, r_A, 5), ctx);
928 case BPF_ANC | SKF_AD_QUEUE:
929 ctx->seen |= SEEN_SKB;
930 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
931 queue_mapping) != 2);
932 BUILD_BUG_ON(offsetof(struct sk_buff,
933 queue_mapping) > 0xff);
934 off = offsetof(struct sk_buff, queue_mapping);
935 emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
937 case BPF_ANC | SKF_AD_PAY_OFFSET:
938 ctx->seen |= SEEN_SKB | SEEN_CALL;
940 emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
941 emit_mov_i(ARM_R3, (unsigned int)skb_get_poff, ctx);
942 emit_blx_r(ARM_R3, ctx);
943 emit(ARM_MOV_R(r_A, ARM_R0), ctx);
945 case BPF_LDX | BPF_W | BPF_ABS:
947 * load a 32bit word from struct seccomp_data.
948 * seccomp_check_filter() will already have checked
949 * that k is 32bit aligned and lies within the
950 * struct seccomp_data.
952 ctx->seen |= SEEN_SKB;
953 emit(ARM_LDR_I(r_A, r_skb, k), ctx);
959 if (ctx->flags & FLAG_IMM_OVERFLOW)
961 * this instruction generated an overflow when
962 * trying to access the literal pool, so
963 * delegate this filter to the kernel interpreter.
968 /* compute offsets only during the first pass */
969 if (ctx->target == NULL)
970 ctx->offsets[i] = ctx->idx * 4;
976 void bpf_jit_compile(struct bpf_prog *fp)
978 struct bpf_binary_header *header;
987 memset(&ctx, 0, sizeof(ctx));
989 ctx.ret0_fp_idx = -1;
991 ctx.offsets = kzalloc(4 * (ctx.skf->len + 1), GFP_KERNEL);
992 if (ctx.offsets == NULL)
995 /* fake pass to fill in the ctx->seen */
996 if (unlikely(build_body(&ctx)))
1000 build_prologue(&ctx);
1001 ctx.prologue_bytes = (ctx.idx - tmp_idx) * 4;
1003 #if __LINUX_ARM_ARCH__ < 7
1005 build_epilogue(&ctx);
1006 ctx.epilogue_bytes = (ctx.idx - tmp_idx) * 4;
1008 ctx.idx += ctx.imm_count;
1009 if (ctx.imm_count) {
1010 ctx.imms = kzalloc(4 * ctx.imm_count, GFP_KERNEL);
1011 if (ctx.imms == NULL)
1015 /* there's nothing after the epilogue on ARMv7 */
1016 build_epilogue(&ctx);
1018 alloc_size = 4 * ctx.idx;
1019 header = bpf_jit_binary_alloc(alloc_size, &target_ptr,
1024 ctx.target = (u32 *) target_ptr;
1027 build_prologue(&ctx);
1028 if (build_body(&ctx) < 0) {
1029 #if __LINUX_ARM_ARCH__ < 7
1033 bpf_jit_binary_free(header);
1036 build_epilogue(&ctx);
1038 flush_icache_range((u32)ctx.target, (u32)(ctx.target + ctx.idx));
1040 #if __LINUX_ARM_ARCH__ < 7
1045 if (bpf_jit_enable > 1)
1046 /* there are 2 passes here */
1047 bpf_jit_dump(fp->len, alloc_size, 2, ctx.target);
1049 set_memory_ro((unsigned long)header, header->pages);
1050 fp->bpf_func = (void *)ctx.target;
1057 void bpf_jit_free(struct bpf_prog *fp)
1059 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
1060 struct bpf_binary_header *header = (void *)addr;
1065 set_memory_rw(addr, header->pages);
1066 bpf_jit_binary_free(header);
1069 bpf_prog_unlock_free(fp);