2 * omap_hwmod macros, structures
4 * Copyright (C) 2009-2011 Nokia Corporation
7 * Created in collaboration with (alphabetical order): BenoƮt Cousson,
8 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
9 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
15 * These headers and macros are used to define OMAP on-chip module
16 * data and their integration with other OMAP modules and Linux.
17 * Copious documentation and references can also be found in the
18 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
22 * - add interconnect error log structures
24 * - init_conn_id_bit (CONNID_BIT_VECTOR)
25 * - implement default hwmod SMS/SDRC flags?
26 * - move Linux-specific data ("non-ROM data") out
29 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
30 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
32 #include <linux/kernel.h>
33 #include <linux/init.h>
34 #include <linux/list.h>
35 #include <linux/ioport.h>
36 #include <linux/spinlock.h>
38 #include <plat/voltage.h>
42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
46 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
47 * with the original PRCM protocol defined for OMAP2420
49 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
50 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
51 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
52 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
53 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
54 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
55 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
56 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
57 #define SYSC_TYPE1_SOFTRESET_SHIFT 1
58 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
59 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
60 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
64 * with the new PRCM protocol defined for new OMAP4 IPs.
66 #define SYSC_TYPE2_SOFTRESET_SHIFT 0
67 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
68 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2
69 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
70 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4
71 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
73 /* OCP SYSSTATUS bit shifts/masks */
74 #define SYSS_RESETDONE_SHIFT 0
75 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
77 /* Master standby/slave idle mode flags */
78 #define HWMOD_IDLEMODE_FORCE (1 << 0)
79 #define HWMOD_IDLEMODE_NO (1 << 1)
80 #define HWMOD_IDLEMODE_SMART (1 << 2)
81 /* Slave idle mode flag only */
82 #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3)
85 * struct omap_hwmod_mux_info - hwmod specific mux configuration
86 * @pads: array of omap_device_pad entries
87 * @nr_pads: number of omap_device_pad entries
89 * Note that this is currently built during init as needed.
91 struct omap_hwmod_mux_info {
93 struct omap_device_pad *pads;
97 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
98 * @name: name of the IRQ channel (module local name)
99 * @irq_ch: IRQ channel ID
101 * @name should be something short, e.g., "tx" or "rx". It is for use
102 * by platform_get_resource_byname(). It is defined locally to the
105 struct omap_hwmod_irq_info {
111 * struct omap_hwmod_dma_info - DMA channels used by the hwmod
112 * @name: name of the DMA channel (module local name)
113 * @dma_req: DMA request ID
115 * @name should be something short, e.g., "tx" or "rx". It is for use
116 * by platform_get_resource_byname(). It is defined locally to the
119 struct omap_hwmod_dma_info {
125 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
126 * @name: name of the reset line (module local name)
127 * @rst_shift: Offset of the reset bit
129 * @name should be something short, e.g., "cpu0" or "rst". It is defined
130 * locally to the hwmod.
132 struct omap_hwmod_rst_info {
138 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
139 * @role: "sys", "32k", "tv", etc -- for use in clk_get()
140 * @clk: opt clock: OMAP clock name
141 * @_clk: pointer to the struct clk (filled in at runtime)
143 * The module's interface clock and main functional clock should not
144 * be added as optional clocks.
146 struct omap_hwmod_opt_clk {
153 /* omap_hwmod_omap2_firewall.flags bits */
154 #define OMAP_FIREWALL_L3 (1 << 0)
155 #define OMAP_FIREWALL_L4 (1 << 1)
158 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
159 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
160 * @l4_fw_region: L4 firewall region ID
161 * @l4_prot_group: L4 protection group ID
162 * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
164 struct omap_hwmod_omap2_firewall {
173 * omap_hwmod_addr_space.flags bits
175 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
176 * ADDR_TYPE_RT: Address space contains module register target data.
178 #define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */
179 #define ADDR_TYPE_RT (1 << 1)
182 * struct omap_hwmod_addr_space - address space handled by the hwmod
183 * @name: name of the address space
184 * @pa_start: starting physical address
185 * @pa_end: ending physical address
186 * @flags: (see omap_hwmod_addr_space.flags macros above)
188 * Address space doesn't necessarily follow physical interconnect
189 * structure. GPMC is one example.
191 struct omap_hwmod_addr_space {
200 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
201 * interface to interact with the hwmod. Used to add sleep dependencies
202 * when the module is enabled or disabled.
204 #define OCP_USER_MPU (1 << 0)
205 #define OCP_USER_SDMA (1 << 1)
207 /* omap_hwmod_ocp_if.flags bits */
208 #define OCPIF_SWSUP_IDLE (1 << 0)
209 #define OCPIF_CAN_BURST (1 << 1)
212 * struct omap_hwmod_ocp_if - OCP interface data
213 * @master: struct omap_hwmod that initiates OCP transactions on this link
214 * @slave: struct omap_hwmod that responds to OCP transactions on this link
215 * @addr: address space associated with this link
216 * @clk: interface clock: OMAP clock name
217 * @_clk: pointer to the interface struct clk (filled in at runtime)
218 * @fw: interface firewall data
219 * @addr_cnt: ARRAY_SIZE(@addr)
220 * @width: OCP data width
221 * @user: initiators using this interface (see OCP_USER_* macros above)
222 * @flags: OCP interface flags (see OCPIF_* macros above)
224 * It may also be useful to add a tag_cnt field for OCP2.x devices.
226 * Parameter names beginning with an underscore are managed internally by
227 * the omap_hwmod code and should not be set during initialization.
229 struct omap_hwmod_ocp_if {
230 struct omap_hwmod *master;
231 struct omap_hwmod *slave;
232 struct omap_hwmod_addr_space *addr;
236 struct omap_hwmod_omap2_firewall omap2;
245 /* Macros for use in struct omap_hwmod_sysconfig */
247 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
248 #define MASTER_STANDBY_SHIFT 4
249 #define SLAVE_IDLE_SHIFT 0
250 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
251 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
252 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
253 #define SIDLE_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT)
254 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
255 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
256 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
258 /* omap_hwmod_sysconfig.sysc_flags capability flags */
259 #define SYSC_HAS_AUTOIDLE (1 << 0)
260 #define SYSC_HAS_SOFTRESET (1 << 1)
261 #define SYSC_HAS_ENAWAKEUP (1 << 2)
262 #define SYSC_HAS_EMUFREE (1 << 3)
263 #define SYSC_HAS_CLOCKACTIVITY (1 << 4)
264 #define SYSC_HAS_SIDLEMODE (1 << 5)
265 #define SYSC_HAS_MIDLEMODE (1 << 6)
266 #define SYSS_HAS_RESET_STATUS (1 << 7)
267 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
268 #define SYSC_HAS_RESET_STATUS (1 << 9)
270 /* omap_hwmod_sysconfig.clockact flags */
271 #define CLOCKACT_TEST_BOTH 0x0
272 #define CLOCKACT_TEST_MAIN 0x1
273 #define CLOCKACT_TEST_ICLK 0x2
274 #define CLOCKACT_TEST_NONE 0x3
277 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
278 * @midle_shift: Offset of the midle bit
279 * @clkact_shift: Offset of the clockactivity bit
280 * @sidle_shift: Offset of the sidle bit
281 * @enwkup_shift: Offset of the enawakeup bit
282 * @srst_shift: Offset of the softreset bit
283 * @autoidle_shift: Offset of the autoidle bit
285 struct omap_hwmod_sysc_fields {
295 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
296 * @rev_offs: IP block revision register offset (from module base addr)
297 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
298 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
299 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
300 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
301 * @clockact: the default value of the module CLOCKACTIVITY bits
303 * @clockact describes to the module which clocks are likely to be
304 * disabled when the PRCM issues its idle request to the module. Some
305 * modules have separate clockdomains for the interface clock and main
306 * functional clock, and can check whether they should acknowledge the
307 * idle request based on the internal module functionality that has
308 * been associated with the clocks marked in @clockact. This field is
309 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
311 * @sysc_fields: structure containing the offset positions of various bits in
312 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
313 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
314 * whether the device ip is compliant with the original PRCM protocol
315 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
316 * If the device follows a different scheme for the sysconfig register ,
317 * then this field has to be populated with the correct offset structure.
319 struct omap_hwmod_class_sysconfig {
326 struct omap_hwmod_sysc_fields *sysc_fields;
330 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
331 * @module_offs: PRCM submodule offset from the start of the PRM/CM
332 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
333 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
334 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
335 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
336 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
338 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
339 * WKEN, GRPSEL registers. In an ideal world, no extra information
340 * would be needed for IDLEST information, but alas, there are some
341 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
342 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
344 struct omap_hwmod_omap2_prcm {
355 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
356 * @clkctrl_reg: PRCM address of the clock control register
357 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
358 * @submodule_wkdep_bit: bit shift of the WKDEP range
360 struct omap_hwmod_omap4_prcm {
361 void __iomem *clkctrl_reg;
362 void __iomem *rstctrl_reg;
363 u8 submodule_wkdep_bit;
368 * omap_hwmod.flags definitions
370 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
371 * of idle, rather than relying on module smart-idle
372 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
373 * of standby, rather than relying on module smart-standby
374 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
375 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file
376 * XXX Should be HWMOD_SETUP_NO_RESET
377 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
378 * controller, etc. XXX probably belongs outside the main hwmod file
379 * XXX Should be HWMOD_SETUP_NO_IDLE
380 * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
381 * when module is enabled, rather than the default, which is to
383 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
384 * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
385 * only for few initiator modules on OMAP2 & 3.
386 * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
387 * This is needed for devices like DSS that require optional clocks enabled
388 * in order to complete the reset. Optional clocks will be disabled
389 * again after the reset.
390 * HWMOD_16BIT_REG: Module has 16bit registers
392 #define HWMOD_SWSUP_SIDLE (1 << 0)
393 #define HWMOD_SWSUP_MSTANDBY (1 << 1)
394 #define HWMOD_INIT_NO_RESET (1 << 2)
395 #define HWMOD_INIT_NO_IDLE (1 << 3)
396 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
397 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
398 #define HWMOD_NO_IDLEST (1 << 6)
399 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
400 #define HWMOD_16BIT_REG (1 << 8)
403 * omap_hwmod._int_flags definitions
404 * These are for internal use only and are managed by the omap_hwmod code.
406 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
407 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
408 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
410 #define _HWMOD_NO_MPU_PORT (1 << 0)
411 #define _HWMOD_WAKEUP_ENABLED (1 << 1)
412 #define _HWMOD_SYSCONFIG_LOADED (1 << 2)
415 * omap_hwmod._state definitions
417 * INITIALIZED: reset (optionally), initialized, enabled, disabled
422 #define _HWMOD_STATE_UNKNOWN 0
423 #define _HWMOD_STATE_REGISTERED 1
424 #define _HWMOD_STATE_CLKS_INITED 2
425 #define _HWMOD_STATE_INITIALIZED 3
426 #define _HWMOD_STATE_ENABLED 4
427 #define _HWMOD_STATE_IDLE 5
428 #define _HWMOD_STATE_DISABLED 6
431 * struct omap_hwmod_class - the type of an IP block
432 * @name: name of the hwmod_class
433 * @sysc: device SYSCONFIG/SYSSTATUS register data
434 * @rev: revision of the IP class
435 * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
436 * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
438 * Represent the class of a OMAP hardware "modules" (e.g. timer,
439 * smartreflex, gpio, uart...)
441 * @pre_shutdown is a function that will be run immediately before
442 * hwmod clocks are disabled, etc. It is intended for use for hwmods
443 * like the MPU watchdog, which cannot be disabled with the standard
444 * omap_hwmod_shutdown(). The function should return 0 upon success,
445 * or some negative error upon failure. Returning an error will cause
446 * omap_hwmod_shutdown() to abort the device shutdown and return an
449 * If @reset is defined, then the function it points to will be
450 * executed in place of the standard hwmod _reset() code in
451 * mach-omap2/omap_hwmod.c. This is needed for IP blocks which have
452 * unusual reset sequences - usually processor IP blocks like the IVA.
454 struct omap_hwmod_class {
456 struct omap_hwmod_class_sysconfig *sysc;
458 int (*pre_shutdown)(struct omap_hwmod *oh);
459 int (*reset)(struct omap_hwmod *oh);
463 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
464 * @name: name of the hwmod
465 * @class: struct omap_hwmod_class * to the class of this hwmod
466 * @od: struct omap_device currently associated with this hwmod (internal use)
467 * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
468 * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
469 * @prcm: PRCM data pertaining to this hwmod
470 * @main_clk: main clock: OMAP clock name
471 * @_clk: pointer to the main struct clk (filled in at runtime)
472 * @opt_clks: other device clocks that drivers can request (0..*)
473 * @vdd_name: voltage domain name
474 * @voltdm: pointer to voltage domain (filled in at runtime)
475 * @masters: ptr to array of OCP ifs that this hwmod can initiate on
476 * @slaves: ptr to array of OCP ifs that this hwmod can respond on
477 * @dev_attr: arbitrary device attributes that can be passed to the driver
478 * @_sysc_cache: internal-use hwmod flags
479 * @_mpu_rt_va: cached register target start address (internal use)
480 * @_mpu_port_index: cached MPU register target slave ID (internal use)
481 * @mpu_irqs_cnt: number of @mpu_irqs
482 * @sdma_reqs_cnt: number of @sdma_reqs
483 * @opt_clks_cnt: number of @opt_clks
484 * @master_cnt: number of @master entries
485 * @slaves_cnt: number of @slave entries
486 * @response_lat: device OCP response latency (in interface clock cycles)
487 * @_int_flags: internal-use hwmod flags
488 * @_state: internal-use hwmod state
489 * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
490 * @flags: hwmod flags (documented below)
491 * @omap_chip: OMAP chips this hwmod is present on
492 * @_lock: spinlock serializing operations on this hwmod
493 * @node: list node for hwmod list (internal use)
495 * @main_clk refers to this module's "main clock," which for our
496 * purposes is defined as "the functional clock needed for register
497 * accesses to complete." Modules may not have a main clock if the
498 * interface clock also serves as a main clock.
500 * Parameter names beginning with an underscore are managed internally by
501 * the omap_hwmod code and should not be set during initialization.
505 struct omap_hwmod_class *class;
506 struct omap_device *od;
507 struct omap_hwmod_mux_info *mux;
508 struct omap_hwmod_irq_info *mpu_irqs;
509 struct omap_hwmod_dma_info *sdma_reqs;
510 struct omap_hwmod_rst_info *rst_lines;
512 struct omap_hwmod_omap2_prcm omap2;
513 struct omap_hwmod_omap4_prcm omap4;
515 const char *main_clk;
517 struct omap_hwmod_opt_clk *opt_clks;
519 struct voltagedomain *voltdm;
520 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
521 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
524 void __iomem *_mpu_rt_va;
526 struct list_head node;
540 const struct omap_chip_id omap_chip;
543 int omap_hwmod_register(struct omap_hwmod **ohs);
544 struct omap_hwmod *omap_hwmod_lookup(const char *name);
545 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
548 int __init omap_hwmod_setup_one(const char *name);
550 int omap_hwmod_enable(struct omap_hwmod *oh);
551 int _omap_hwmod_enable(struct omap_hwmod *oh);
552 int omap_hwmod_idle(struct omap_hwmod *oh);
553 int _omap_hwmod_idle(struct omap_hwmod *oh);
554 int omap_hwmod_shutdown(struct omap_hwmod *oh);
556 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
557 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
558 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
560 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
561 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
563 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
564 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
566 int omap_hwmod_reset(struct omap_hwmod *oh);
567 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
569 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
570 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
572 int omap_hwmod_count_resources(struct omap_hwmod *oh);
573 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
575 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
576 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
578 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
579 struct omap_hwmod *init_oh);
580 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
581 struct omap_hwmod *init_oh);
583 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
584 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
585 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
586 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
588 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
589 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
591 int omap_hwmod_for_each_by_class(const char *classname,
592 int (*fn)(struct omap_hwmod *oh,
596 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
597 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
599 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
602 * Chip variant-specific hwmod init routines - XXX should be converted
603 * to use initcalls once the initial boot ordering is straightened out
605 extern int omap2420_hwmod_init(void);
606 extern int omap2430_hwmod_init(void);
607 extern int omap3xxx_hwmod_init(void);
608 extern int omap44xx_hwmod_init(void);