2 * omap_hwmod macros, structures
4 * Copyright (C) 2009-2010 Nokia Corporation
7 * Created in collaboration with (alphabetical order): BenoƮt Cousson,
8 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
9 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
15 * These headers and macros are used to define OMAP on-chip module
16 * data and their integration with other OMAP modules and Linux.
19 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
20 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
21 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
22 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
23 * - Open Core Protocol Specification 2.2
26 * - add interconnect error log structures
28 * - init_conn_id_bit (CONNID_BIT_VECTOR)
29 * - implement default hwmod SMS/SDRC flags?
32 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
33 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
35 #include <linux/kernel.h>
36 #include <linux/list.h>
37 #include <linux/ioport.h>
38 #include <linux/mutex.h>
43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
44 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
47 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
48 * with the original PRCM protocol defined for OMAP2420
50 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
51 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
52 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
53 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
54 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
55 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
56 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
57 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
58 #define SYSC_TYPE1_SOFTRESET_SHIFT 1
59 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
60 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
61 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
64 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
65 * with the new PRCM protocol defined for new OMAP4 IPs.
67 #define SYSC_TYPE2_SOFTRESET_SHIFT 0
68 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
69 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2
70 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
71 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4
72 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
74 /* OCP SYSSTATUS bit shifts/masks */
75 #define SYSS_RESETDONE_SHIFT 0
76 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
78 /* Master standby/slave idle mode flags */
79 #define HWMOD_IDLEMODE_FORCE (1 << 0)
80 #define HWMOD_IDLEMODE_NO (1 << 1)
81 #define HWMOD_IDLEMODE_SMART (1 << 2)
84 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
85 * @name: name of the IRQ channel (module local name)
86 * @irq_ch: IRQ channel ID
88 * @name should be something short, e.g., "tx" or "rx". It is for use
89 * by platform_get_resource_byname(). It is defined locally to the
92 struct omap_hwmod_irq_info {
98 * struct omap_hwmod_dma_info - DMA channels used by the hwmod
99 * @name: name of the DMA channel (module local name)
100 * @dma_req: DMA request ID
102 * @name should be something short, e.g., "tx" or "rx". It is for use
103 * by platform_get_resource_byname(). It is defined locally to the
106 struct omap_hwmod_dma_info {
112 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
113 * @name: name of the reset line (module local name)
114 * @rst_shift: Offset of the reset bit
116 * @name should be something short, e.g., "cpu0" or "rst". It is defined
117 * locally to the hwmod.
119 struct omap_hwmod_rst_info {
125 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
126 * @role: "sys", "32k", "tv", etc -- for use in clk_get()
127 * @clk: opt clock: OMAP clock name
128 * @_clk: pointer to the struct clk (filled in at runtime)
130 * The module's interface clock and main functional clock should not
131 * be added as optional clocks.
133 struct omap_hwmod_opt_clk {
140 /* omap_hwmod_omap2_firewall.flags bits */
141 #define OMAP_FIREWALL_L3 (1 << 0)
142 #define OMAP_FIREWALL_L4 (1 << 1)
145 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
146 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
147 * @l4_fw_region: L4 firewall region ID
148 * @l4_prot_group: L4 protection group ID
149 * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
151 struct omap_hwmod_omap2_firewall {
160 * omap_hwmod_addr_space.flags bits
162 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
163 * ADDR_TYPE_RT: Address space contains module register target data.
165 #define ADDR_MAP_ON_INIT (1 << 0)
166 #define ADDR_TYPE_RT (1 << 1)
169 * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
170 * @pa_start: starting physical address
171 * @pa_end: ending physical address
172 * @flags: (see omap_hwmod_addr_space.flags macros above)
174 * Address space doesn't necessarily follow physical interconnect
175 * structure. GPMC is one example.
177 struct omap_hwmod_addr_space {
185 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
186 * interface to interact with the hwmod. Used to add sleep dependencies
187 * when the module is enabled or disabled.
189 #define OCP_USER_MPU (1 << 0)
190 #define OCP_USER_SDMA (1 << 1)
192 /* omap_hwmod_ocp_if.flags bits */
193 #define OCPIF_SWSUP_IDLE (1 << 0)
194 #define OCPIF_CAN_BURST (1 << 1)
197 * struct omap_hwmod_ocp_if - OCP interface data
198 * @master: struct omap_hwmod that initiates OCP transactions on this link
199 * @slave: struct omap_hwmod that responds to OCP transactions on this link
200 * @addr: address space associated with this link
201 * @clk: interface clock: OMAP clock name
202 * @_clk: pointer to the interface struct clk (filled in at runtime)
203 * @fw: interface firewall data
204 * @addr_cnt: ARRAY_SIZE(@addr)
205 * @width: OCP data width
206 * @thread_cnt: number of threads
207 * @max_burst_len: maximum burst length in @width sized words (0 if unlimited)
208 * @user: initiators using this interface (see OCP_USER_* macros above)
209 * @flags: OCP interface flags (see OCPIF_* macros above)
211 * It may also be useful to add a tag_cnt field for OCP2.x devices.
213 * Parameter names beginning with an underscore are managed internally by
214 * the omap_hwmod code and should not be set during initialization.
216 struct omap_hwmod_ocp_if {
217 struct omap_hwmod *master;
218 struct omap_hwmod *slave;
219 struct omap_hwmod_addr_space *addr;
223 struct omap_hwmod_omap2_firewall omap2;
234 /* Macros for use in struct omap_hwmod_sysconfig */
236 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
237 #define MASTER_STANDBY_SHIFT 2
238 #define SLAVE_IDLE_SHIFT 0
239 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
240 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
241 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
242 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
243 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
244 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
246 /* omap_hwmod_sysconfig.sysc_flags capability flags */
247 #define SYSC_HAS_AUTOIDLE (1 << 0)
248 #define SYSC_HAS_SOFTRESET (1 << 1)
249 #define SYSC_HAS_ENAWAKEUP (1 << 2)
250 #define SYSC_HAS_EMUFREE (1 << 3)
251 #define SYSC_HAS_CLOCKACTIVITY (1 << 4)
252 #define SYSC_HAS_SIDLEMODE (1 << 5)
253 #define SYSC_HAS_MIDLEMODE (1 << 6)
254 #define SYSS_MISSING (1 << 7)
255 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
257 /* omap_hwmod_sysconfig.clockact flags */
258 #define CLOCKACT_TEST_BOTH 0x0
259 #define CLOCKACT_TEST_MAIN 0x1
260 #define CLOCKACT_TEST_ICLK 0x2
261 #define CLOCKACT_TEST_NONE 0x3
264 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
265 * @midle_shift: Offset of the midle bit
266 * @clkact_shift: Offset of the clockactivity bit
267 * @sidle_shift: Offset of the sidle bit
268 * @enwkup_shift: Offset of the enawakeup bit
269 * @srst_shift: Offset of the softreset bit
270 * @autoidle_shift: Offset of the autoidle bit
272 struct omap_hwmod_sysc_fields {
282 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
283 * @rev_offs: IP block revision register offset (from module base addr)
284 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
285 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
286 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
287 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
288 * @clockact: the default value of the module CLOCKACTIVITY bits
290 * @clockact describes to the module which clocks are likely to be
291 * disabled when the PRCM issues its idle request to the module. Some
292 * modules have separate clockdomains for the interface clock and main
293 * functional clock, and can check whether they should acknowledge the
294 * idle request based on the internal module functionality that has
295 * been associated with the clocks marked in @clockact. This field is
296 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
298 * @sysc_fields: structure containing the offset positions of various bits in
299 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
300 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
301 * whether the device ip is compliant with the original PRCM protocol
302 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
303 * If the device follows a different scheme for the sysconfig register ,
304 * then this field has to be populated with the correct offset structure.
306 struct omap_hwmod_class_sysconfig {
313 struct omap_hwmod_sysc_fields *sysc_fields;
317 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
318 * @module_offs: PRCM submodule offset from the start of the PRM/CM
319 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
320 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
321 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
322 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
323 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
325 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
326 * WKEN, GRPSEL registers. In an ideal world, no extra information
327 * would be needed for IDLEST information, but alas, there are some
328 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
329 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
331 struct omap_hwmod_omap2_prcm {
342 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
343 * @clkctrl_reg: PRCM address of the clock control register
344 * @rstctrl_reg: adress of the XXX_RSTCTRL register located in the PRM
345 * @submodule_wkdep_bit: bit shift of the WKDEP range
347 struct omap_hwmod_omap4_prcm {
348 void __iomem *clkctrl_reg;
349 void __iomem *rstctrl_reg;
350 u8 submodule_wkdep_bit;
355 * omap_hwmod.flags definitions
357 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
358 * of idle, rather than relying on module smart-idle
359 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
360 * of standby, rather than relying on module smart-standby
361 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
362 * SDRAM controller, etc.
363 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
365 * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
366 * when module is enabled, rather than the default, which is to
368 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
369 * HWMOD_NO_IDLEST : this module does not have idle status - this is the case
370 * only for few initiator modules on OMAP2 & 3.
372 #define HWMOD_SWSUP_SIDLE (1 << 0)
373 #define HWMOD_SWSUP_MSTANDBY (1 << 1)
374 #define HWMOD_INIT_NO_RESET (1 << 2)
375 #define HWMOD_INIT_NO_IDLE (1 << 3)
376 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
377 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
378 #define HWMOD_NO_IDLEST (1 << 6)
381 * omap_hwmod._int_flags definitions
382 * These are for internal use only and are managed by the omap_hwmod code.
384 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
385 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
386 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
388 #define _HWMOD_NO_MPU_PORT (1 << 0)
389 #define _HWMOD_WAKEUP_ENABLED (1 << 1)
390 #define _HWMOD_SYSCONFIG_LOADED (1 << 2)
393 * omap_hwmod._state definitions
395 * INITIALIZED: reset (optionally), initialized, enabled, disabled
400 #define _HWMOD_STATE_UNKNOWN 0
401 #define _HWMOD_STATE_REGISTERED 1
402 #define _HWMOD_STATE_CLKS_INITED 2
403 #define _HWMOD_STATE_INITIALIZED 3
404 #define _HWMOD_STATE_ENABLED 4
405 #define _HWMOD_STATE_IDLE 5
406 #define _HWMOD_STATE_DISABLED 6
409 * struct omap_hwmod_class - the type of an IP block
410 * @name: name of the hwmod_class
411 * @sysc: device SYSCONFIG/SYSSTATUS register data
412 * @rev: revision of the IP class
414 * Represent the class of a OMAP hardware "modules" (e.g. timer,
415 * smartreflex, gpio, uart...)
417 struct omap_hwmod_class {
419 struct omap_hwmod_class_sysconfig *sysc;
424 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
425 * @name: name of the hwmod
426 * @class: struct omap_hwmod_class * to the class of this hwmod
427 * @od: struct omap_device currently associated with this hwmod (internal use)
428 * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
429 * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
430 * @prcm: PRCM data pertaining to this hwmod
431 * @main_clk: main clock: OMAP clock name
432 * @_clk: pointer to the main struct clk (filled in at runtime)
433 * @opt_clks: other device clocks that drivers can request (0..*)
434 * @masters: ptr to array of OCP ifs that this hwmod can initiate on
435 * @slaves: ptr to array of OCP ifs that this hwmod can respond on
436 * @dev_attr: arbitrary device attributes that can be passed to the driver
437 * @_sysc_cache: internal-use hwmod flags
438 * @_mpu_rt_va: cached register target start address (internal use)
439 * @_mpu_port_index: cached MPU register target slave ID (internal use)
440 * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
441 * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
442 * @mpu_irqs_cnt: number of @mpu_irqs
443 * @sdma_reqs_cnt: number of @sdma_reqs
444 * @opt_clks_cnt: number of @opt_clks
445 * @master_cnt: number of @master entries
446 * @slaves_cnt: number of @slave entries
447 * @response_lat: device OCP response latency (in interface clock cycles)
448 * @_int_flags: internal-use hwmod flags
449 * @_state: internal-use hwmod state
450 * @flags: hwmod flags (documented below)
451 * @omap_chip: OMAP chips this hwmod is present on
452 * @_mutex: mutex serializing operations on this hwmod
453 * @node: list node for hwmod list (internal use)
455 * @main_clk refers to this module's "main clock," which for our
456 * purposes is defined as "the functional clock needed for register
457 * accesses to complete." Modules may not have a main clock if the
458 * interface clock also serves as a main clock.
460 * Parameter names beginning with an underscore are managed internally by
461 * the omap_hwmod code and should not be set during initialization.
465 struct omap_hwmod_class *class;
466 struct omap_device *od;
467 struct omap_hwmod_irq_info *mpu_irqs;
468 struct omap_hwmod_dma_info *sdma_reqs;
469 struct omap_hwmod_rst_info *rst_lines;
471 struct omap_hwmod_omap2_prcm omap2;
472 struct omap_hwmod_omap4_prcm omap4;
474 const char *main_clk;
476 struct omap_hwmod_opt_clk *opt_clks;
477 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
478 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
481 void __iomem *_mpu_rt_va;
483 struct list_head node;
486 u8 msuspendmux_reg_id;
487 u8 msuspendmux_shift;
498 const struct omap_chip_id omap_chip;
501 int omap_hwmod_init(struct omap_hwmod **ohs);
502 int omap_hwmod_register(struct omap_hwmod *oh);
503 int omap_hwmod_unregister(struct omap_hwmod *oh);
504 struct omap_hwmod *omap_hwmod_lookup(const char *name);
505 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
507 int omap_hwmod_late_init(u8 skip_setup_idle);
509 int omap_hwmod_enable(struct omap_hwmod *oh);
510 int _omap_hwmod_enable(struct omap_hwmod *oh);
511 int omap_hwmod_idle(struct omap_hwmod *oh);
512 int _omap_hwmod_idle(struct omap_hwmod *oh);
513 int omap_hwmod_shutdown(struct omap_hwmod *oh);
515 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
516 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
517 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
519 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
520 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
522 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
524 int omap_hwmod_reset(struct omap_hwmod *oh);
525 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
527 void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs);
528 u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs);
530 int omap_hwmod_count_resources(struct omap_hwmod *oh);
531 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
533 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
534 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
536 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
537 struct omap_hwmod *init_oh);
538 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
539 struct omap_hwmod *init_oh);
541 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
542 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
543 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
544 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
546 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
547 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
549 int omap_hwmod_for_each_by_class(const char *classname,
550 int (*fn)(struct omap_hwmod *oh,
555 * Chip variant-specific hwmod init routines - XXX should be converted
556 * to use initcalls once the initial boot ordering is straightened out
558 extern int omap2420_hwmod_init(void);
559 extern int omap2430_hwmod_init(void);
560 extern int omap3xxx_hwmod_init(void);