2 * omap iommu: tlb and pagetable primitives
4 * Copyright (C) 2008-2009 Nokia Corporation
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>,
7 * Paul Mundt and Toshihiro Kobayashi
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/err.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/clk.h>
19 #include <linux/platform_device.h>
21 #include <asm/cacheflush.h>
23 #include <mach/iommu.h>
25 #include "iopgtable.h"
27 /* accommodate the difference between omap1 and omap2/3 */
28 static const struct iommu_functions *arch_iommu;
30 static struct platform_driver omap_iommu_driver;
31 static struct kmem_cache *iopte_cachep;
34 * install_iommu_arch - Install archtecure specific iommu functions
35 * @ops: a pointer to architecture specific iommu functions
37 * There are several kind of iommu algorithm(tlb, pagetable) among
38 * omap series. This interface installs such an iommu algorighm.
40 int install_iommu_arch(const struct iommu_functions *ops)
48 EXPORT_SYMBOL_GPL(install_iommu_arch);
51 * uninstall_iommu_arch - Uninstall archtecure specific iommu functions
52 * @ops: a pointer to architecture specific iommu functions
54 * This interface uninstalls the iommu algorighm installed previously.
56 void uninstall_iommu_arch(const struct iommu_functions *ops)
58 if (arch_iommu != ops)
59 pr_err("%s: not your arch\n", __func__);
63 EXPORT_SYMBOL_GPL(uninstall_iommu_arch);
66 * iommu_save_ctx - Save registers for pm off-mode support
69 void iommu_save_ctx(struct iommu *obj)
71 arch_iommu->save_ctx(obj);
73 EXPORT_SYMBOL_GPL(iommu_save_ctx);
76 * iommu_restore_ctx - Restore registers for pm off-mode support
79 void iommu_restore_ctx(struct iommu *obj)
81 arch_iommu->restore_ctx(obj);
83 EXPORT_SYMBOL_GPL(iommu_restore_ctx);
86 * iommu_arch_version - Return running iommu arch version
88 u32 iommu_arch_version(void)
90 return arch_iommu->version;
92 EXPORT_SYMBOL_GPL(iommu_arch_version);
94 static int iommu_enable(struct iommu *obj)
101 clk_enable(obj->clk);
103 err = arch_iommu->enable(obj);
105 clk_disable(obj->clk);
109 static void iommu_disable(struct iommu *obj)
114 clk_enable(obj->clk);
116 arch_iommu->disable(obj);
118 clk_disable(obj->clk);
124 void iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e)
128 arch_iommu->cr_to_e(cr, e);
130 EXPORT_SYMBOL_GPL(iotlb_cr_to_e);
132 static inline int iotlb_cr_valid(struct cr_regs *cr)
137 return arch_iommu->cr_valid(cr);
140 static inline struct cr_regs *iotlb_alloc_cr(struct iommu *obj,
141 struct iotlb_entry *e)
146 return arch_iommu->alloc_cr(obj, e);
149 u32 iotlb_cr_to_virt(struct cr_regs *cr)
151 return arch_iommu->cr_to_virt(cr);
153 EXPORT_SYMBOL_GPL(iotlb_cr_to_virt);
155 static u32 get_iopte_attr(struct iotlb_entry *e)
157 return arch_iommu->get_pte_attr(e);
160 static u32 iommu_report_fault(struct iommu *obj, u32 *da)
162 return arch_iommu->fault_isr(obj, da);
165 static void iotlb_lock_get(struct iommu *obj, struct iotlb_lock *l)
169 val = iommu_read_reg(obj, MMU_LOCK);
171 l->base = MMU_LOCK_BASE(val);
172 l->vict = MMU_LOCK_VICT(val);
174 BUG_ON(l->base != 0); /* Currently no preservation is used */
177 static void iotlb_lock_set(struct iommu *obj, struct iotlb_lock *l)
181 BUG_ON(l->base != 0); /* Currently no preservation is used */
183 val = (l->base << MMU_LOCK_BASE_SHIFT);
184 val |= (l->vict << MMU_LOCK_VICT_SHIFT);
186 iommu_write_reg(obj, val, MMU_LOCK);
189 static void iotlb_read_cr(struct iommu *obj, struct cr_regs *cr)
191 arch_iommu->tlb_read_cr(obj, cr);
194 static void iotlb_load_cr(struct iommu *obj, struct cr_regs *cr)
196 arch_iommu->tlb_load_cr(obj, cr);
198 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
199 iommu_write_reg(obj, 1, MMU_LD_TLB);
203 * iotlb_dump_cr - Dump an iommu tlb entry into buf
205 * @cr: contents of cam and ram register
206 * @buf: output buffer
208 static inline ssize_t iotlb_dump_cr(struct iommu *obj, struct cr_regs *cr,
213 return arch_iommu->dump_cr(obj, cr, buf);
217 * load_iotlb_entry - Set an iommu tlb entry
219 * @e: an iommu tlb entry info
221 int load_iotlb_entry(struct iommu *obj, struct iotlb_entry *e)
228 if (!obj || !obj->nr_tlb_entries || !e)
231 clk_enable(obj->clk);
233 for (i = 0; i < obj->nr_tlb_entries; i++) {
236 iotlb_lock_get(obj, &l);
238 iotlb_lock_set(obj, &l);
239 iotlb_read_cr(obj, &tmp);
240 if (!iotlb_cr_valid(&tmp))
244 if (i == obj->nr_tlb_entries) {
245 dev_dbg(obj->dev, "%s: full: no entry\n", __func__);
250 cr = iotlb_alloc_cr(obj, e);
252 clk_disable(obj->clk);
256 iotlb_load_cr(obj, cr);
259 /* increment victim for next tlb load */
260 if (++l.vict == obj->nr_tlb_entries)
262 iotlb_lock_set(obj, &l);
264 clk_disable(obj->clk);
267 EXPORT_SYMBOL_GPL(load_iotlb_entry);
270 * flush_iotlb_page - Clear an iommu tlb entry
272 * @da: iommu device virtual address
274 * Clear an iommu tlb entry which includes 'da' address.
276 void flush_iotlb_page(struct iommu *obj, u32 da)
281 clk_enable(obj->clk);
283 for (i = 0; i < obj->nr_tlb_entries; i++) {
288 iotlb_lock_get(obj, &l);
290 iotlb_lock_set(obj, &l);
291 iotlb_read_cr(obj, &cr);
292 if (!iotlb_cr_valid(&cr))
295 start = iotlb_cr_to_virt(&cr);
296 bytes = iopgsz_to_bytes(cr.cam & 3);
298 if ((start <= da) && (da < start + bytes)) {
299 dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n",
300 __func__, start, da, bytes);
301 iotlb_load_cr(obj, &cr);
302 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
305 clk_disable(obj->clk);
307 if (i == obj->nr_tlb_entries)
308 dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da);
310 EXPORT_SYMBOL_GPL(flush_iotlb_page);
313 * flush_iotlb_range - Clear an iommu tlb entries
315 * @start: iommu device virtual address(start)
316 * @end: iommu device virtual address(end)
318 * Clear an iommu tlb entry which includes 'da' address.
320 void flush_iotlb_range(struct iommu *obj, u32 start, u32 end)
325 flush_iotlb_page(obj, da);
326 /* FIXME: Optimize for multiple page size */
330 EXPORT_SYMBOL_GPL(flush_iotlb_range);
333 * flush_iotlb_all - Clear all iommu tlb entries
336 void flush_iotlb_all(struct iommu *obj)
340 clk_enable(obj->clk);
344 iotlb_lock_set(obj, &l);
346 iommu_write_reg(obj, 1, MMU_GFLUSH);
348 clk_disable(obj->clk);
350 EXPORT_SYMBOL_GPL(flush_iotlb_all);
352 #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
354 ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes)
359 clk_enable(obj->clk);
361 bytes = arch_iommu->dump_ctx(obj, buf, bytes);
363 clk_disable(obj->clk);
367 EXPORT_SYMBOL_GPL(iommu_dump_ctx);
369 static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs, int num)
372 struct iotlb_lock saved, l;
373 struct cr_regs *p = crs;
375 clk_enable(obj->clk);
377 iotlb_lock_get(obj, &saved);
378 memcpy(&l, &saved, sizeof(saved));
380 for (i = 0; i < num; i++) {
383 iotlb_lock_get(obj, &l);
385 iotlb_lock_set(obj, &l);
386 iotlb_read_cr(obj, &tmp);
387 if (!iotlb_cr_valid(&tmp))
392 iotlb_lock_set(obj, &saved);
393 clk_disable(obj->clk);
399 * dump_tlb_entries - dump cr arrays to given buffer
401 * @buf: output buffer
403 size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t bytes)
409 num = bytes / sizeof(*cr);
410 num = min(obj->nr_tlb_entries, num);
412 cr = kcalloc(num, sizeof(*cr), GFP_KERNEL);
416 num = __dump_tlb_entries(obj, cr, num);
417 for (i = 0; i < num; i++)
418 p += iotlb_dump_cr(obj, cr + i, p);
423 EXPORT_SYMBOL_GPL(dump_tlb_entries);
425 int foreach_iommu_device(void *data, int (*fn)(struct device *, void *))
427 return driver_for_each_device(&omap_iommu_driver.driver,
430 EXPORT_SYMBOL_GPL(foreach_iommu_device);
432 #endif /* CONFIG_OMAP_IOMMU_DEBUG_MODULE */
435 * H/W pagetable operations
437 static void flush_iopgd_range(u32 *first, u32 *last)
439 /* FIXME: L2 cache should be taken care of if it exists */
441 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd"
443 first += L1_CACHE_BYTES / sizeof(*first);
444 } while (first <= last);
447 static void flush_iopte_range(u32 *first, u32 *last)
449 /* FIXME: L2 cache should be taken care of if it exists */
451 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte"
453 first += L1_CACHE_BYTES / sizeof(*first);
454 } while (first <= last);
457 static void iopte_free(u32 *iopte)
459 /* Note: freed iopte's must be clean ready for re-use */
460 kmem_cache_free(iopte_cachep, iopte);
463 static u32 *iopte_alloc(struct iommu *obj, u32 *iopgd, u32 da)
467 /* a table has already existed */
472 * do the allocation outside the page table lock
474 spin_unlock(&obj->page_table_lock);
475 iopte = kmem_cache_zalloc(iopte_cachep, GFP_KERNEL);
476 spin_lock(&obj->page_table_lock);
480 return ERR_PTR(-ENOMEM);
482 *iopgd = virt_to_phys(iopte) | IOPGD_TABLE;
483 flush_iopgd_range(iopgd, iopgd);
485 dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte);
487 /* We raced, free the reduniovant table */
492 iopte = iopte_offset(iopgd, da);
495 "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n",
496 __func__, da, iopgd, *iopgd, iopte, *iopte);
501 static int iopgd_alloc_section(struct iommu *obj, u32 da, u32 pa, u32 prot)
503 u32 *iopgd = iopgd_offset(obj, da);
505 *iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION;
506 flush_iopgd_range(iopgd, iopgd);
510 static int iopgd_alloc_super(struct iommu *obj, u32 da, u32 pa, u32 prot)
512 u32 *iopgd = iopgd_offset(obj, da);
515 for (i = 0; i < 16; i++)
516 *(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER;
517 flush_iopgd_range(iopgd, iopgd + 15);
521 static int iopte_alloc_page(struct iommu *obj, u32 da, u32 pa, u32 prot)
523 u32 *iopgd = iopgd_offset(obj, da);
524 u32 *iopte = iopte_alloc(obj, iopgd, da);
527 return PTR_ERR(iopte);
529 *iopte = (pa & IOPAGE_MASK) | prot | IOPTE_SMALL;
530 flush_iopte_range(iopte, iopte);
532 dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n",
533 __func__, da, pa, iopte, *iopte);
538 static int iopte_alloc_large(struct iommu *obj, u32 da, u32 pa, u32 prot)
540 u32 *iopgd = iopgd_offset(obj, da);
541 u32 *iopte = iopte_alloc(obj, iopgd, da);
545 return PTR_ERR(iopte);
547 for (i = 0; i < 16; i++)
548 *(iopte + i) = (pa & IOLARGE_MASK) | prot | IOPTE_LARGE;
549 flush_iopte_range(iopte, iopte + 15);
553 static int iopgtable_store_entry_core(struct iommu *obj, struct iotlb_entry *e)
555 int (*fn)(struct iommu *, u32, u32, u32);
563 case MMU_CAM_PGSZ_16M:
564 fn = iopgd_alloc_super;
566 case MMU_CAM_PGSZ_1M:
567 fn = iopgd_alloc_section;
569 case MMU_CAM_PGSZ_64K:
570 fn = iopte_alloc_large;
572 case MMU_CAM_PGSZ_4K:
573 fn = iopte_alloc_page;
581 prot = get_iopte_attr(e);
583 spin_lock(&obj->page_table_lock);
584 err = fn(obj, e->da, e->pa, prot);
585 spin_unlock(&obj->page_table_lock);
591 * iopgtable_store_entry - Make an iommu pte entry
593 * @e: an iommu tlb entry info
595 int iopgtable_store_entry(struct iommu *obj, struct iotlb_entry *e)
599 flush_iotlb_page(obj, e->da);
600 err = iopgtable_store_entry_core(obj, e);
601 #ifdef PREFETCH_IOTLB
603 load_iotlb_entry(obj, e);
607 EXPORT_SYMBOL_GPL(iopgtable_store_entry);
610 * iopgtable_lookup_entry - Lookup an iommu pte entry
612 * @da: iommu device virtual address
613 * @ppgd: iommu pgd entry pointer to be returned
614 * @ppte: iommu pte entry pointer to be returned
616 void iopgtable_lookup_entry(struct iommu *obj, u32 da, u32 **ppgd, u32 **ppte)
618 u32 *iopgd, *iopte = NULL;
620 iopgd = iopgd_offset(obj, da);
624 if (*iopgd & IOPGD_TABLE)
625 iopte = iopte_offset(iopgd, da);
630 EXPORT_SYMBOL_GPL(iopgtable_lookup_entry);
632 static size_t iopgtable_clear_entry_core(struct iommu *obj, u32 da)
635 u32 *iopgd = iopgd_offset(obj, da);
641 if (*iopgd & IOPGD_TABLE) {
643 u32 *iopte = iopte_offset(iopgd, da);
646 if (*iopte & IOPTE_LARGE) {
648 /* rewind to the 1st entry */
649 iopte = (u32 *)((u32)iopte & IOLARGE_MASK);
652 memset(iopte, 0, nent * sizeof(*iopte));
653 flush_iopte_range(iopte, iopte + (nent - 1) * sizeof(*iopte));
656 * do table walk to check if this table is necessary or not
658 iopte = iopte_offset(iopgd, 0);
659 for (i = 0; i < PTRS_PER_IOPTE; i++)
664 nent = 1; /* for the next L1 entry */
667 if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) {
669 /* rewind to the 1st entry */
670 iopgd = (u32 *)((u32)iopgd & IOSUPER_MASK);
674 memset(iopgd, 0, nent * sizeof(*iopgd));
675 flush_iopgd_range(iopgd, iopgd + (nent - 1) * sizeof(*iopgd));
681 * iopgtable_clear_entry - Remove an iommu pte entry
683 * @da: iommu device virtual address
685 size_t iopgtable_clear_entry(struct iommu *obj, u32 da)
689 spin_lock(&obj->page_table_lock);
691 bytes = iopgtable_clear_entry_core(obj, da);
692 flush_iotlb_page(obj, da);
694 spin_unlock(&obj->page_table_lock);
698 EXPORT_SYMBOL_GPL(iopgtable_clear_entry);
700 static void iopgtable_clear_entry_all(struct iommu *obj)
704 spin_lock(&obj->page_table_lock);
706 for (i = 0; i < PTRS_PER_IOPGD; i++) {
710 da = i << IOPGD_SHIFT;
711 iopgd = iopgd_offset(obj, da);
716 if (*iopgd & IOPGD_TABLE)
717 iopte_free(iopte_offset(iopgd, 0));
720 flush_iopgd_range(iopgd, iopgd);
723 flush_iotlb_all(obj);
725 spin_unlock(&obj->page_table_lock);
729 * Device IOMMU generic operations
731 static irqreturn_t iommu_fault_handler(int irq, void *data)
736 struct iommu *obj = data;
741 /* Dynamic loading TLB or PTE */
748 clk_enable(obj->clk);
749 stat = iommu_report_fault(obj, &da);
750 clk_disable(obj->clk);
754 iopgd = iopgd_offset(obj, da);
756 if (!(*iopgd & IOPGD_TABLE)) {
757 dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x\n", __func__,
762 iopte = iopte_offset(iopgd, da);
764 dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n",
765 __func__, da, iopgd, *iopgd, iopte, *iopte);
770 static int device_match_by_alias(struct device *dev, void *data)
772 struct iommu *obj = to_iommu(dev);
773 const char *name = data;
775 pr_debug("%s: %s %s\n", __func__, obj->name, name);
777 return strcmp(obj->name, name) == 0;
781 * iommu_get - Get iommu handler
782 * @name: target iommu name
784 struct iommu *iommu_get(const char *name)
790 dev = driver_find_device(&omap_iommu_driver.driver, NULL, (void *)name,
791 device_match_by_alias);
793 return ERR_PTR(-ENODEV);
797 mutex_lock(&obj->iommu_lock);
799 if (obj->refcount++ == 0) {
800 err = iommu_enable(obj);
803 flush_iotlb_all(obj);
806 if (!try_module_get(obj->owner))
809 mutex_unlock(&obj->iommu_lock);
811 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
815 if (obj->refcount == 1)
819 mutex_unlock(&obj->iommu_lock);
822 EXPORT_SYMBOL_GPL(iommu_get);
825 * iommu_put - Put back iommu handler
828 void iommu_put(struct iommu *obj)
830 if (!obj && IS_ERR(obj))
833 mutex_lock(&obj->iommu_lock);
835 if (--obj->refcount == 0)
838 module_put(obj->owner);
840 mutex_unlock(&obj->iommu_lock);
842 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
844 EXPORT_SYMBOL_GPL(iommu_put);
847 * OMAP Device MMU(IOMMU) detection
849 static int __devinit omap_iommu_probe(struct platform_device *pdev)
855 struct resource *res;
856 struct iommu_platform_data *pdata = pdev->dev.platform_data;
858 if (pdev->num_resources != 2)
861 obj = kzalloc(sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL);
865 obj->clk = clk_get(&pdev->dev, pdata->clk_name);
866 if (IS_ERR(obj->clk))
869 obj->nr_tlb_entries = pdata->nr_tlb_entries;
870 obj->name = pdata->name;
871 obj->dev = &pdev->dev;
872 obj->ctx = (void *)obj + sizeof(*obj);
874 mutex_init(&obj->iommu_lock);
875 mutex_init(&obj->mmap_lock);
876 spin_lock_init(&obj->page_table_lock);
877 INIT_LIST_HEAD(&obj->mmap);
879 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
884 obj->regbase = ioremap(res->start, resource_size(res));
890 res = request_mem_region(res->start, resource_size(res),
891 dev_name(&pdev->dev));
897 irq = platform_get_irq(pdev, 0);
902 err = request_irq(irq, iommu_fault_handler, IRQF_SHARED,
903 dev_name(&pdev->dev), obj);
906 platform_set_drvdata(pdev, obj);
908 p = (void *)__get_free_pages(GFP_KERNEL, get_order(IOPGD_TABLE_SIZE));
913 memset(p, 0, IOPGD_TABLE_SIZE);
914 clean_dcache_area(p, IOPGD_TABLE_SIZE);
917 BUG_ON(!IS_ALIGNED((unsigned long)obj->iopgd, IOPGD_TABLE_SIZE));
919 dev_info(&pdev->dev, "%s registered\n", obj->name);
925 release_mem_region(res->start, resource_size(res));
926 iounmap(obj->regbase);
934 static int __devexit omap_iommu_remove(struct platform_device *pdev)
937 struct resource *res;
938 struct iommu *obj = platform_get_drvdata(pdev);
940 platform_set_drvdata(pdev, NULL);
942 iopgtable_clear_entry_all(obj);
943 free_pages((unsigned long)obj->iopgd, get_order(IOPGD_TABLE_SIZE));
945 irq = platform_get_irq(pdev, 0);
947 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
948 release_mem_region(res->start, resource_size(res));
949 iounmap(obj->regbase);
952 dev_info(&pdev->dev, "%s removed\n", obj->name);
957 static struct platform_driver omap_iommu_driver = {
958 .probe = omap_iommu_probe,
959 .remove = __devexit_p(omap_iommu_remove),
961 .name = "omap-iommu",
965 static void iopte_cachep_ctor(void *iopte)
967 clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
970 static int __init omap_iommu_init(void)
972 struct kmem_cache *p;
973 const unsigned long flags = SLAB_HWCACHE_ALIGN;
974 size_t align = 1 << 10; /* L2 pagetable alignement */
976 p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags,
982 return platform_driver_register(&omap_iommu_driver);
984 module_init(omap_iommu_init);
986 static void __exit omap_iommu_exit(void)
988 kmem_cache_destroy(iopte_cachep);
990 platform_driver_unregister(&omap_iommu_driver);
992 module_exit(omap_iommu_exit);
994 MODULE_DESCRIPTION("omap iommu: tlb and pagetable primitives");
995 MODULE_ALIAS("platform:omap-iommu");
996 MODULE_AUTHOR("Hiroshi DOYU, Paul Mundt and Toshihiro Kobayashi");
997 MODULE_LICENSE("GPL v2");