2 * omap iommu: tlb and pagetable primitives
4 * Copyright (C) 2008-2010 Nokia Corporation
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>,
7 * Paul Mundt and Toshihiro Kobayashi
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/err.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/clk.h>
20 #include <linux/platform_device.h>
22 #include <asm/cacheflush.h>
24 #include <plat/iommu.h>
26 #include "iopgtable.h"
28 #define for_each_iotlb_cr(obj, n, __i, cr) \
30 (__i < (n)) && (cr = __iotlb_read_cr((obj), __i), true); \
33 /* accommodate the difference between omap1 and omap2/3 */
34 static const struct iommu_functions *arch_iommu;
36 static struct platform_driver omap_iommu_driver;
37 static struct kmem_cache *iopte_cachep;
40 * install_iommu_arch - Install archtecure specific iommu functions
41 * @ops: a pointer to architecture specific iommu functions
43 * There are several kind of iommu algorithm(tlb, pagetable) among
44 * omap series. This interface installs such an iommu algorighm.
46 int install_iommu_arch(const struct iommu_functions *ops)
54 EXPORT_SYMBOL_GPL(install_iommu_arch);
57 * uninstall_iommu_arch - Uninstall archtecure specific iommu functions
58 * @ops: a pointer to architecture specific iommu functions
60 * This interface uninstalls the iommu algorighm installed previously.
62 void uninstall_iommu_arch(const struct iommu_functions *ops)
64 if (arch_iommu != ops)
65 pr_err("%s: not your arch\n", __func__);
69 EXPORT_SYMBOL_GPL(uninstall_iommu_arch);
72 * iommu_save_ctx - Save registers for pm off-mode support
75 void iommu_save_ctx(struct iommu *obj)
77 arch_iommu->save_ctx(obj);
79 EXPORT_SYMBOL_GPL(iommu_save_ctx);
82 * iommu_restore_ctx - Restore registers for pm off-mode support
85 void iommu_restore_ctx(struct iommu *obj)
87 arch_iommu->restore_ctx(obj);
89 EXPORT_SYMBOL_GPL(iommu_restore_ctx);
92 * iommu_arch_version - Return running iommu arch version
94 u32 iommu_arch_version(void)
96 return arch_iommu->version;
98 EXPORT_SYMBOL_GPL(iommu_arch_version);
100 static int iommu_enable(struct iommu *obj)
107 clk_enable(obj->clk);
109 err = arch_iommu->enable(obj);
111 clk_disable(obj->clk);
115 static void iommu_disable(struct iommu *obj)
120 clk_enable(obj->clk);
122 arch_iommu->disable(obj);
124 clk_disable(obj->clk);
130 void iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e)
134 arch_iommu->cr_to_e(cr, e);
136 EXPORT_SYMBOL_GPL(iotlb_cr_to_e);
138 static inline int iotlb_cr_valid(struct cr_regs *cr)
143 return arch_iommu->cr_valid(cr);
146 static inline struct cr_regs *iotlb_alloc_cr(struct iommu *obj,
147 struct iotlb_entry *e)
152 return arch_iommu->alloc_cr(obj, e);
155 u32 iotlb_cr_to_virt(struct cr_regs *cr)
157 return arch_iommu->cr_to_virt(cr);
159 EXPORT_SYMBOL_GPL(iotlb_cr_to_virt);
161 static u32 get_iopte_attr(struct iotlb_entry *e)
163 return arch_iommu->get_pte_attr(e);
166 static u32 iommu_report_fault(struct iommu *obj, u32 *da)
168 return arch_iommu->fault_isr(obj, da);
171 static void iotlb_lock_get(struct iommu *obj, struct iotlb_lock *l)
175 val = iommu_read_reg(obj, MMU_LOCK);
177 l->base = MMU_LOCK_BASE(val);
178 l->vict = MMU_LOCK_VICT(val);
182 static void iotlb_lock_set(struct iommu *obj, struct iotlb_lock *l)
186 val = (l->base << MMU_LOCK_BASE_SHIFT);
187 val |= (l->vict << MMU_LOCK_VICT_SHIFT);
189 iommu_write_reg(obj, val, MMU_LOCK);
192 static void iotlb_read_cr(struct iommu *obj, struct cr_regs *cr)
194 arch_iommu->tlb_read_cr(obj, cr);
197 static void iotlb_load_cr(struct iommu *obj, struct cr_regs *cr)
199 arch_iommu->tlb_load_cr(obj, cr);
201 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
202 iommu_write_reg(obj, 1, MMU_LD_TLB);
206 * iotlb_dump_cr - Dump an iommu tlb entry into buf
208 * @cr: contents of cam and ram register
209 * @buf: output buffer
211 static inline ssize_t iotlb_dump_cr(struct iommu *obj, struct cr_regs *cr,
216 return arch_iommu->dump_cr(obj, cr, buf);
219 /* only used in iotlb iteration for-loop */
220 static struct cr_regs __iotlb_read_cr(struct iommu *obj, int n)
225 iotlb_lock_get(obj, &l);
227 iotlb_lock_set(obj, &l);
228 iotlb_read_cr(obj, &cr);
234 * load_iotlb_entry - Set an iommu tlb entry
236 * @e: an iommu tlb entry info
238 int load_iotlb_entry(struct iommu *obj, struct iotlb_entry *e)
244 if (!obj || !obj->nr_tlb_entries || !e)
247 clk_enable(obj->clk);
249 iotlb_lock_get(obj, &l);
250 if (l.base == obj->nr_tlb_entries) {
251 dev_warn(obj->dev, "%s: preserve entries full\n", __func__);
259 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, tmp)
260 if (!iotlb_cr_valid(&tmp))
263 if (i == obj->nr_tlb_entries) {
264 dev_dbg(obj->dev, "%s: full: no entry\n", __func__);
269 iotlb_lock_get(obj, &l);
272 iotlb_lock_set(obj, &l);
275 cr = iotlb_alloc_cr(obj, e);
277 clk_disable(obj->clk);
281 iotlb_load_cr(obj, cr);
286 /* increment victim for next tlb load */
287 if (++l.vict == obj->nr_tlb_entries)
289 iotlb_lock_set(obj, &l);
291 clk_disable(obj->clk);
294 EXPORT_SYMBOL_GPL(load_iotlb_entry);
297 * flush_iotlb_page - Clear an iommu tlb entry
299 * @da: iommu device virtual address
301 * Clear an iommu tlb entry which includes 'da' address.
303 void flush_iotlb_page(struct iommu *obj, u32 da)
308 clk_enable(obj->clk);
310 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) {
314 if (!iotlb_cr_valid(&cr))
317 start = iotlb_cr_to_virt(&cr);
318 bytes = iopgsz_to_bytes(cr.cam & 3);
320 if ((start <= da) && (da < start + bytes)) {
321 dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n",
322 __func__, start, da, bytes);
323 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
326 clk_disable(obj->clk);
328 if (i == obj->nr_tlb_entries)
329 dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da);
331 EXPORT_SYMBOL_GPL(flush_iotlb_page);
334 * flush_iotlb_range - Clear an iommu tlb entries
336 * @start: iommu device virtual address(start)
337 * @end: iommu device virtual address(end)
339 * Clear an iommu tlb entry which includes 'da' address.
341 void flush_iotlb_range(struct iommu *obj, u32 start, u32 end)
346 flush_iotlb_page(obj, da);
347 /* FIXME: Optimize for multiple page size */
351 EXPORT_SYMBOL_GPL(flush_iotlb_range);
354 * flush_iotlb_all - Clear all iommu tlb entries
357 void flush_iotlb_all(struct iommu *obj)
361 clk_enable(obj->clk);
365 iotlb_lock_set(obj, &l);
367 iommu_write_reg(obj, 1, MMU_GFLUSH);
369 clk_disable(obj->clk);
371 EXPORT_SYMBOL_GPL(flush_iotlb_all);
374 * iommu_set_twl - enable/disable table walking logic
376 * @on: enable/disable
378 * Function used to enable/disable TWL. If one wants to work
379 * exclusively with locked TLB entries and receive notifications
380 * for TLB miss then call this function to disable TWL.
382 void iommu_set_twl(struct iommu *obj, bool on)
384 clk_enable(obj->clk);
385 arch_iommu->set_twl(obj, on);
386 clk_disable(obj->clk);
388 EXPORT_SYMBOL_GPL(iommu_set_twl);
390 #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
392 ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes)
397 clk_enable(obj->clk);
399 bytes = arch_iommu->dump_ctx(obj, buf, bytes);
401 clk_disable(obj->clk);
405 EXPORT_SYMBOL_GPL(iommu_dump_ctx);
407 static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs, int num)
410 struct iotlb_lock saved;
412 struct cr_regs *p = crs;
414 clk_enable(obj->clk);
415 iotlb_lock_get(obj, &saved);
417 for_each_iotlb_cr(obj, num, i, tmp) {
418 if (!iotlb_cr_valid(&tmp))
423 iotlb_lock_set(obj, &saved);
424 clk_disable(obj->clk);
430 * dump_tlb_entries - dump cr arrays to given buffer
432 * @buf: output buffer
434 size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t bytes)
440 num = bytes / sizeof(*cr);
441 num = min(obj->nr_tlb_entries, num);
443 cr = kcalloc(num, sizeof(*cr), GFP_KERNEL);
447 num = __dump_tlb_entries(obj, cr, num);
448 for (i = 0; i < num; i++)
449 p += iotlb_dump_cr(obj, cr + i, p);
454 EXPORT_SYMBOL_GPL(dump_tlb_entries);
456 int foreach_iommu_device(void *data, int (*fn)(struct device *, void *))
458 return driver_for_each_device(&omap_iommu_driver.driver,
461 EXPORT_SYMBOL_GPL(foreach_iommu_device);
463 #endif /* CONFIG_OMAP_IOMMU_DEBUG_MODULE */
466 * H/W pagetable operations
468 static void flush_iopgd_range(u32 *first, u32 *last)
470 /* FIXME: L2 cache should be taken care of if it exists */
472 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd"
474 first += L1_CACHE_BYTES / sizeof(*first);
475 } while (first <= last);
478 static void flush_iopte_range(u32 *first, u32 *last)
480 /* FIXME: L2 cache should be taken care of if it exists */
482 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte"
484 first += L1_CACHE_BYTES / sizeof(*first);
485 } while (first <= last);
488 static void iopte_free(u32 *iopte)
490 /* Note: freed iopte's must be clean ready for re-use */
491 kmem_cache_free(iopte_cachep, iopte);
494 static u32 *iopte_alloc(struct iommu *obj, u32 *iopgd, u32 da)
498 /* a table has already existed */
503 * do the allocation outside the page table lock
505 spin_unlock(&obj->page_table_lock);
506 iopte = kmem_cache_zalloc(iopte_cachep, GFP_KERNEL);
507 spin_lock(&obj->page_table_lock);
511 return ERR_PTR(-ENOMEM);
513 *iopgd = virt_to_phys(iopte) | IOPGD_TABLE;
514 flush_iopgd_range(iopgd, iopgd);
516 dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte);
518 /* We raced, free the reduniovant table */
523 iopte = iopte_offset(iopgd, da);
526 "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n",
527 __func__, da, iopgd, *iopgd, iopte, *iopte);
532 static int iopgd_alloc_section(struct iommu *obj, u32 da, u32 pa, u32 prot)
534 u32 *iopgd = iopgd_offset(obj, da);
536 if ((da | pa) & ~IOSECTION_MASK) {
537 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
538 __func__, da, pa, IOSECTION_SIZE);
542 *iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION;
543 flush_iopgd_range(iopgd, iopgd);
547 static int iopgd_alloc_super(struct iommu *obj, u32 da, u32 pa, u32 prot)
549 u32 *iopgd = iopgd_offset(obj, da);
552 if ((da | pa) & ~IOSUPER_MASK) {
553 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
554 __func__, da, pa, IOSUPER_SIZE);
558 for (i = 0; i < 16; i++)
559 *(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER;
560 flush_iopgd_range(iopgd, iopgd + 15);
564 static int iopte_alloc_page(struct iommu *obj, u32 da, u32 pa, u32 prot)
566 u32 *iopgd = iopgd_offset(obj, da);
567 u32 *iopte = iopte_alloc(obj, iopgd, da);
570 return PTR_ERR(iopte);
572 *iopte = (pa & IOPAGE_MASK) | prot | IOPTE_SMALL;
573 flush_iopte_range(iopte, iopte);
575 dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n",
576 __func__, da, pa, iopte, *iopte);
581 static int iopte_alloc_large(struct iommu *obj, u32 da, u32 pa, u32 prot)
583 u32 *iopgd = iopgd_offset(obj, da);
584 u32 *iopte = iopte_alloc(obj, iopgd, da);
587 if ((da | pa) & ~IOLARGE_MASK) {
588 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
589 __func__, da, pa, IOLARGE_SIZE);
594 return PTR_ERR(iopte);
596 for (i = 0; i < 16; i++)
597 *(iopte + i) = (pa & IOLARGE_MASK) | prot | IOPTE_LARGE;
598 flush_iopte_range(iopte, iopte + 15);
602 static int iopgtable_store_entry_core(struct iommu *obj, struct iotlb_entry *e)
604 int (*fn)(struct iommu *, u32, u32, u32);
612 case MMU_CAM_PGSZ_16M:
613 fn = iopgd_alloc_super;
615 case MMU_CAM_PGSZ_1M:
616 fn = iopgd_alloc_section;
618 case MMU_CAM_PGSZ_64K:
619 fn = iopte_alloc_large;
621 case MMU_CAM_PGSZ_4K:
622 fn = iopte_alloc_page;
630 prot = get_iopte_attr(e);
632 spin_lock(&obj->page_table_lock);
633 err = fn(obj, e->da, e->pa, prot);
634 spin_unlock(&obj->page_table_lock);
640 * iopgtable_store_entry - Make an iommu pte entry
642 * @e: an iommu tlb entry info
644 int iopgtable_store_entry(struct iommu *obj, struct iotlb_entry *e)
648 flush_iotlb_page(obj, e->da);
649 err = iopgtable_store_entry_core(obj, e);
650 #ifdef PREFETCH_IOTLB
652 load_iotlb_entry(obj, e);
656 EXPORT_SYMBOL_GPL(iopgtable_store_entry);
659 * iopgtable_lookup_entry - Lookup an iommu pte entry
661 * @da: iommu device virtual address
662 * @ppgd: iommu pgd entry pointer to be returned
663 * @ppte: iommu pte entry pointer to be returned
665 void iopgtable_lookup_entry(struct iommu *obj, u32 da, u32 **ppgd, u32 **ppte)
667 u32 *iopgd, *iopte = NULL;
669 iopgd = iopgd_offset(obj, da);
673 if (iopgd_is_table(*iopgd))
674 iopte = iopte_offset(iopgd, da);
679 EXPORT_SYMBOL_GPL(iopgtable_lookup_entry);
681 static size_t iopgtable_clear_entry_core(struct iommu *obj, u32 da)
684 u32 *iopgd = iopgd_offset(obj, da);
690 if (iopgd_is_table(*iopgd)) {
692 u32 *iopte = iopte_offset(iopgd, da);
695 if (*iopte & IOPTE_LARGE) {
697 /* rewind to the 1st entry */
698 iopte = iopte_offset(iopgd, (da & IOLARGE_MASK));
701 memset(iopte, 0, nent * sizeof(*iopte));
702 flush_iopte_range(iopte, iopte + (nent - 1) * sizeof(*iopte));
705 * do table walk to check if this table is necessary or not
707 iopte = iopte_offset(iopgd, 0);
708 for (i = 0; i < PTRS_PER_IOPTE; i++)
713 nent = 1; /* for the next L1 entry */
716 if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) {
718 /* rewind to the 1st entry */
719 iopgd = iopgd_offset(obj, (da & IOSUPER_MASK));
723 memset(iopgd, 0, nent * sizeof(*iopgd));
724 flush_iopgd_range(iopgd, iopgd + (nent - 1) * sizeof(*iopgd));
730 * iopgtable_clear_entry - Remove an iommu pte entry
732 * @da: iommu device virtual address
734 size_t iopgtable_clear_entry(struct iommu *obj, u32 da)
738 spin_lock(&obj->page_table_lock);
740 bytes = iopgtable_clear_entry_core(obj, da);
741 flush_iotlb_page(obj, da);
743 spin_unlock(&obj->page_table_lock);
747 EXPORT_SYMBOL_GPL(iopgtable_clear_entry);
749 static void iopgtable_clear_entry_all(struct iommu *obj)
753 spin_lock(&obj->page_table_lock);
755 for (i = 0; i < PTRS_PER_IOPGD; i++) {
759 da = i << IOPGD_SHIFT;
760 iopgd = iopgd_offset(obj, da);
765 if (iopgd_is_table(*iopgd))
766 iopte_free(iopte_offset(iopgd, 0));
769 flush_iopgd_range(iopgd, iopgd);
772 flush_iotlb_all(obj);
774 spin_unlock(&obj->page_table_lock);
778 * Device IOMMU generic operations
780 static irqreturn_t iommu_fault_handler(int irq, void *data)
785 struct iommu *obj = data;
790 /* Dynamic loading TLB or PTE */
797 clk_enable(obj->clk);
798 stat = iommu_report_fault(obj, &da);
799 clk_disable(obj->clk);
805 iopgd = iopgd_offset(obj, da);
807 if (!iopgd_is_table(*iopgd)) {
808 dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x\n", __func__,
813 iopte = iopte_offset(iopgd, da);
815 dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n",
816 __func__, da, iopgd, *iopgd, iopte, *iopte);
821 static int device_match_by_alias(struct device *dev, void *data)
823 struct iommu *obj = to_iommu(dev);
824 const char *name = data;
826 pr_debug("%s: %s %s\n", __func__, obj->name, name);
828 return strcmp(obj->name, name) == 0;
832 * iommu_get - Get iommu handler
833 * @name: target iommu name
835 struct iommu *iommu_get(const char *name)
841 dev = driver_find_device(&omap_iommu_driver.driver, NULL, (void *)name,
842 device_match_by_alias);
844 return ERR_PTR(-ENODEV);
848 mutex_lock(&obj->iommu_lock);
850 if (obj->refcount++ == 0) {
851 err = iommu_enable(obj);
854 flush_iotlb_all(obj);
857 if (!try_module_get(obj->owner))
860 mutex_unlock(&obj->iommu_lock);
862 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
866 if (obj->refcount == 1)
870 mutex_unlock(&obj->iommu_lock);
873 EXPORT_SYMBOL_GPL(iommu_get);
876 * iommu_put - Put back iommu handler
879 void iommu_put(struct iommu *obj)
881 if (!obj || IS_ERR(obj))
884 mutex_lock(&obj->iommu_lock);
886 if (--obj->refcount == 0)
889 module_put(obj->owner);
891 mutex_unlock(&obj->iommu_lock);
893 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
895 EXPORT_SYMBOL_GPL(iommu_put);
898 * OMAP Device MMU(IOMMU) detection
900 static int __devinit omap_iommu_probe(struct platform_device *pdev)
906 struct resource *res;
907 struct iommu_platform_data *pdata = pdev->dev.platform_data;
909 if (pdev->num_resources != 2)
912 obj = kzalloc(sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL);
916 obj->clk = clk_get(&pdev->dev, pdata->clk_name);
917 if (IS_ERR(obj->clk))
920 obj->nr_tlb_entries = pdata->nr_tlb_entries;
921 obj->name = pdata->name;
922 obj->dev = &pdev->dev;
923 obj->ctx = (void *)obj + sizeof(*obj);
925 mutex_init(&obj->iommu_lock);
926 mutex_init(&obj->mmap_lock);
927 spin_lock_init(&obj->page_table_lock);
928 INIT_LIST_HEAD(&obj->mmap);
930 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
935 obj->regbase = ioremap(res->start, resource_size(res));
941 res = request_mem_region(res->start, resource_size(res),
942 dev_name(&pdev->dev));
948 irq = platform_get_irq(pdev, 0);
953 err = request_irq(irq, iommu_fault_handler, IRQF_SHARED,
954 dev_name(&pdev->dev), obj);
957 platform_set_drvdata(pdev, obj);
959 p = (void *)__get_free_pages(GFP_KERNEL, get_order(IOPGD_TABLE_SIZE));
964 memset(p, 0, IOPGD_TABLE_SIZE);
965 clean_dcache_area(p, IOPGD_TABLE_SIZE);
968 BUG_ON(!IS_ALIGNED((unsigned long)obj->iopgd, IOPGD_TABLE_SIZE));
970 dev_info(&pdev->dev, "%s registered\n", obj->name);
976 release_mem_region(res->start, resource_size(res));
977 iounmap(obj->regbase);
985 static int __devexit omap_iommu_remove(struct platform_device *pdev)
988 struct resource *res;
989 struct iommu *obj = platform_get_drvdata(pdev);
991 platform_set_drvdata(pdev, NULL);
993 iopgtable_clear_entry_all(obj);
994 free_pages((unsigned long)obj->iopgd, get_order(IOPGD_TABLE_SIZE));
996 irq = platform_get_irq(pdev, 0);
998 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
999 release_mem_region(res->start, resource_size(res));
1000 iounmap(obj->regbase);
1003 dev_info(&pdev->dev, "%s removed\n", obj->name);
1008 static struct platform_driver omap_iommu_driver = {
1009 .probe = omap_iommu_probe,
1010 .remove = __devexit_p(omap_iommu_remove),
1012 .name = "omap-iommu",
1016 static void iopte_cachep_ctor(void *iopte)
1018 clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
1021 static int __init omap_iommu_init(void)
1023 struct kmem_cache *p;
1024 const unsigned long flags = SLAB_HWCACHE_ALIGN;
1025 size_t align = 1 << 10; /* L2 pagetable alignement */
1027 p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags,
1033 return platform_driver_register(&omap_iommu_driver);
1035 module_init(omap_iommu_init);
1037 static void __exit omap_iommu_exit(void)
1039 kmem_cache_destroy(iopte_cachep);
1041 platform_driver_unregister(&omap_iommu_driver);
1043 module_exit(omap_iommu_exit);
1045 MODULE_DESCRIPTION("omap iommu: tlb and pagetable primitives");
1046 MODULE_ALIAS("platform:omap-iommu");
1047 MODULE_AUTHOR("Hiroshi DOYU, Paul Mundt and Toshihiro Kobayashi");
1048 MODULE_LICENSE("GPL v2");