2 * omap iommu: tlb and pagetable primitives
4 * Copyright (C) 2008-2010 Nokia Corporation
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>,
7 * Paul Mundt and Toshihiro Kobayashi
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/err.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/clk.h>
20 #include <linux/platform_device.h>
22 #include <asm/cacheflush.h>
24 #include <plat/iommu.h>
26 #include "iopgtable.h"
28 #define for_each_iotlb_cr(obj, n, __i, cr) \
30 (__i < (n)) && (cr = __iotlb_read_cr((obj), __i), true); \
33 /* accommodate the difference between omap1 and omap2/3 */
34 static const struct iommu_functions *arch_iommu;
36 static struct platform_driver omap_iommu_driver;
37 static struct kmem_cache *iopte_cachep;
40 * install_iommu_arch - Install archtecure specific iommu functions
41 * @ops: a pointer to architecture specific iommu functions
43 * There are several kind of iommu algorithm(tlb, pagetable) among
44 * omap series. This interface installs such an iommu algorighm.
46 int install_iommu_arch(const struct iommu_functions *ops)
54 EXPORT_SYMBOL_GPL(install_iommu_arch);
57 * uninstall_iommu_arch - Uninstall archtecure specific iommu functions
58 * @ops: a pointer to architecture specific iommu functions
60 * This interface uninstalls the iommu algorighm installed previously.
62 void uninstall_iommu_arch(const struct iommu_functions *ops)
64 if (arch_iommu != ops)
65 pr_err("%s: not your arch\n", __func__);
69 EXPORT_SYMBOL_GPL(uninstall_iommu_arch);
72 * iommu_save_ctx - Save registers for pm off-mode support
75 void iommu_save_ctx(struct iommu *obj)
77 arch_iommu->save_ctx(obj);
79 EXPORT_SYMBOL_GPL(iommu_save_ctx);
82 * iommu_restore_ctx - Restore registers for pm off-mode support
85 void iommu_restore_ctx(struct iommu *obj)
87 arch_iommu->restore_ctx(obj);
89 EXPORT_SYMBOL_GPL(iommu_restore_ctx);
92 * iommu_arch_version - Return running iommu arch version
94 u32 iommu_arch_version(void)
96 return arch_iommu->version;
98 EXPORT_SYMBOL_GPL(iommu_arch_version);
100 static int iommu_enable(struct iommu *obj)
110 clk_enable(obj->clk);
112 err = arch_iommu->enable(obj);
114 clk_disable(obj->clk);
118 static void iommu_disable(struct iommu *obj)
123 clk_enable(obj->clk);
125 arch_iommu->disable(obj);
127 clk_disable(obj->clk);
133 void iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e)
137 arch_iommu->cr_to_e(cr, e);
139 EXPORT_SYMBOL_GPL(iotlb_cr_to_e);
141 static inline int iotlb_cr_valid(struct cr_regs *cr)
146 return arch_iommu->cr_valid(cr);
149 static inline struct cr_regs *iotlb_alloc_cr(struct iommu *obj,
150 struct iotlb_entry *e)
155 return arch_iommu->alloc_cr(obj, e);
158 u32 iotlb_cr_to_virt(struct cr_regs *cr)
160 return arch_iommu->cr_to_virt(cr);
162 EXPORT_SYMBOL_GPL(iotlb_cr_to_virt);
164 static u32 get_iopte_attr(struct iotlb_entry *e)
166 return arch_iommu->get_pte_attr(e);
169 static u32 iommu_report_fault(struct iommu *obj, u32 *da)
171 return arch_iommu->fault_isr(obj, da);
174 static void iotlb_lock_get(struct iommu *obj, struct iotlb_lock *l)
178 val = iommu_read_reg(obj, MMU_LOCK);
180 l->base = MMU_LOCK_BASE(val);
181 l->vict = MMU_LOCK_VICT(val);
185 static void iotlb_lock_set(struct iommu *obj, struct iotlb_lock *l)
189 val = (l->base << MMU_LOCK_BASE_SHIFT);
190 val |= (l->vict << MMU_LOCK_VICT_SHIFT);
192 iommu_write_reg(obj, val, MMU_LOCK);
195 static void iotlb_read_cr(struct iommu *obj, struct cr_regs *cr)
197 arch_iommu->tlb_read_cr(obj, cr);
200 static void iotlb_load_cr(struct iommu *obj, struct cr_regs *cr)
202 arch_iommu->tlb_load_cr(obj, cr);
204 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
205 iommu_write_reg(obj, 1, MMU_LD_TLB);
209 * iotlb_dump_cr - Dump an iommu tlb entry into buf
211 * @cr: contents of cam and ram register
212 * @buf: output buffer
214 static inline ssize_t iotlb_dump_cr(struct iommu *obj, struct cr_regs *cr,
219 return arch_iommu->dump_cr(obj, cr, buf);
222 /* only used in iotlb iteration for-loop */
223 static struct cr_regs __iotlb_read_cr(struct iommu *obj, int n)
228 iotlb_lock_get(obj, &l);
230 iotlb_lock_set(obj, &l);
231 iotlb_read_cr(obj, &cr);
237 * load_iotlb_entry - Set an iommu tlb entry
239 * @e: an iommu tlb entry info
241 int load_iotlb_entry(struct iommu *obj, struct iotlb_entry *e)
247 if (!obj || !obj->nr_tlb_entries || !e)
250 clk_enable(obj->clk);
252 iotlb_lock_get(obj, &l);
253 if (l.base == obj->nr_tlb_entries) {
254 dev_warn(obj->dev, "%s: preserve entries full\n", __func__);
262 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, tmp)
263 if (!iotlb_cr_valid(&tmp))
266 if (i == obj->nr_tlb_entries) {
267 dev_dbg(obj->dev, "%s: full: no entry\n", __func__);
272 iotlb_lock_get(obj, &l);
275 iotlb_lock_set(obj, &l);
278 cr = iotlb_alloc_cr(obj, e);
280 clk_disable(obj->clk);
284 iotlb_load_cr(obj, cr);
289 /* increment victim for next tlb load */
290 if (++l.vict == obj->nr_tlb_entries)
292 iotlb_lock_set(obj, &l);
294 clk_disable(obj->clk);
297 EXPORT_SYMBOL_GPL(load_iotlb_entry);
300 * flush_iotlb_page - Clear an iommu tlb entry
302 * @da: iommu device virtual address
304 * Clear an iommu tlb entry which includes 'da' address.
306 void flush_iotlb_page(struct iommu *obj, u32 da)
311 clk_enable(obj->clk);
313 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) {
317 if (!iotlb_cr_valid(&cr))
320 start = iotlb_cr_to_virt(&cr);
321 bytes = iopgsz_to_bytes(cr.cam & 3);
323 if ((start <= da) && (da < start + bytes)) {
324 dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n",
325 __func__, start, da, bytes);
326 iotlb_load_cr(obj, &cr);
327 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
330 clk_disable(obj->clk);
332 if (i == obj->nr_tlb_entries)
333 dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da);
335 EXPORT_SYMBOL_GPL(flush_iotlb_page);
338 * flush_iotlb_range - Clear an iommu tlb entries
340 * @start: iommu device virtual address(start)
341 * @end: iommu device virtual address(end)
343 * Clear an iommu tlb entry which includes 'da' address.
345 void flush_iotlb_range(struct iommu *obj, u32 start, u32 end)
350 flush_iotlb_page(obj, da);
351 /* FIXME: Optimize for multiple page size */
355 EXPORT_SYMBOL_GPL(flush_iotlb_range);
358 * flush_iotlb_all - Clear all iommu tlb entries
361 void flush_iotlb_all(struct iommu *obj)
365 clk_enable(obj->clk);
369 iotlb_lock_set(obj, &l);
371 iommu_write_reg(obj, 1, MMU_GFLUSH);
373 clk_disable(obj->clk);
375 EXPORT_SYMBOL_GPL(flush_iotlb_all);
378 * iommu_set_twl - enable/disable table walking logic
380 * @on: enable/disable
382 * Function used to enable/disable TWL. If one wants to work
383 * exclusively with locked TLB entries and receive notifications
384 * for TLB miss then call this function to disable TWL.
386 void iommu_set_twl(struct iommu *obj, bool on)
388 clk_enable(obj->clk);
389 arch_iommu->set_twl(obj, on);
390 clk_disable(obj->clk);
392 EXPORT_SYMBOL_GPL(iommu_set_twl);
394 #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
396 ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes)
401 clk_enable(obj->clk);
403 bytes = arch_iommu->dump_ctx(obj, buf, bytes);
405 clk_disable(obj->clk);
409 EXPORT_SYMBOL_GPL(iommu_dump_ctx);
411 static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs, int num)
414 struct iotlb_lock saved;
416 struct cr_regs *p = crs;
418 clk_enable(obj->clk);
419 iotlb_lock_get(obj, &saved);
421 for_each_iotlb_cr(obj, num, i, tmp) {
422 if (!iotlb_cr_valid(&tmp))
427 iotlb_lock_set(obj, &saved);
428 clk_disable(obj->clk);
434 * dump_tlb_entries - dump cr arrays to given buffer
436 * @buf: output buffer
438 size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t bytes)
444 num = bytes / sizeof(*cr);
445 num = min(obj->nr_tlb_entries, num);
447 cr = kcalloc(num, sizeof(*cr), GFP_KERNEL);
451 num = __dump_tlb_entries(obj, cr, num);
452 for (i = 0; i < num; i++)
453 p += iotlb_dump_cr(obj, cr + i, p);
458 EXPORT_SYMBOL_GPL(dump_tlb_entries);
460 int foreach_iommu_device(void *data, int (*fn)(struct device *, void *))
462 return driver_for_each_device(&omap_iommu_driver.driver,
465 EXPORT_SYMBOL_GPL(foreach_iommu_device);
467 #endif /* CONFIG_OMAP_IOMMU_DEBUG_MODULE */
470 * H/W pagetable operations
472 static void flush_iopgd_range(u32 *first, u32 *last)
474 /* FIXME: L2 cache should be taken care of if it exists */
476 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd"
478 first += L1_CACHE_BYTES / sizeof(*first);
479 } while (first <= last);
482 static void flush_iopte_range(u32 *first, u32 *last)
484 /* FIXME: L2 cache should be taken care of if it exists */
486 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte"
488 first += L1_CACHE_BYTES / sizeof(*first);
489 } while (first <= last);
492 static void iopte_free(u32 *iopte)
494 /* Note: freed iopte's must be clean ready for re-use */
495 kmem_cache_free(iopte_cachep, iopte);
498 static u32 *iopte_alloc(struct iommu *obj, u32 *iopgd, u32 da)
502 /* a table has already existed */
507 * do the allocation outside the page table lock
509 spin_unlock(&obj->page_table_lock);
510 iopte = kmem_cache_zalloc(iopte_cachep, GFP_KERNEL);
511 spin_lock(&obj->page_table_lock);
515 return ERR_PTR(-ENOMEM);
517 *iopgd = virt_to_phys(iopte) | IOPGD_TABLE;
518 flush_iopgd_range(iopgd, iopgd);
520 dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte);
522 /* We raced, free the reduniovant table */
527 iopte = iopte_offset(iopgd, da);
530 "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n",
531 __func__, da, iopgd, *iopgd, iopte, *iopte);
536 static int iopgd_alloc_section(struct iommu *obj, u32 da, u32 pa, u32 prot)
538 u32 *iopgd = iopgd_offset(obj, da);
540 if ((da | pa) & ~IOSECTION_MASK) {
541 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
542 __func__, da, pa, IOSECTION_SIZE);
546 *iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION;
547 flush_iopgd_range(iopgd, iopgd);
551 static int iopgd_alloc_super(struct iommu *obj, u32 da, u32 pa, u32 prot)
553 u32 *iopgd = iopgd_offset(obj, da);
556 if ((da | pa) & ~IOSUPER_MASK) {
557 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
558 __func__, da, pa, IOSUPER_SIZE);
562 for (i = 0; i < 16; i++)
563 *(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER;
564 flush_iopgd_range(iopgd, iopgd + 15);
568 static int iopte_alloc_page(struct iommu *obj, u32 da, u32 pa, u32 prot)
570 u32 *iopgd = iopgd_offset(obj, da);
571 u32 *iopte = iopte_alloc(obj, iopgd, da);
574 return PTR_ERR(iopte);
576 *iopte = (pa & IOPAGE_MASK) | prot | IOPTE_SMALL;
577 flush_iopte_range(iopte, iopte);
579 dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n",
580 __func__, da, pa, iopte, *iopte);
585 static int iopte_alloc_large(struct iommu *obj, u32 da, u32 pa, u32 prot)
587 u32 *iopgd = iopgd_offset(obj, da);
588 u32 *iopte = iopte_alloc(obj, iopgd, da);
591 if ((da | pa) & ~IOLARGE_MASK) {
592 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
593 __func__, da, pa, IOLARGE_SIZE);
598 return PTR_ERR(iopte);
600 for (i = 0; i < 16; i++)
601 *(iopte + i) = (pa & IOLARGE_MASK) | prot | IOPTE_LARGE;
602 flush_iopte_range(iopte, iopte + 15);
606 static int iopgtable_store_entry_core(struct iommu *obj, struct iotlb_entry *e)
608 int (*fn)(struct iommu *, u32, u32, u32);
616 case MMU_CAM_PGSZ_16M:
617 fn = iopgd_alloc_super;
619 case MMU_CAM_PGSZ_1M:
620 fn = iopgd_alloc_section;
622 case MMU_CAM_PGSZ_64K:
623 fn = iopte_alloc_large;
625 case MMU_CAM_PGSZ_4K:
626 fn = iopte_alloc_page;
634 prot = get_iopte_attr(e);
636 spin_lock(&obj->page_table_lock);
637 err = fn(obj, e->da, e->pa, prot);
638 spin_unlock(&obj->page_table_lock);
644 * iopgtable_store_entry - Make an iommu pte entry
646 * @e: an iommu tlb entry info
648 int iopgtable_store_entry(struct iommu *obj, struct iotlb_entry *e)
652 flush_iotlb_page(obj, e->da);
653 err = iopgtable_store_entry_core(obj, e);
654 #ifdef PREFETCH_IOTLB
656 load_iotlb_entry(obj, e);
660 EXPORT_SYMBOL_GPL(iopgtable_store_entry);
663 * iopgtable_lookup_entry - Lookup an iommu pte entry
665 * @da: iommu device virtual address
666 * @ppgd: iommu pgd entry pointer to be returned
667 * @ppte: iommu pte entry pointer to be returned
669 void iopgtable_lookup_entry(struct iommu *obj, u32 da, u32 **ppgd, u32 **ppte)
671 u32 *iopgd, *iopte = NULL;
673 iopgd = iopgd_offset(obj, da);
677 if (iopgd_is_table(*iopgd))
678 iopte = iopte_offset(iopgd, da);
683 EXPORT_SYMBOL_GPL(iopgtable_lookup_entry);
685 static size_t iopgtable_clear_entry_core(struct iommu *obj, u32 da)
688 u32 *iopgd = iopgd_offset(obj, da);
694 if (iopgd_is_table(*iopgd)) {
696 u32 *iopte = iopte_offset(iopgd, da);
699 if (*iopte & IOPTE_LARGE) {
701 /* rewind to the 1st entry */
702 iopte = iopte_offset(iopgd, (da & IOLARGE_MASK));
705 memset(iopte, 0, nent * sizeof(*iopte));
706 flush_iopte_range(iopte, iopte + (nent - 1) * sizeof(*iopte));
709 * do table walk to check if this table is necessary or not
711 iopte = iopte_offset(iopgd, 0);
712 for (i = 0; i < PTRS_PER_IOPTE; i++)
717 nent = 1; /* for the next L1 entry */
720 if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) {
722 /* rewind to the 1st entry */
723 iopgd = iopgd_offset(obj, (da & IOSUPER_MASK));
727 memset(iopgd, 0, nent * sizeof(*iopgd));
728 flush_iopgd_range(iopgd, iopgd + (nent - 1) * sizeof(*iopgd));
734 * iopgtable_clear_entry - Remove an iommu pte entry
736 * @da: iommu device virtual address
738 size_t iopgtable_clear_entry(struct iommu *obj, u32 da)
742 spin_lock(&obj->page_table_lock);
744 bytes = iopgtable_clear_entry_core(obj, da);
745 flush_iotlb_page(obj, da);
747 spin_unlock(&obj->page_table_lock);
751 EXPORT_SYMBOL_GPL(iopgtable_clear_entry);
753 static void iopgtable_clear_entry_all(struct iommu *obj)
757 spin_lock(&obj->page_table_lock);
759 for (i = 0; i < PTRS_PER_IOPGD; i++) {
763 da = i << IOPGD_SHIFT;
764 iopgd = iopgd_offset(obj, da);
769 if (iopgd_is_table(*iopgd))
770 iopte_free(iopte_offset(iopgd, 0));
773 flush_iopgd_range(iopgd, iopgd);
776 flush_iotlb_all(obj);
778 spin_unlock(&obj->page_table_lock);
782 * Device IOMMU generic operations
784 static irqreturn_t iommu_fault_handler(int irq, void *data)
788 struct iommu *obj = data;
793 clk_enable(obj->clk);
794 errs = iommu_report_fault(obj, &da);
795 clk_disable(obj->clk);
799 /* Fault callback or TLB/PTE Dynamic loading */
800 if (obj->isr && !obj->isr(obj, da, errs, obj->isr_priv))
805 iopgd = iopgd_offset(obj, da);
807 if (!iopgd_is_table(*iopgd)) {
808 dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p "
809 "*pgd:px%08x\n", obj->name, errs, da, iopgd, *iopgd);
813 iopte = iopte_offset(iopgd, da);
815 dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:0x%08x "
816 "pte:0x%p *pte:0x%08x\n", obj->name, errs, da, iopgd, *iopgd,
822 static int device_match_by_alias(struct device *dev, void *data)
824 struct iommu *obj = to_iommu(dev);
825 const char *name = data;
827 pr_debug("%s: %s %s\n", __func__, obj->name, name);
829 return strcmp(obj->name, name) == 0;
833 * iommu_set_da_range - Set a valid device address range
835 * @start Start of valid range
836 * @end End of valid range
838 int iommu_set_da_range(struct iommu *obj, u32 start, u32 end)
844 if (end < start || !PAGE_ALIGN(start | end))
847 obj->da_start = start;
852 EXPORT_SYMBOL_GPL(iommu_set_da_range);
855 * iommu_get - Get iommu handler
856 * @name: target iommu name
858 struct iommu *iommu_get(const char *name)
864 dev = driver_find_device(&omap_iommu_driver.driver, NULL, (void *)name,
865 device_match_by_alias);
867 return ERR_PTR(-ENODEV);
871 mutex_lock(&obj->iommu_lock);
873 if (obj->refcount++ == 0) {
874 err = iommu_enable(obj);
877 flush_iotlb_all(obj);
880 if (!try_module_get(obj->owner))
883 mutex_unlock(&obj->iommu_lock);
885 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
889 if (obj->refcount == 1)
893 mutex_unlock(&obj->iommu_lock);
896 EXPORT_SYMBOL_GPL(iommu_get);
899 * iommu_put - Put back iommu handler
902 void iommu_put(struct iommu *obj)
904 if (!obj || IS_ERR(obj))
907 mutex_lock(&obj->iommu_lock);
909 if (--obj->refcount == 0)
912 module_put(obj->owner);
914 mutex_unlock(&obj->iommu_lock);
916 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
918 EXPORT_SYMBOL_GPL(iommu_put);
920 int iommu_set_isr(const char *name,
921 int (*isr)(struct iommu *obj, u32 da, u32 iommu_errs,
928 dev = driver_find_device(&omap_iommu_driver.driver, NULL, (void *)name,
929 device_match_by_alias);
934 mutex_lock(&obj->iommu_lock);
935 if (obj->refcount != 0) {
936 mutex_unlock(&obj->iommu_lock);
940 obj->isr_priv = isr_priv;
941 mutex_unlock(&obj->iommu_lock);
945 EXPORT_SYMBOL_GPL(iommu_set_isr);
948 * OMAP Device MMU(IOMMU) detection
950 static int __devinit omap_iommu_probe(struct platform_device *pdev)
956 struct resource *res;
957 struct iommu_platform_data *pdata = pdev->dev.platform_data;
959 if (pdev->num_resources != 2)
962 obj = kzalloc(sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL);
966 obj->clk = clk_get(&pdev->dev, pdata->clk_name);
967 if (IS_ERR(obj->clk))
970 obj->nr_tlb_entries = pdata->nr_tlb_entries;
971 obj->name = pdata->name;
972 obj->dev = &pdev->dev;
973 obj->ctx = (void *)obj + sizeof(*obj);
974 obj->da_start = pdata->da_start;
975 obj->da_end = pdata->da_end;
977 mutex_init(&obj->iommu_lock);
978 mutex_init(&obj->mmap_lock);
979 spin_lock_init(&obj->page_table_lock);
980 INIT_LIST_HEAD(&obj->mmap);
982 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
988 res = request_mem_region(res->start, resource_size(res),
989 dev_name(&pdev->dev));
995 obj->regbase = ioremap(res->start, resource_size(res));
1001 irq = platform_get_irq(pdev, 0);
1006 err = request_irq(irq, iommu_fault_handler, IRQF_SHARED,
1007 dev_name(&pdev->dev), obj);
1010 platform_set_drvdata(pdev, obj);
1012 p = (void *)__get_free_pages(GFP_KERNEL, get_order(IOPGD_TABLE_SIZE));
1017 memset(p, 0, IOPGD_TABLE_SIZE);
1018 clean_dcache_area(p, IOPGD_TABLE_SIZE);
1021 BUG_ON(!IS_ALIGNED((unsigned long)obj->iopgd, IOPGD_TABLE_SIZE));
1023 dev_info(&pdev->dev, "%s registered\n", obj->name);
1029 iounmap(obj->regbase);
1031 release_mem_region(res->start, resource_size(res));
1039 static int __devexit omap_iommu_remove(struct platform_device *pdev)
1042 struct resource *res;
1043 struct iommu *obj = platform_get_drvdata(pdev);
1045 platform_set_drvdata(pdev, NULL);
1047 iopgtable_clear_entry_all(obj);
1048 free_pages((unsigned long)obj->iopgd, get_order(IOPGD_TABLE_SIZE));
1050 irq = platform_get_irq(pdev, 0);
1052 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1053 release_mem_region(res->start, resource_size(res));
1054 iounmap(obj->regbase);
1057 dev_info(&pdev->dev, "%s removed\n", obj->name);
1062 static struct platform_driver omap_iommu_driver = {
1063 .probe = omap_iommu_probe,
1064 .remove = __devexit_p(omap_iommu_remove),
1066 .name = "omap-iommu",
1070 static void iopte_cachep_ctor(void *iopte)
1072 clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
1075 static int __init omap_iommu_init(void)
1077 struct kmem_cache *p;
1078 const unsigned long flags = SLAB_HWCACHE_ALIGN;
1079 size_t align = 1 << 10; /* L2 pagetable alignement */
1081 p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags,
1087 return platform_driver_register(&omap_iommu_driver);
1089 module_init(omap_iommu_init);
1091 static void __exit omap_iommu_exit(void)
1093 kmem_cache_destroy(iopte_cachep);
1095 platform_driver_unregister(&omap_iommu_driver);
1097 module_exit(omap_iommu_exit);
1099 MODULE_DESCRIPTION("omap iommu: tlb and pagetable primitives");
1100 MODULE_ALIAS("platform:omap-iommu");
1101 MODULE_AUTHOR("Hiroshi DOYU, Paul Mundt and Toshihiro Kobayashi");
1102 MODULE_LICENSE("GPL v2");