2 * omap-pm-noop.c - OMAP power management interface - dummy version
4 * This code implements the OMAP power management interface to
5 * drivers, CPUIdle, CPUFreq, and DSP Bridge. It is strictly for
6 * debug/demonstration use, as it does nothing but printk() whenever a
7 * function is called (when DEBUG is defined, below)
9 * Copyright (C) 2008-2009 Texas Instruments, Inc.
10 * Copyright (C) 2008-2009 Nokia Corporation
13 * Interface developed by (in alphabetical order):
14 * Karthik Dasu, Tony Lindgren, Rajendra Nayak, Sakari Poussa, Veeramanikandan
15 * Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, Richard Woodruff
20 #include <linux/init.h>
21 #include <linux/cpufreq.h>
22 #include <linux/device.h>
24 /* Interface documentation is in mach/omap-pm.h */
25 #include <plat/omap-pm.h>
28 * Device-driver-originated constraints (via board-*.c files)
31 int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t)
34 WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
39 pr_debug("OMAP PM: remove max MPU wakeup latency constraint: "
40 "dev %s\n", dev_name(dev));
42 pr_debug("OMAP PM: add max MPU wakeup latency constraint: "
43 "dev %s, t = %ld usec\n", dev_name(dev), t);
46 * For current Linux, this needs to map the MPU to a
47 * powerdomain, then go through the list of current max lat
48 * constraints on the MPU and find the smallest. If
49 * the latency constraint has changed, the code should
50 * recompute the state to enter for the next powerdomain
53 * TI CDP code can call constraint_set here.
59 int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r)
61 if (!dev || (agent_id != OCP_INITIATOR_AGENT &&
62 agent_id != OCP_TARGET_AGENT)) {
63 WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
68 pr_debug("OMAP PM: remove min bus tput constraint: "
69 "dev %s for agent_id %d\n", dev_name(dev), agent_id);
71 pr_debug("OMAP PM: add min bus tput constraint: "
72 "dev %s for agent_id %d: rate %ld KiB\n",
73 dev_name(dev), agent_id, r);
76 * This code should model the interconnect and compute the
77 * required clock frequency, convert that to a VDD2 OPP ID, then
78 * set the VDD2 OPP appropriately.
80 * TI CDP code can call constraint_set here on the VDD2 OPP.
86 int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev,
89 if (!req_dev || !dev || t < -1) {
90 WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
95 pr_debug("OMAP PM: remove max device latency constraint: "
96 "dev %s\n", dev_name(dev));
98 pr_debug("OMAP PM: add max device latency constraint: "
99 "dev %s, t = %ld usec\n", dev_name(dev), t);
102 * For current Linux, this needs to map the device to a
103 * powerdomain, then go through the list of current max lat
104 * constraints on that powerdomain and find the smallest. If
105 * the latency constraint has changed, the code should
106 * recompute the state to enter for the next powerdomain
107 * state. Conceivably, this code should also determine
108 * whether to actually disable the device clocks or not,
109 * depending on how long it takes to re-enable the clocks.
111 * TI CDP code can call constraint_set here.
117 int omap_pm_set_max_sdma_lat(struct device *dev, long t)
119 if (!dev || t < -1) {
120 WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
125 pr_debug("OMAP PM: remove max DMA latency constraint: "
126 "dev %s\n", dev_name(dev));
128 pr_debug("OMAP PM: add max DMA latency constraint: "
129 "dev %s, t = %ld usec\n", dev_name(dev), t);
132 * For current Linux PM QOS params, this code should scan the
133 * list of maximum CPU and DMA latencies and select the
134 * smallest, then set cpu_dma_latency pm_qos_param
137 * For future Linux PM QOS params, with separate CPU and DMA
138 * latency params, this code should just set the dma_latency param.
140 * TI CDP code can call constraint_set here.
146 int omap_pm_set_min_clk_rate(struct device *dev, struct clk *c, long r)
148 if (!dev || !c || r < 0) {
149 WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
154 pr_debug("OMAP PM: remove min clk rate constraint: "
155 "dev %s\n", dev_name(dev));
157 pr_debug("OMAP PM: add min clk rate constraint: "
158 "dev %s, rate = %ld Hz\n", dev_name(dev), r);
161 * Code in a real implementation should keep track of these
162 * constraints on the clock, and determine the highest minimum
163 * clock rate. It should iterate over each OPP and determine
164 * whether the OPP will result in a clock rate that would
165 * satisfy this constraint (and any other PM constraint in effect
166 * at that time). Once it finds the lowest-voltage OPP that
167 * meets those conditions, it should switch to it, or return
168 * an error if the code is not capable of doing so.
175 * DSP Bridge-specific constraints
178 const struct omap_opp *omap_pm_dsp_get_opp_table(void)
180 pr_debug("OMAP PM: DSP request for OPP table\n");
183 * Return DSP frequency table here: The final item in the
184 * array should have .rate = .opp_id = 0.
190 void omap_pm_dsp_set_min_opp(u8 opp_id)
197 pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id);
201 * For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we
202 * can just test to see which is higher, the CPU's desired OPP
203 * ID or the DSP's desired OPP ID, and use whichever is
206 * In CDP12.14+, the VDD1 OPP custom clock that controls the DSP
207 * rate is keyed on MPU speed, not the OPP ID. So we need to
208 * map the OPP ID to the MPU speed for use with clk_set_rate()
209 * if it is higher than the current OPP clock rate.
215 u8 omap_pm_dsp_get_opp(void)
217 pr_debug("OMAP PM: DSP requests current DSP OPP ID\n");
220 * For l-o dev tree, call clk_get_rate() on VDD1 OPP clock
223 * Call clk_get_rate() on the OPP custom clock, map that to an
224 * OPP ID using the tables defined in board-*.c/chip-*.c files.
231 * CPUFreq-originated constraint
233 * In the future, this should be handled by custom OPP clocktype
237 struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void)
239 pr_debug("OMAP PM: CPUFreq request for frequency table\n");
242 * Return CPUFreq frequency table here: loop over
243 * all VDD1 clkrates, pull out the mpu_ck frequencies, build
250 void omap_pm_cpu_set_freq(unsigned long f)
257 pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n",
261 * For l-o dev tree, determine whether MPU freq or DSP OPP id
262 * freq is higher. Find the OPP ID corresponding to the
263 * higher frequency. Call clk_round_rate() and clk_set_rate()
264 * on the OPP custom clock.
266 * CDP should just be able to set the VDD1 OPP clock rate here.
270 unsigned long omap_pm_cpu_get_freq(void)
272 pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n");
275 * Call clk_get_rate() on the mpu_ck.
282 * Device context loss tracking
285 int omap_pm_get_dev_context_loss_count(struct device *dev)
292 pr_debug("OMAP PM: returning context loss count for dev %s\n",
296 * Map the device to the powerdomain. Return the powerdomain
304 /* Should be called before clk framework init */
305 int __init omap_pm_if_early_init(void)
310 /* Must be called after clock framework is initialized */
311 int __init omap_pm_if_init(void)
316 void omap_pm_if_exit(void)
318 /* Deallocate CPUFreq frequency table here */