1 /* linux/arch/arm/plat-s3c24xx/time.c
3 * Copyright (C) 2003-2005 Simtec Electronics
4 * Ben Dooks, <ben@simtec.co.uk>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/kernel.h>
22 #include <linux/sched.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/err.h>
27 #include <linux/clk.h>
30 #include <asm/system.h>
32 #include <asm/mach-types.h>
36 #include <plat/regs-timer.h>
37 #include <mach/regs-irq.h>
38 #include <asm/mach/time.h>
39 #include <mach/tick.h>
41 #include <plat/clock.h>
44 static unsigned long timer_startval;
45 static unsigned long timer_usec_ticks;
48 #define TICK_MAX (0xffff)
51 #define TIMER_USEC_SHIFT 16
53 /* we use the shifted arithmetic to work out the ratio of timer ticks
54 * to usecs, as often the peripheral clock is not a nice even multiple
57 * shift of 14 and 15 are too low for the 12MHz, 16 seems to be ok
58 * for the current HZ value of 200 without producing overflows.
60 * Original patch by Dimitry Andric, updated by Ben Dooks
64 /* timer_mask_usec_ticks
66 * given a clock and divisor, make the value to pass into timer_ticks_to_usec
67 * to scale the ticks into usecs
70 static inline unsigned long
71 timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk)
73 unsigned long den = pclk / 1000;
75 return ((1000 << TIMER_USEC_SHIFT) * scaler + (den >> 1)) / den;
78 /* timer_ticks_to_usec
80 * convert timer ticks to usec.
83 static inline unsigned long timer_ticks_to_usec(unsigned long ticks)
87 res = ticks * timer_usec_ticks;
88 res += 1 << (TIMER_USEC_SHIFT - 4); /* round up slightly */
90 return res >> TIMER_USEC_SHIFT;
94 * Returns microsecond since last clock interrupt. Note that interrupts
95 * will have been disabled by do_gettimeoffset()
96 * IRQs are disabled before entering here from do_gettimeofday()
99 static unsigned long s3c2410_gettimeoffset (void)
104 /* work out how many ticks have gone since last timer interrupt */
106 tval = __raw_readl(S3C2410_TCNTO(4));
107 tdone = timer_startval - tval;
109 /* check to see if there is an interrupt pending */
111 if (s3c24xx_ostimer_pending()) {
112 /* re-read the timer, and try and fix up for the missed
113 * interrupt. Note, the interrupt may go off before the
114 * timer has re-loaded from wrapping.
117 tval = __raw_readl(S3C2410_TCNTO(4));
118 tdone = timer_startval - tval;
121 tdone += timer_startval;
124 return timer_ticks_to_usec(tdone);
129 * IRQ handler for the timer
132 s3c2410_timer_interrupt(int irq, void *dev_id)
138 static struct irqaction s3c2410_timer_irq = {
139 .name = "S3C2410 Timer Tick",
140 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
141 .handler = s3c2410_timer_interrupt,
144 #define use_tclk1_12() ( \
145 machine_is_bast() || \
146 machine_is_vr1000() || \
147 machine_is_anubis() || \
151 * Set up timer interrupt, and return the current time in seconds.
153 * Currently we only use timer4, as it is the only timer which has no
154 * other function that can be exploited externally
156 static void s3c2410_timer_setup (void)
163 tcnt = TICK_MAX; /* default value for tcnt */
165 /* read the current timer configuration bits */
167 tcon = __raw_readl(S3C2410_TCON);
168 tcfg1 = __raw_readl(S3C2410_TCFG1);
169 tcfg0 = __raw_readl(S3C2410_TCFG0);
171 /* configure the system for whichever machine is in use */
173 if (use_tclk1_12()) {
174 /* timer is at 12MHz, scaler is 1 */
175 timer_usec_ticks = timer_mask_usec_ticks(1, 12000000);
176 tcnt = 12000000 / HZ;
178 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
179 tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
184 /* for the h1940 (and others), we use the pclk from the core
185 * to generate the timer values. since values around 50 to
186 * 70MHz are not values we can directly generate the timer
187 * value from, we need to pre-scale and divide before using it.
189 * for instance, using 50.7MHz and dividing by 6 gives 8.45MHz
190 * (8.45 ticks per usec)
193 /* this is used as default if no other timer can be found */
195 clk = clk_get(NULL, "timers");
197 panic("failed to get clock for system timer");
201 pclk = clk_get_rate(clk);
203 /* configure clock tick */
205 timer_usec_ticks = timer_mask_usec_ticks(6, pclk);
207 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
208 tcfg1 |= S3C2410_TCFG1_MUX4_DIV2;
210 tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
211 tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT;
213 tcnt = (pclk / 6) / HZ;
216 /* timers reload after counting zero, so reduce the count by 1 */
220 printk(KERN_DEBUG "timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n",
221 tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks);
223 /* check to see if timer is within 16bit range... */
224 if (tcnt > TICK_MAX) {
225 panic("setup_timer: HZ is too small, cannot configure timer!");
229 __raw_writel(tcfg1, S3C2410_TCFG1);
230 __raw_writel(tcfg0, S3C2410_TCFG0);
232 timer_startval = tcnt;
233 __raw_writel(tcnt, S3C2410_TCNTB(4));
235 /* ensure timer is stopped... */
238 tcon |= S3C2410_TCON_T4RELOAD;
239 tcon |= S3C2410_TCON_T4MANUALUPD;
241 __raw_writel(tcon, S3C2410_TCON);
242 __raw_writel(tcnt, S3C2410_TCNTB(4));
243 __raw_writel(tcnt, S3C2410_TCMPB(4));
245 /* start the timer running */
246 tcon |= S3C2410_TCON_T4START;
247 tcon &= ~S3C2410_TCON_T4MANUALUPD;
248 __raw_writel(tcon, S3C2410_TCON);
251 static void __init s3c2410_timer_init(void)
253 s3c2410_timer_setup();
254 setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
257 struct sys_timer s3c24xx_timer = {
258 .init = s3c2410_timer_init,
259 .offset = s3c2410_gettimeoffset,
260 .resume = s3c2410_timer_setup