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[ARM] S3C: Merge next-s3c64xx-dma2 into for-rmk-devel
[karo-tx-linux.git] / arch / arm / plat-s3c24xx / gpiolib.c
1 /* linux/arch/arm/plat-s3c24xx/gpiolib.c
2  *
3  * Copyright (c) 2008 Simtec Electronics
4  *      http://armlinux.simtec.co.uk/
5  *      Ben Dooks <ben@simtec.co.uk>
6  *
7  * S3C24XX GPIOlib support
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/io.h>
20 #include <linux/gpio.h>
21
22 #include <mach/gpio-core.h>
23 #include <mach/hardware.h>
24 #include <asm/irq.h>
25 #include <plat/pm.h>
26
27 #include <mach/regs-gpio.h>
28
29 static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
30 {
31         return -EINVAL;
32 }
33
34 static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
35                                         unsigned offset, int value)
36 {
37         struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
38         void __iomem *base = ourchip->base;
39         unsigned long flags;
40         unsigned long dat;
41         unsigned long con;
42
43         local_irq_save(flags);
44
45         con = __raw_readl(base + 0x00);
46         dat = __raw_readl(base + 0x04);
47
48         dat &= ~(1 << offset);
49         if (value)
50                 dat |= 1 << offset;
51
52         __raw_writel(dat, base + 0x04);
53
54         con &= ~(1 << offset);
55
56         __raw_writel(con, base + 0x00);
57         __raw_writel(dat, base + 0x04);
58
59         local_irq_restore(flags);
60         return 0;
61 }
62
63 static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
64 {
65         if (offset < 4)
66                 return IRQ_EINT0 + offset;
67         
68         if (offset < 8)
69                 return IRQ_EINT4 + offset - 4;
70         
71         return -EINVAL;
72 }
73
74 static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
75 {
76         return IRQ_EINT8 + offset;
77 }
78
79 struct s3c_gpio_chip s3c24xx_gpios[] = {
80         [0] = {
81                 .base   = S3C24XX_GPIO_BASE(S3C2410_GPA0),
82                 .pm     = __gpio_pm(&s3c_gpio_pm_1bit),
83                 .chip   = {
84                         .base                   = S3C2410_GPA0,
85                         .owner                  = THIS_MODULE,
86                         .label                  = "GPIOA",
87                         .ngpio                  = 24,
88                         .direction_input        = s3c24xx_gpiolib_banka_input,
89                         .direction_output       = s3c24xx_gpiolib_banka_output,
90                 },
91         },
92         [1] = {
93                 .base   = S3C24XX_GPIO_BASE(S3C2410_GPB0),
94                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
95                 .chip   = {
96                         .base                   = S3C2410_GPB0,
97                         .owner                  = THIS_MODULE,
98                         .label                  = "GPIOB",
99                         .ngpio                  = 16,
100                 },
101         },
102         [2] = {
103                 .base   = S3C24XX_GPIO_BASE(S3C2410_GPC0),
104                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
105                 .chip   = {
106                         .base                   = S3C2410_GPC0,
107                         .owner                  = THIS_MODULE,
108                         .label                  = "GPIOC",
109                         .ngpio                  = 16,
110                 },
111         },
112         [3] = {
113                 .base   = S3C24XX_GPIO_BASE(S3C2410_GPD0),
114                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
115                 .chip   = {
116                         .base                   = S3C2410_GPD0,
117                         .owner                  = THIS_MODULE,
118                         .label                  = "GPIOD",
119                         .ngpio                  = 16,
120                 },
121         },
122         [4] = {
123                 .base   = S3C24XX_GPIO_BASE(S3C2410_GPE0),
124                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
125                 .chip   = {
126                         .base                   = S3C2410_GPE0,
127                         .label                  = "GPIOE",
128                         .owner                  = THIS_MODULE,
129                         .ngpio                  = 16,
130                 },
131         },
132         [5] = {
133                 .base   = S3C24XX_GPIO_BASE(S3C2410_GPF0),
134                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
135                 .chip   = {
136                         .base                   = S3C2410_GPF0,
137                         .owner                  = THIS_MODULE,
138                         .label                  = "GPIOF",
139                         .ngpio                  = 8,
140                         .to_irq                 = s3c24xx_gpiolib_bankf_toirq,
141                 },
142         },
143         [6] = {
144                 .base   = S3C24XX_GPIO_BASE(S3C2410_GPG0),
145                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
146                 .chip   = {
147                         .base                   = S3C2410_GPG0,
148                         .owner                  = THIS_MODULE,
149                         .label                  = "GPIOG",
150                         .ngpio                  = 10,
151                         .to_irq                 = s3c24xx_gpiolib_bankg_toirq,
152                 },
153         },
154 };
155
156 static __init int s3c24xx_gpiolib_init(void)
157 {
158         struct s3c_gpio_chip *chip = s3c24xx_gpios;
159         int gpn;
160
161         for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++)
162                 s3c_gpiolib_add(chip);
163
164         return 0;
165 }
166
167 arch_initcall(s3c24xx_gpiolib_init);