1 /* linux/arch/arm/plat-s3c24xx/gpiolib.c
3 * Copyright (c) 2008-2010 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * S3C24XX GPIOlib support
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/sysdev.h>
19 #include <linux/ioport.h>
21 #include <linux/gpio.h>
23 #include <plat/gpio-core.h>
24 #include <plat/gpio-cfg.h>
25 #include <plat/gpio-cfg-helpers.h>
26 #include <mach/hardware.h>
30 #include <mach/regs-gpio.h>
32 static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
37 static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
38 unsigned offset, int value)
40 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
41 void __iomem *base = ourchip->base;
46 local_irq_save(flags);
48 con = __raw_readl(base + 0x00);
49 dat = __raw_readl(base + 0x04);
51 dat &= ~(1 << offset);
55 __raw_writel(dat, base + 0x04);
57 con &= ~(1 << offset);
59 __raw_writel(con, base + 0x00);
60 __raw_writel(dat, base + 0x04);
62 local_irq_restore(flags);
66 static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
69 return IRQ_EINT0 + offset;
72 return IRQ_EINT4 + offset - 4;
77 static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
78 .set_config = s3c_gpio_setcfg_s3c24xx_a,
79 .get_config = s3c_gpio_getcfg_s3c24xx_a,
82 struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
83 .set_config = s3c_gpio_setcfg_s3c24xx,
84 .get_config = s3c_gpio_getcfg_s3c24xx,
85 .set_pull = s3c_gpio_setpull_1up,
86 .get_pull = s3c_gpio_getpull_1up,
89 struct s3c_gpio_chip s3c24xx_gpios[] = {
91 .base = S3C2410_GPACON,
92 .pm = __gpio_pm(&s3c_gpio_pm_1bit),
93 .config = &s3c24xx_gpiocfg_banka,
95 .base = S3C2410_GPA(0),
99 .direction_input = s3c24xx_gpiolib_banka_input,
100 .direction_output = s3c24xx_gpiolib_banka_output,
104 .base = S3C2410_GPBCON,
105 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
107 .base = S3C2410_GPB(0),
108 .owner = THIS_MODULE,
114 .base = S3C2410_GPCCON,
115 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
117 .base = S3C2410_GPC(0),
118 .owner = THIS_MODULE,
124 .base = S3C2410_GPDCON,
125 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
127 .base = S3C2410_GPD(0),
128 .owner = THIS_MODULE,
134 .base = S3C2410_GPECON,
135 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
137 .base = S3C2410_GPE(0),
139 .owner = THIS_MODULE,
144 .base = S3C2410_GPFCON,
145 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
147 .base = S3C2410_GPF(0),
148 .owner = THIS_MODULE,
151 .to_irq = s3c24xx_gpiolib_bankf_toirq,
155 .base = S3C2410_GPGCON,
156 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
157 .irq_base = IRQ_EINT8,
159 .base = S3C2410_GPG(0),
160 .owner = THIS_MODULE,
163 .to_irq = samsung_gpiolib_to_irq,
166 .base = S3C2410_GPHCON,
167 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
169 .base = S3C2410_GPH(0),
170 .owner = THIS_MODULE,
175 /* GPIOS for the S3C2443 and later devices. */
177 .base = S3C2440_GPJCON,
178 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
180 .base = S3C2410_GPJ(0),
181 .owner = THIS_MODULE,
186 .base = S3C2443_GPKCON,
187 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
189 .base = S3C2410_GPK(0),
190 .owner = THIS_MODULE,
195 .base = S3C2443_GPLCON,
196 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
198 .base = S3C2410_GPL(0),
199 .owner = THIS_MODULE,
204 .base = S3C2443_GPMCON,
205 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
207 .base = S3C2410_GPM(0),
208 .owner = THIS_MODULE,
216 static __init int s3c24xx_gpiolib_init(void)
218 struct s3c_gpio_chip *chip = s3c24xx_gpios;
221 for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) {
223 chip->config = &s3c24xx_gpiocfg_default;
225 s3c_gpiolib_add(chip);
231 core_initcall(s3c24xx_gpiolib_init);