1 /* linux/arch/arm/plat-s5p/clock.c
3 * Copyright 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * S5P - Common clock support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/list.h>
17 #include <linux/errno.h>
18 #include <linux/err.h>
19 #include <linux/clk.h>
20 #include <linux/sysdev.h>
22 #include <asm/div64.h>
24 #include <plat/clock.h>
25 #include <plat/clock-clksrc.h>
26 #include <plat/s5p-clock.h>
28 /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
31 struct clk clk_ext_xtal_mux = {
36 struct clk clk_xusbxti = {
41 struct clk s5p_clk_27m = {
47 /* 48MHz USB Phy clock output */
48 struct clk clk_48m = {
55 * No need .ctrlbit, this is always on
57 struct clk clk_fout_apll = {
63 * No need .ctrlbit, this is always on
65 struct clk clk_fout_mpll = {
70 /* EPLL clock output */
71 struct clk clk_fout_epll = {
77 /* DPLL clock output */
78 struct clk clk_fout_dpll = {
84 /* VPLL clock output */
85 struct clk clk_fout_vpll = {
92 struct clk clk_arm = {
99 /* Possible clock sources for APLL Mux */
100 static struct clk *clk_src_apll_list[] = {
102 [1] = &clk_fout_apll,
105 struct clksrc_sources clk_src_apll = {
106 .sources = clk_src_apll_list,
107 .nr_sources = ARRAY_SIZE(clk_src_apll_list),
110 /* Possible clock sources for MPLL Mux */
111 static struct clk *clk_src_mpll_list[] = {
113 [1] = &clk_fout_mpll,
116 struct clksrc_sources clk_src_mpll = {
117 .sources = clk_src_mpll_list,
118 .nr_sources = ARRAY_SIZE(clk_src_mpll_list),
121 /* Possible clock sources for EPLL Mux */
122 static struct clk *clk_src_epll_list[] = {
124 [1] = &clk_fout_epll,
127 struct clksrc_sources clk_src_epll = {
128 .sources = clk_src_epll_list,
129 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
132 /* Possible clock sources for DPLL Mux */
133 static struct clk *clk_src_dpll_list[] = {
135 [1] = &clk_fout_dpll,
138 struct clksrc_sources clk_src_dpll = {
139 .sources = clk_src_dpll_list,
140 .nr_sources = ARRAY_SIZE(clk_src_dpll_list),
143 struct clk clk_vpll = {
148 int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
150 unsigned int ctrlbit = clk->ctrlbit;
153 con = __raw_readl(reg);
154 con = enable ? (con | ctrlbit) : (con & ~ctrlbit);
155 __raw_writel(con, reg);
159 static struct clk *s5p_clks[] __initdata = {
173 void __init s5p_register_clocks(unsigned long xtal_freq)
177 clk_ext_xtal_mux.rate = xtal_freq;
179 ret = s3c24xx_register_clocks(s5p_clks, ARRAY_SIZE(s5p_clks));
181 printk(KERN_ERR "Failed to register s5p clocks\n");