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ARM: EXYNOS4: Add support new EXYNOS4212 SoC
[karo-tx-linux.git] / arch / arm / plat-s5p / cpu.c
1 /* linux/arch/arm/plat-s5p/cpu.c
2  *
3  * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * S5P CPU Support
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11 */
12
13 #include <linux/init.h>
14 #include <linux/module.h>
15
16 #include <asm/mach/arch.h>
17 #include <asm/mach/map.h>
18
19 #include <mach/map.h>
20 #include <mach/regs-clock.h>
21
22 #include <plat/cpu.h>
23 #include <plat/s5p6440.h>
24 #include <plat/s5p6450.h>
25 #include <plat/s5pc100.h>
26 #include <plat/s5pv210.h>
27 #include <plat/exynos4.h>
28
29 /* table of supported CPUs */
30
31 static const char name_s5p6440[] = "S5P6440";
32 static const char name_s5p6450[] = "S5P6450";
33 static const char name_s5pc100[] = "S5PC100";
34 static const char name_s5pv210[] = "S5PV210/S5PC110";
35 static const char name_exynos4210[] = "EXYNOS4210";
36 static const char name_exynos4212[] = "EXYNOS4212";
37
38 static struct cpu_table cpu_ids[] __initdata = {
39         {
40                 .idcode         = S5P6440_CPU_ID,
41                 .idmask         = S5P64XX_CPU_MASK,
42                 .map_io         = s5p6440_map_io,
43                 .init_clocks    = s5p6440_init_clocks,
44                 .init_uarts     = s5p6440_init_uarts,
45                 .init           = s5p64x0_init,
46                 .name           = name_s5p6440,
47         }, {
48                 .idcode         = S5P6450_CPU_ID,
49                 .idmask         = S5P64XX_CPU_MASK,
50                 .map_io         = s5p6450_map_io,
51                 .init_clocks    = s5p6450_init_clocks,
52                 .init_uarts     = s5p6450_init_uarts,
53                 .init           = s5p64x0_init,
54                 .name           = name_s5p6450,
55         }, {
56                 .idcode         = S5PC100_CPU_ID,
57                 .idmask         = S5PC100_CPU_MASK,
58                 .map_io         = s5pc100_map_io,
59                 .init_clocks    = s5pc100_init_clocks,
60                 .init_uarts     = s5pc100_init_uarts,
61                 .init           = s5pc100_init,
62                 .name           = name_s5pc100,
63         }, {
64                 .idcode         = S5PV210_CPU_ID,
65                 .idmask         = S5PV210_CPU_MASK,
66                 .map_io         = s5pv210_map_io,
67                 .init_clocks    = s5pv210_init_clocks,
68                 .init_uarts     = s5pv210_init_uarts,
69                 .init           = s5pv210_init,
70                 .name           = name_s5pv210,
71         }, {
72                 .idcode         = EXYNOS4210_CPU_ID,
73                 .idmask         = EXYNOS4_CPU_MASK,
74                 .map_io         = exynos4_map_io,
75                 .init_clocks    = exynos4_init_clocks,
76                 .init_uarts     = exynos4_init_uarts,
77                 .init           = exynos4_init,
78                 .name           = name_exynos4210,
79         }, {
80                 .idcode         = EXYNOS4212_CPU_ID,
81                 .idmask         = EXYNOS4_CPU_MASK,
82                 .map_io         = exynos4_map_io,
83                 .init_clocks    = exynos4_init_clocks,
84                 .init_uarts     = exynos4_init_uarts,
85                 .init           = exynos4_init,
86                 .name           = name_exynos4212,
87         },
88 };
89
90 /* minimal IO mapping */
91
92 static struct map_desc s5p_iodesc[] __initdata = {
93         {
94                 .virtual        = (unsigned long)S5P_VA_CHIPID,
95                 .pfn            = __phys_to_pfn(S5P_PA_CHIPID),
96                 .length         = SZ_4K,
97                 .type           = MT_DEVICE,
98         }, {
99                 .virtual        = (unsigned long)S3C_VA_SYS,
100                 .pfn            = __phys_to_pfn(S5P_PA_SYSCON),
101                 .length         = SZ_64K,
102                 .type           = MT_DEVICE,
103         }, {
104                 .virtual        = (unsigned long)S3C_VA_TIMER,
105                 .pfn            = __phys_to_pfn(S5P_PA_TIMER),
106                 .length         = SZ_16K,
107                 .type           = MT_DEVICE,
108         }, {
109                 .virtual        = (unsigned long)S3C_VA_WATCHDOG,
110                 .pfn            = __phys_to_pfn(S3C_PA_WDT),
111                 .length         = SZ_4K,
112                 .type           = MT_DEVICE,
113         }, {
114                 .virtual        = (unsigned long)S5P_VA_SROMC,
115                 .pfn            = __phys_to_pfn(S5P_PA_SROMC),
116                 .length         = SZ_4K,
117                 .type           = MT_DEVICE,
118         },
119 };
120
121 /* read cpu identification code */
122
123 void __init s5p_init_io(struct map_desc *mach_desc,
124                         int size, void __iomem *cpuid_addr)
125 {
126         /* initialize the io descriptors we need for initialization */
127         iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
128         if (mach_desc)
129                 iotable_init(mach_desc, size);
130
131         /* detect cpu id and rev. */
132         s5p_init_cpu(cpuid_addr);
133
134         s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
135 }