1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/irq.h>
41 #include <mach/hardware.h>
43 #include <mach/irqs.h>
47 #include <plat/devs.h>
50 #include <plat/ehci.h>
52 #include <plat/fb-s3c2410.h>
53 #include <plat/hwmon.h>
55 #include <plat/keypad.h>
57 #include <plat/nand.h>
58 #include <plat/sdhci.h>
61 #include <plat/usb-control.h>
62 #include <plat/usb-phy.h>
63 #include <plat/regs-iic.h>
64 #include <plat/regs-serial.h>
65 #include <plat/regs-spi.h>
66 #include <plat/s3c64xx-spi.h>
68 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
71 #ifdef CONFIG_CPU_S3C2440
72 static struct resource s3c_ac97_resource[] = {
73 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
74 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
75 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
76 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
77 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
80 struct platform_device s3c_device_ac97 = {
81 .name = "samsung-ac97",
83 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
84 .resource = s3c_ac97_resource,
86 .dma_mask = &samsung_device_dma_mask,
87 .coherent_dma_mask = DMA_BIT_MASK(32),
90 #endif /* CONFIG_CPU_S3C2440 */
94 #ifdef CONFIG_PLAT_S3C24XX
95 static struct resource s3c_adc_resource[] = {
96 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
97 [1] = DEFINE_RES_IRQ(IRQ_TC),
98 [2] = DEFINE_RES_IRQ(IRQ_ADC),
101 struct platform_device s3c_device_adc = {
102 .name = "s3c24xx-adc",
104 .num_resources = ARRAY_SIZE(s3c_adc_resource),
105 .resource = s3c_adc_resource,
107 #endif /* CONFIG_PLAT_S3C24XX */
109 #if defined(CONFIG_SAMSUNG_DEV_ADC)
110 static struct resource s3c_adc_resource[] = {
111 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
112 [1] = DEFINE_RES_IRQ(IRQ_TC),
113 [2] = DEFINE_RES_IRQ(IRQ_ADC),
116 struct platform_device s3c_device_adc = {
117 .name = "samsung-adc",
119 .num_resources = ARRAY_SIZE(s3c_adc_resource),
120 .resource = s3c_adc_resource,
122 #endif /* CONFIG_SAMSUNG_DEV_ADC */
124 /* Camif Controller */
126 #ifdef CONFIG_CPU_S3C2440
127 static struct resource s3c_camif_resource[] = {
128 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
129 [1] = DEFINE_RES_IRQ(IRQ_CAM),
132 struct platform_device s3c_device_camif = {
133 .name = "s3c2440-camif",
135 .num_resources = ARRAY_SIZE(s3c_camif_resource),
136 .resource = s3c_camif_resource,
138 .dma_mask = &samsung_device_dma_mask,
139 .coherent_dma_mask = DMA_BIT_MASK(32),
142 #endif /* CONFIG_CPU_S3C2440 */
146 struct platform_device samsung_asoc_dma = {
147 .name = "samsung-audio",
150 .dma_mask = &samsung_device_dma_mask,
151 .coherent_dma_mask = DMA_BIT_MASK(32),
155 struct platform_device samsung_asoc_idma = {
156 .name = "samsung-idma",
159 .dma_mask = &samsung_device_dma_mask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
166 #ifdef CONFIG_S3C_DEV_FB
167 static struct resource s3c_fb_resource[] = {
168 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
169 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
170 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
171 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
174 struct platform_device s3c_device_fb = {
177 .num_resources = ARRAY_SIZE(s3c_fb_resource),
178 .resource = s3c_fb_resource,
180 .dma_mask = &samsung_device_dma_mask,
181 .coherent_dma_mask = DMA_BIT_MASK(32),
185 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
187 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
190 #endif /* CONFIG_S3C_DEV_FB */
194 #ifdef CONFIG_S5P_DEV_FIMC0
195 static struct resource s5p_fimc0_resource[] = {
196 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
197 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
200 struct platform_device s5p_device_fimc0 = {
203 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
204 .resource = s5p_fimc0_resource,
206 .dma_mask = &samsung_device_dma_mask,
207 .coherent_dma_mask = DMA_BIT_MASK(32),
211 struct platform_device s5p_device_fimc_md = {
212 .name = "s5p-fimc-md",
215 #endif /* CONFIG_S5P_DEV_FIMC0 */
217 #ifdef CONFIG_S5P_DEV_FIMC1
218 static struct resource s5p_fimc1_resource[] = {
219 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
220 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
223 struct platform_device s5p_device_fimc1 = {
226 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
227 .resource = s5p_fimc1_resource,
229 .dma_mask = &samsung_device_dma_mask,
230 .coherent_dma_mask = DMA_BIT_MASK(32),
233 #endif /* CONFIG_S5P_DEV_FIMC1 */
235 #ifdef CONFIG_S5P_DEV_FIMC2
236 static struct resource s5p_fimc2_resource[] = {
237 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
238 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
241 struct platform_device s5p_device_fimc2 = {
244 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
245 .resource = s5p_fimc2_resource,
247 .dma_mask = &samsung_device_dma_mask,
248 .coherent_dma_mask = DMA_BIT_MASK(32),
251 #endif /* CONFIG_S5P_DEV_FIMC2 */
253 #ifdef CONFIG_S5P_DEV_FIMC3
254 static struct resource s5p_fimc3_resource[] = {
255 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
256 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
259 struct platform_device s5p_device_fimc3 = {
262 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
263 .resource = s5p_fimc3_resource,
265 .dma_mask = &samsung_device_dma_mask,
266 .coherent_dma_mask = DMA_BIT_MASK(32),
269 #endif /* CONFIG_S5P_DEV_FIMC3 */
273 #ifdef CONFIG_S5P_DEV_G2D
274 static struct resource s5p_g2d_resource[] = {
275 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
276 [1] = DEFINE_RES_IRQ(IRQ_2D),
279 struct platform_device s5p_device_g2d = {
282 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
283 .resource = s5p_g2d_resource,
285 .dma_mask = &samsung_device_dma_mask,
286 .coherent_dma_mask = DMA_BIT_MASK(32),
289 #endif /* CONFIG_S5P_DEV_G2D */
291 #ifdef CONFIG_S5P_DEV_JPEG
292 static struct resource s5p_jpeg_resource[] = {
293 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
294 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
297 struct platform_device s5p_device_jpeg = {
300 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
301 .resource = s5p_jpeg_resource,
303 .dma_mask = &samsung_device_dma_mask,
304 .coherent_dma_mask = DMA_BIT_MASK(32),
307 #endif /* CONFIG_S5P_DEV_JPEG */
311 #ifdef CONFIG_S5P_DEV_FIMD0
312 static struct resource s5p_fimd0_resource[] = {
313 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
314 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
315 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
316 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
319 struct platform_device s5p_device_fimd0 = {
322 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
323 .resource = s5p_fimd0_resource,
325 .dma_mask = &samsung_device_dma_mask,
326 .coherent_dma_mask = DMA_BIT_MASK(32),
330 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
332 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
335 #endif /* CONFIG_S5P_DEV_FIMD0 */
339 #ifdef CONFIG_S3C_DEV_HWMON
340 struct platform_device s3c_device_hwmon = {
343 .dev.parent = &s3c_device_adc.dev,
346 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
348 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
351 #endif /* CONFIG_S3C_DEV_HWMON */
355 #ifdef CONFIG_S3C_DEV_HSMMC
356 static struct resource s3c_hsmmc_resource[] = {
357 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
358 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
361 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
363 .host_caps = (MMC_CAP_4_BIT_DATA |
364 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
367 struct platform_device s3c_device_hsmmc0 = {
370 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
371 .resource = s3c_hsmmc_resource,
373 .dma_mask = &samsung_device_dma_mask,
374 .coherent_dma_mask = DMA_BIT_MASK(32),
375 .platform_data = &s3c_hsmmc0_def_platdata,
379 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
381 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
383 #endif /* CONFIG_S3C_DEV_HSMMC */
385 #ifdef CONFIG_S3C_DEV_HSMMC1
386 static struct resource s3c_hsmmc1_resource[] = {
387 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
388 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
391 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
393 .host_caps = (MMC_CAP_4_BIT_DATA |
394 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
397 struct platform_device s3c_device_hsmmc1 = {
400 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
401 .resource = s3c_hsmmc1_resource,
403 .dma_mask = &samsung_device_dma_mask,
404 .coherent_dma_mask = DMA_BIT_MASK(32),
405 .platform_data = &s3c_hsmmc1_def_platdata,
409 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
411 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
413 #endif /* CONFIG_S3C_DEV_HSMMC1 */
417 #ifdef CONFIG_S3C_DEV_HSMMC2
418 static struct resource s3c_hsmmc2_resource[] = {
419 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
420 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
423 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
425 .host_caps = (MMC_CAP_4_BIT_DATA |
426 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
429 struct platform_device s3c_device_hsmmc2 = {
432 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
433 .resource = s3c_hsmmc2_resource,
435 .dma_mask = &samsung_device_dma_mask,
436 .coherent_dma_mask = DMA_BIT_MASK(32),
437 .platform_data = &s3c_hsmmc2_def_platdata,
441 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
443 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
445 #endif /* CONFIG_S3C_DEV_HSMMC2 */
447 #ifdef CONFIG_S3C_DEV_HSMMC3
448 static struct resource s3c_hsmmc3_resource[] = {
449 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
450 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
453 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
455 .host_caps = (MMC_CAP_4_BIT_DATA |
456 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
459 struct platform_device s3c_device_hsmmc3 = {
462 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
463 .resource = s3c_hsmmc3_resource,
465 .dma_mask = &samsung_device_dma_mask,
466 .coherent_dma_mask = DMA_BIT_MASK(32),
467 .platform_data = &s3c_hsmmc3_def_platdata,
471 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
473 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
475 #endif /* CONFIG_S3C_DEV_HSMMC3 */
479 static struct resource s3c_i2c0_resource[] = {
480 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
481 [1] = DEFINE_RES_IRQ(IRQ_IIC),
484 struct platform_device s3c_device_i2c0 = {
485 .name = "s3c2410-i2c",
486 #ifdef CONFIG_S3C_DEV_I2C1
491 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
492 .resource = s3c_i2c0_resource,
495 struct s3c2410_platform_i2c default_i2c_data __initdata = {
498 .frequency = 100*1000,
502 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
504 struct s3c2410_platform_i2c *npd;
507 pd = &default_i2c_data;
511 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
515 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
518 #ifdef CONFIG_S3C_DEV_I2C1
519 static struct resource s3c_i2c1_resource[] = {
520 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
521 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
524 struct platform_device s3c_device_i2c1 = {
525 .name = "s3c2410-i2c",
527 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
528 .resource = s3c_i2c1_resource,
531 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
533 struct s3c2410_platform_i2c *npd;
536 pd = &default_i2c_data;
540 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
544 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
546 #endif /* CONFIG_S3C_DEV_I2C1 */
548 #ifdef CONFIG_S3C_DEV_I2C2
549 static struct resource s3c_i2c2_resource[] = {
550 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
551 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
554 struct platform_device s3c_device_i2c2 = {
555 .name = "s3c2410-i2c",
557 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
558 .resource = s3c_i2c2_resource,
561 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
563 struct s3c2410_platform_i2c *npd;
566 pd = &default_i2c_data;
570 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
574 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
576 #endif /* CONFIG_S3C_DEV_I2C2 */
578 #ifdef CONFIG_S3C_DEV_I2C3
579 static struct resource s3c_i2c3_resource[] = {
580 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
581 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
584 struct platform_device s3c_device_i2c3 = {
585 .name = "s3c2440-i2c",
587 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
588 .resource = s3c_i2c3_resource,
591 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
593 struct s3c2410_platform_i2c *npd;
596 pd = &default_i2c_data;
600 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
604 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
606 #endif /*CONFIG_S3C_DEV_I2C3 */
608 #ifdef CONFIG_S3C_DEV_I2C4
609 static struct resource s3c_i2c4_resource[] = {
610 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
611 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
614 struct platform_device s3c_device_i2c4 = {
615 .name = "s3c2440-i2c",
617 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
618 .resource = s3c_i2c4_resource,
621 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
623 struct s3c2410_platform_i2c *npd;
626 pd = &default_i2c_data;
630 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
634 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
636 #endif /*CONFIG_S3C_DEV_I2C4 */
638 #ifdef CONFIG_S3C_DEV_I2C5
639 static struct resource s3c_i2c5_resource[] = {
640 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
641 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
644 struct platform_device s3c_device_i2c5 = {
645 .name = "s3c2440-i2c",
647 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
648 .resource = s3c_i2c5_resource,
651 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
653 struct s3c2410_platform_i2c *npd;
656 pd = &default_i2c_data;
660 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
664 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
666 #endif /*CONFIG_S3C_DEV_I2C5 */
668 #ifdef CONFIG_S3C_DEV_I2C6
669 static struct resource s3c_i2c6_resource[] = {
670 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
671 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
674 struct platform_device s3c_device_i2c6 = {
675 .name = "s3c2440-i2c",
677 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
678 .resource = s3c_i2c6_resource,
681 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
683 struct s3c2410_platform_i2c *npd;
686 pd = &default_i2c_data;
690 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
694 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
696 #endif /* CONFIG_S3C_DEV_I2C6 */
698 #ifdef CONFIG_S3C_DEV_I2C7
699 static struct resource s3c_i2c7_resource[] = {
700 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
701 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
704 struct platform_device s3c_device_i2c7 = {
705 .name = "s3c2440-i2c",
707 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
708 .resource = s3c_i2c7_resource,
711 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
713 struct s3c2410_platform_i2c *npd;
716 pd = &default_i2c_data;
720 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
724 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
726 #endif /* CONFIG_S3C_DEV_I2C7 */
730 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
731 static struct resource s5p_i2c_resource[] = {
732 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
733 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
736 struct platform_device s5p_device_i2c_hdmiphy = {
737 .name = "s3c2440-hdmiphy-i2c",
739 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
740 .resource = s5p_i2c_resource,
743 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
745 struct s3c2410_platform_i2c *npd;
748 pd = &default_i2c_data;
750 if (soc_is_exynos4210())
752 else if (soc_is_s5pv210())
758 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
759 &s5p_device_i2c_hdmiphy);
761 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
765 #ifdef CONFIG_PLAT_S3C24XX
766 static struct resource s3c_iis_resource[] = {
767 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
770 struct platform_device s3c_device_iis = {
771 .name = "s3c24xx-iis",
773 .num_resources = ARRAY_SIZE(s3c_iis_resource),
774 .resource = s3c_iis_resource,
776 .dma_mask = &samsung_device_dma_mask,
777 .coherent_dma_mask = DMA_BIT_MASK(32),
780 #endif /* CONFIG_PLAT_S3C24XX */
784 #ifdef CONFIG_SAMSUNG_DEV_IDE
785 static struct resource s3c_cfcon_resource[] = {
786 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
787 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
790 struct platform_device s3c_device_cfcon = {
792 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
793 .resource = s3c_cfcon_resource,
796 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
798 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
801 #endif /* CONFIG_SAMSUNG_DEV_IDE */
805 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
806 static struct resource samsung_keypad_resources[] = {
807 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
808 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
811 struct platform_device samsung_device_keypad = {
812 .name = "samsung-keypad",
814 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
815 .resource = samsung_keypad_resources,
818 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
820 struct samsung_keypad_platdata *npd;
822 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
823 &samsung_device_keypad);
826 npd->cfg_gpio = samsung_keypad_cfg_gpio;
828 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
832 #ifdef CONFIG_PLAT_S3C24XX
833 static struct resource s3c_lcd_resource[] = {
834 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
835 [1] = DEFINE_RES_IRQ(IRQ_LCD),
838 struct platform_device s3c_device_lcd = {
839 .name = "s3c2410-lcd",
841 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
842 .resource = s3c_lcd_resource,
844 .dma_mask = &samsung_device_dma_mask,
845 .coherent_dma_mask = DMA_BIT_MASK(32),
849 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
851 struct s3c2410fb_mach_info *npd;
853 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
855 npd->displays = kmemdup(pd->displays,
856 sizeof(struct s3c2410fb_display) * npd->num_displays,
859 printk(KERN_ERR "no memory for LCD display data\n");
861 printk(KERN_ERR "no memory for LCD platform data\n");
864 #endif /* CONFIG_PLAT_S3C24XX */
868 #ifdef CONFIG_S5P_DEV_MFC
869 static struct resource s5p_mfc_resource[] = {
870 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
871 [1] = DEFINE_RES_IRQ(IRQ_MFC),
874 struct platform_device s5p_device_mfc = {
877 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
878 .resource = s5p_mfc_resource,
882 * MFC hardware has 2 memory interfaces which are modelled as two separate
883 * platform devices to let dma-mapping distinguish between them.
885 * MFC parent device (s5p_device_mfc) must be registered before memory
886 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
889 struct platform_device s5p_device_mfc_l = {
893 .parent = &s5p_device_mfc.dev,
894 .dma_mask = &samsung_device_dma_mask,
895 .coherent_dma_mask = DMA_BIT_MASK(32),
899 struct platform_device s5p_device_mfc_r = {
903 .parent = &s5p_device_mfc.dev,
904 .dma_mask = &samsung_device_dma_mask,
905 .coherent_dma_mask = DMA_BIT_MASK(32),
908 #endif /* CONFIG_S5P_DEV_MFC */
912 #ifdef CONFIG_S5P_DEV_CSIS0
913 static struct resource s5p_mipi_csis0_resource[] = {
914 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
915 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
918 struct platform_device s5p_device_mipi_csis0 = {
919 .name = "s5p-mipi-csis",
921 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
922 .resource = s5p_mipi_csis0_resource,
924 #endif /* CONFIG_S5P_DEV_CSIS0 */
926 #ifdef CONFIG_S5P_DEV_CSIS1
927 static struct resource s5p_mipi_csis1_resource[] = {
928 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
929 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
932 struct platform_device s5p_device_mipi_csis1 = {
933 .name = "s5p-mipi-csis",
935 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
936 .resource = s5p_mipi_csis1_resource,
942 #ifdef CONFIG_S3C_DEV_NAND
943 static struct resource s3c_nand_resource[] = {
944 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
947 struct platform_device s3c_device_nand = {
948 .name = "s3c2410-nand",
950 .num_resources = ARRAY_SIZE(s3c_nand_resource),
951 .resource = s3c_nand_resource,
955 * s3c_nand_copy_set() - copy nand set data
956 * @set: The new structure, directly copied from the old.
958 * Copy all the fields from the NAND set field from what is probably __initdata
959 * to new kernel memory. The code returns 0 if the copy happened correctly or
960 * an error code for the calling function to display.
962 * Note, we currently do not try and look to see if we've already copied the
963 * data in a previous set.
965 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
970 size = sizeof(struct mtd_partition) * set->nr_partitions;
972 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
973 set->partitions = ptr;
979 if (set->nr_map && set->nr_chips) {
980 size = sizeof(int) * set->nr_chips;
981 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
988 if (set->ecc_layout) {
989 ptr = kmemdup(set->ecc_layout,
990 sizeof(struct nand_ecclayout), GFP_KERNEL);
991 set->ecc_layout = ptr;
1000 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1002 struct s3c2410_platform_nand *npd;
1006 /* note, if we get a failure in allocation, we simply drop out of the
1007 * function. If there is so little memory available at initialisation
1008 * time then there is little chance the system is going to run.
1011 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1016 /* now see if we need to copy any of the nand set data */
1018 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1020 struct s3c2410_nand_set *from = npd->sets;
1021 struct s3c2410_nand_set *to;
1024 to = kmemdup(from, size, GFP_KERNEL);
1025 npd->sets = to; /* set, even if we failed */
1028 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1032 for (i = 0; i < npd->nr_sets; i++) {
1033 ret = s3c_nand_copy_set(to);
1035 printk(KERN_ERR "%s: failed to copy set %d\n",
1043 #endif /* CONFIG_S3C_DEV_NAND */
1047 #ifdef CONFIG_S3C_DEV_ONENAND
1048 static struct resource s3c_onenand_resources[] = {
1049 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1050 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1051 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1054 struct platform_device s3c_device_onenand = {
1055 .name = "samsung-onenand",
1057 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1058 .resource = s3c_onenand_resources,
1060 #endif /* CONFIG_S3C_DEV_ONENAND */
1062 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1063 static struct resource s3c64xx_onenand1_resources[] = {
1064 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1065 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1066 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1069 struct platform_device s3c64xx_device_onenand1 = {
1070 .name = "samsung-onenand",
1072 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1073 .resource = s3c64xx_onenand1_resources,
1076 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1078 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1079 &s3c64xx_device_onenand1);
1081 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1083 #ifdef CONFIG_S5P_DEV_ONENAND
1084 static struct resource s5p_onenand_resources[] = {
1085 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1086 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1087 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1090 struct platform_device s5p_device_onenand = {
1091 .name = "s5pc110-onenand",
1093 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1094 .resource = s5p_onenand_resources,
1096 #endif /* CONFIG_S5P_DEV_ONENAND */
1100 #ifdef CONFIG_PLAT_S5P
1101 static struct resource s5p_pmu_resource[] = {
1102 DEFINE_RES_IRQ(IRQ_PMU)
1105 static struct platform_device s5p_device_pmu = {
1107 .id = ARM_PMU_DEVICE_CPU,
1108 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1109 .resource = s5p_pmu_resource,
1112 static int __init s5p_pmu_init(void)
1114 platform_device_register(&s5p_device_pmu);
1117 arch_initcall(s5p_pmu_init);
1118 #endif /* CONFIG_PLAT_S5P */
1122 #ifdef CONFIG_SAMSUNG_DEV_PWM
1124 #define TIMER_RESOURCE_SIZE (1)
1126 #define TIMER_RESOURCE(_tmr, _irq) \
1127 (struct resource [TIMER_RESOURCE_SIZE]) { \
1131 .flags = IORESOURCE_IRQ \
1135 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1136 .name = "s3c24xx-pwm", \
1138 .num_resources = TIMER_RESOURCE_SIZE, \
1139 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1142 * since we already have an static mapping for the timer,
1143 * we do not bother setting any IO resource for the base.
1146 struct platform_device s3c_device_timer[] = {
1147 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1148 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1149 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1150 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1151 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1153 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1157 #ifdef CONFIG_PLAT_S3C24XX
1158 static struct resource s3c_rtc_resource[] = {
1159 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1160 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1161 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1164 struct platform_device s3c_device_rtc = {
1165 .name = "s3c2410-rtc",
1167 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1168 .resource = s3c_rtc_resource,
1170 #endif /* CONFIG_PLAT_S3C24XX */
1172 #ifdef CONFIG_S3C_DEV_RTC
1173 static struct resource s3c_rtc_resource[] = {
1174 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1175 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1176 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1179 struct platform_device s3c_device_rtc = {
1180 .name = "s3c64xx-rtc",
1182 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1183 .resource = s3c_rtc_resource,
1185 #endif /* CONFIG_S3C_DEV_RTC */
1189 #ifdef CONFIG_PLAT_S3C24XX
1190 static struct resource s3c_sdi_resource[] = {
1191 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1192 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1195 struct platform_device s3c_device_sdi = {
1196 .name = "s3c2410-sdi",
1198 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1199 .resource = s3c_sdi_resource,
1202 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1204 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1207 #endif /* CONFIG_PLAT_S3C24XX */
1211 #ifdef CONFIG_PLAT_S3C24XX
1212 static struct resource s3c_spi0_resource[] = {
1213 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1214 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1217 struct platform_device s3c_device_spi0 = {
1218 .name = "s3c2410-spi",
1220 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1221 .resource = s3c_spi0_resource,
1223 .dma_mask = &samsung_device_dma_mask,
1224 .coherent_dma_mask = DMA_BIT_MASK(32),
1228 static struct resource s3c_spi1_resource[] = {
1229 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1230 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1233 struct platform_device s3c_device_spi1 = {
1234 .name = "s3c2410-spi",
1236 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1237 .resource = s3c_spi1_resource,
1239 .dma_mask = &samsung_device_dma_mask,
1240 .coherent_dma_mask = DMA_BIT_MASK(32),
1243 #endif /* CONFIG_PLAT_S3C24XX */
1247 #ifdef CONFIG_PLAT_S3C24XX
1248 static struct resource s3c_ts_resource[] = {
1249 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1250 [1] = DEFINE_RES_IRQ(IRQ_TC),
1253 struct platform_device s3c_device_ts = {
1254 .name = "s3c2410-ts",
1256 .dev.parent = &s3c_device_adc.dev,
1257 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1258 .resource = s3c_ts_resource,
1261 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1263 s3c_set_platdata(hard_s3c2410ts_info,
1264 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1266 #endif /* CONFIG_PLAT_S3C24XX */
1268 #ifdef CONFIG_SAMSUNG_DEV_TS
1269 static struct resource s3c_ts_resource[] = {
1270 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1271 [1] = DEFINE_RES_IRQ(IRQ_TC),
1274 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1277 .oversampling_shift = 2,
1280 struct platform_device s3c_device_ts = {
1281 .name = "s3c64xx-ts",
1283 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1284 .resource = s3c_ts_resource,
1287 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1290 pd = &default_ts_data;
1292 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1295 #endif /* CONFIG_SAMSUNG_DEV_TS */
1299 #ifdef CONFIG_S5P_DEV_TV
1301 static struct resource s5p_hdmi_resources[] = {
1302 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1303 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1306 struct platform_device s5p_device_hdmi = {
1309 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1310 .resource = s5p_hdmi_resources,
1313 static struct resource s5p_sdo_resources[] = {
1314 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1315 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1318 struct platform_device s5p_device_sdo = {
1321 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1322 .resource = s5p_sdo_resources,
1325 static struct resource s5p_mixer_resources[] = {
1326 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1327 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1328 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1331 struct platform_device s5p_device_mixer = {
1332 .name = "s5p-mixer",
1334 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1335 .resource = s5p_mixer_resources,
1337 .dma_mask = &samsung_device_dma_mask,
1338 .coherent_dma_mask = DMA_BIT_MASK(32),
1341 #endif /* CONFIG_S5P_DEV_TV */
1345 #ifdef CONFIG_S3C_DEV_USB_HOST
1346 static struct resource s3c_usb_resource[] = {
1347 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1348 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1351 struct platform_device s3c_device_ohci = {
1352 .name = "s3c2410-ohci",
1354 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1355 .resource = s3c_usb_resource,
1357 .dma_mask = &samsung_device_dma_mask,
1358 .coherent_dma_mask = DMA_BIT_MASK(32),
1363 * s3c_ohci_set_platdata - initialise OHCI device platform data
1364 * @info: The platform data.
1366 * This call copies the @info passed in and sets the device .platform_data
1367 * field to that copy. The @info is copied so that the original can be marked
1371 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1373 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1376 #endif /* CONFIG_S3C_DEV_USB_HOST */
1378 /* USB Device (Gadget) */
1380 #ifdef CONFIG_PLAT_S3C24XX
1381 static struct resource s3c_usbgadget_resource[] = {
1382 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1383 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1386 struct platform_device s3c_device_usbgadget = {
1387 .name = "s3c2410-usbgadget",
1389 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1390 .resource = s3c_usbgadget_resource,
1393 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1395 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1397 #endif /* CONFIG_PLAT_S3C24XX */
1399 /* USB EHCI Host Controller */
1401 #ifdef CONFIG_S5P_DEV_USB_EHCI
1402 static struct resource s5p_ehci_resource[] = {
1403 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1404 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1407 struct platform_device s5p_device_ehci = {
1410 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1411 .resource = s5p_ehci_resource,
1413 .dma_mask = &samsung_device_dma_mask,
1414 .coherent_dma_mask = DMA_BIT_MASK(32),
1418 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1420 struct s5p_ehci_platdata *npd;
1422 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1426 npd->phy_init = s5p_usb_phy_init;
1428 npd->phy_exit = s5p_usb_phy_exit;
1430 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1434 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1435 static struct resource s3c_usb_hsotg_resources[] = {
1436 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1437 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1440 struct platform_device s3c_device_usb_hsotg = {
1441 .name = "s3c-hsotg",
1443 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1444 .resource = s3c_usb_hsotg_resources,
1446 .dma_mask = &samsung_device_dma_mask,
1447 .coherent_dma_mask = DMA_BIT_MASK(32),
1451 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1453 struct s3c_hsotg_plat *npd;
1455 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1456 &s3c_device_usb_hsotg);
1459 npd->phy_init = s5p_usb_phy_init;
1461 npd->phy_exit = s5p_usb_phy_exit;
1463 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1465 /* USB High Spped 2.0 Device (Gadget) */
1467 #ifdef CONFIG_PLAT_S3C24XX
1468 static struct resource s3c_hsudc_resource[] = {
1469 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1470 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1473 struct platform_device s3c_device_usb_hsudc = {
1474 .name = "s3c-hsudc",
1476 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1477 .resource = s3c_hsudc_resource,
1479 .dma_mask = &samsung_device_dma_mask,
1480 .coherent_dma_mask = DMA_BIT_MASK(32),
1484 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1486 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1488 #endif /* CONFIG_PLAT_S3C24XX */
1492 #ifdef CONFIG_S3C_DEV_WDT
1493 static struct resource s3c_wdt_resource[] = {
1494 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1495 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1498 struct platform_device s3c_device_wdt = {
1499 .name = "s3c2410-wdt",
1501 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1502 .resource = s3c_wdt_resource,
1504 #endif /* CONFIG_S3C_DEV_WDT */
1506 #ifdef CONFIG_S3C64XX_DEV_SPI0
1507 static struct resource s3c64xx_spi0_resource[] = {
1508 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1509 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1510 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1511 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1514 struct platform_device s3c64xx_device_spi0 = {
1515 .name = "s3c64xx-spi",
1517 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1518 .resource = s3c64xx_spi0_resource,
1520 .dma_mask = &samsung_device_dma_mask,
1521 .coherent_dma_mask = DMA_BIT_MASK(32),
1525 void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1526 int src_clk_nr, int num_cs)
1529 pr_err("%s:Need to pass platform data\n", __func__);
1533 /* Reject invalid configuration */
1534 if (!num_cs || src_clk_nr < 0) {
1535 pr_err("%s: Invalid SPI configuration\n", __func__);
1539 pd->num_cs = num_cs;
1540 pd->src_clk_nr = src_clk_nr;
1542 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1544 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1546 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1548 #ifdef CONFIG_S3C64XX_DEV_SPI1
1549 static struct resource s3c64xx_spi1_resource[] = {
1550 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1551 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1552 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1553 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1556 struct platform_device s3c64xx_device_spi1 = {
1557 .name = "s3c64xx-spi",
1559 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1560 .resource = s3c64xx_spi1_resource,
1562 .dma_mask = &samsung_device_dma_mask,
1563 .coherent_dma_mask = DMA_BIT_MASK(32),
1567 void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1568 int src_clk_nr, int num_cs)
1571 pr_err("%s:Need to pass platform data\n", __func__);
1575 /* Reject invalid configuration */
1576 if (!num_cs || src_clk_nr < 0) {
1577 pr_err("%s: Invalid SPI configuration\n", __func__);
1581 pd->num_cs = num_cs;
1582 pd->src_clk_nr = src_clk_nr;
1584 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1586 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1588 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1590 #ifdef CONFIG_S3C64XX_DEV_SPI2
1591 static struct resource s3c64xx_spi2_resource[] = {
1592 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1593 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1594 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1595 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1598 struct platform_device s3c64xx_device_spi2 = {
1599 .name = "s3c64xx-spi",
1601 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1602 .resource = s3c64xx_spi2_resource,
1604 .dma_mask = &samsung_device_dma_mask,
1605 .coherent_dma_mask = DMA_BIT_MASK(32),
1609 void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1610 int src_clk_nr, int num_cs)
1613 pr_err("%s:Need to pass platform data\n", __func__);
1617 /* Reject invalid configuration */
1618 if (!num_cs || src_clk_nr < 0) {
1619 pr_err("%s: Invalid SPI configuration\n", __func__);
1623 pd->num_cs = num_cs;
1624 pd->src_clk_nr = src_clk_nr;
1626 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1628 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1630 #endif /* CONFIG_S3C64XX_DEV_SPI2 */