arch/arm/plat-samsung/devs.c

   1 /* linux/arch/arm/plat-samsung/devs.c
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * Base SAMSUNG platform device definitions
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/types.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/list.h>
  17 #include <linux/timer.h>
  18 #include <linux/init.h>
  19 #include <linux/serial_core.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/io.h>
  22 #include <linux/slab.h>
  23 #include <linux/string.h>
  24 #include <linux/dma-mapping.h>
  25 #include <linux/fb.h>
  26 #include <linux/gfp.h>
  27 #include <linux/mtd/mtd.h>
  28 #include <linux/mtd/onenand.h>
  29 #include <linux/mtd/partitions.h>
  30 #include <linux/mmc/host.h>
  31 #include <linux/ioport.h>
  32 #include <linux/platform_data/s3c-hsudc.h>
  33
  34 #include <asm/irq.h>
  35 #include <asm/pmu.h>
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/map.h>
  38 #include <asm/mach/irq.h>
  39
  40 #include <mach/hardware.h>
  41 #include <mach/dma.h>
  42 #include <mach/irqs.h>
  43 #include <mach/map.h>
  44
  45 #include <plat/cpu.h>
  46 #include <plat/devs.h>
  47 #include <plat/adc.h>
  48 #include <plat/ata.h>
  49 #include <plat/ehci.h>
  50 #include <plat/fb.h>
  51 #include <plat/fb-s3c2410.h>
  52 #include <plat/hwmon.h>
  53 #include <plat/iic.h>
  54 #include <plat/keypad.h>
  55 #include <plat/mci.h>
  56 #include <plat/nand.h>
  57 #include <plat/sdhci.h>
  58 #include <plat/ts.h>
  59 #include <plat/udc.h>
  60 #include <plat/usb-control.h>
  61 #include <plat/usb-phy.h>
  62 #include <plat/regs-iic.h>
  63 #include <plat/regs-serial.h>
  64 #include <plat/regs-spi.h>
  65 #include <plat/s3c64xx-spi.h>
  66
  67 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  68
  69 /* AC97 */
  70 #ifdef CONFIG_CPU_S3C2440
  71 static struct resource s3c_ac97_resource[] = {
  72         [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  73         [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  74         [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  75         [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  76         [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  77 };
  78
  79 struct platform_device s3c_device_ac97 = {
  80         .name           = "samsung-ac97",
  81         .id             = -1,
  82         .num_resources  = ARRAY_SIZE(s3c_ac97_resource),
  83         .resource       = s3c_ac97_resource,
  84         .dev            = {
  85                 .dma_mask               = &samsung_device_dma_mask,
  86                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  87         }
  88 };
  89 #endif /* CONFIG_CPU_S3C2440 */
  90
  91 /* ADC */
  92
  93 #ifdef CONFIG_PLAT_S3C24XX
  94 static struct resource s3c_adc_resource[] = {
  95         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  96         [1] = DEFINE_RES_IRQ(IRQ_TC),
  97         [2] = DEFINE_RES_IRQ(IRQ_ADC),
  98 };
  99
 100 struct platform_device s3c_device_adc = {
 101         .name           = "s3c24xx-adc",
 102         .id             = -1,
 103         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
 104         .resource       = s3c_adc_resource,
 105 };
 106 #endif /* CONFIG_PLAT_S3C24XX */
 107
 108 #if defined(CONFIG_SAMSUNG_DEV_ADC)
 109 static struct resource s3c_adc_resource[] = {
 110         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
 111         [1] = DEFINE_RES_IRQ(IRQ_TC),
 112         [2] = DEFINE_RES_IRQ(IRQ_ADC),
 113 };
 114
 115 struct platform_device s3c_device_adc = {
 116         .name           = "samsung-adc",
 117         .id             = -1,
 118         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
 119         .resource       = s3c_adc_resource,
 120 };
 121 #endif /* CONFIG_SAMSUNG_DEV_ADC */
 122
 123 /* Camif Controller */
 124
 125 #ifdef CONFIG_CPU_S3C2440
 126 static struct resource s3c_camif_resource[] = {
 127         [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
 128         [1] = DEFINE_RES_IRQ(IRQ_CAM),
 129 };
 130
 131 struct platform_device s3c_device_camif = {
 132         .name           = "s3c2440-camif",
 133         .id             = -1,
 134         .num_resources  = ARRAY_SIZE(s3c_camif_resource),
 135         .resource       = s3c_camif_resource,
 136         .dev            = {
 137                 .dma_mask               = &samsung_device_dma_mask,
 138                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 139         }
 140 };
 141 #endif /* CONFIG_CPU_S3C2440 */
 142
 143 /* ASOC DMA */
 144
 145 struct platform_device samsung_asoc_dma = {
 146         .name           = "samsung-audio",
 147         .id             = -1,
 148         .dev            = {
 149                 .dma_mask               = &samsung_device_dma_mask,
 150                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 151         }
 152 };
 153
 154 struct platform_device samsung_asoc_idma = {
 155         .name           = "samsung-idma",
 156         .id             = -1,
 157         .dev            = {
 158                 .dma_mask               = &samsung_device_dma_mask,
 159                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 160         }
 161 };
 162
 163 /* FB */
 164
 165 #ifdef CONFIG_S3C_DEV_FB
 166 static struct resource s3c_fb_resource[] = {
 167         [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
 168         [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
 169         [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
 170         [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
 171 };
 172
 173 struct platform_device s3c_device_fb = {
 174         .name           = "s3c-fb",
 175         .id             = -1,
 176         .num_resources  = ARRAY_SIZE(s3c_fb_resource),
 177         .resource       = s3c_fb_resource,
 178         .dev            = {
 179                 .dma_mask               = &samsung_device_dma_mask,
 180                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 181         },
 182 };
 183
 184 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
 185 {
 186         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
 187                          &s3c_device_fb);
 188 }
 189 #endif /* CONFIG_S3C_DEV_FB */
 190
 191 /* FIMC */
 192
 193 #ifdef CONFIG_S5P_DEV_FIMC0
 194 static struct resource s5p_fimc0_resource[] = {
 195         [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
 196         [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
 197 };
 198
 199 struct platform_device s5p_device_fimc0 = {
 200         .name           = "s5p-fimc",
 201         .id             = 0,
 202         .num_resources  = ARRAY_SIZE(s5p_fimc0_resource),
 203         .resource       = s5p_fimc0_resource,
 204         .dev            = {
 205                 .dma_mask               = &samsung_device_dma_mask,
 206                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 207         },
 208 };
 209
 210 struct platform_device s5p_device_fimc_md = {
 211         .name   = "s5p-fimc-md",
 212         .id     = -1,
 213 };
 214 #endif /* CONFIG_S5P_DEV_FIMC0 */
 215
 216 #ifdef CONFIG_S5P_DEV_FIMC1
 217 static struct resource s5p_fimc1_resource[] = {
 218         [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
 219         [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
 220 };
 221
 222 struct platform_device s5p_device_fimc1 = {
 223         .name           = "s5p-fimc",
 224         .id             = 1,
 225         .num_resources  = ARRAY_SIZE(s5p_fimc1_resource),
 226         .resource       = s5p_fimc1_resource,
 227         .dev            = {
 228                 .dma_mask               = &samsung_device_dma_mask,
 229                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 230         },
 231 };
 232 #endif /* CONFIG_S5P_DEV_FIMC1 */
 233
 234 #ifdef CONFIG_S5P_DEV_FIMC2
 235 static struct resource s5p_fimc2_resource[] = {
 236         [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
 237         [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
 238 };
 239
 240 struct platform_device s5p_device_fimc2 = {
 241         .name           = "s5p-fimc",
 242         .id             = 2,
 243         .num_resources  = ARRAY_SIZE(s5p_fimc2_resource),
 244         .resource       = s5p_fimc2_resource,
 245         .dev            = {
 246                 .dma_mask               = &samsung_device_dma_mask,
 247                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 248         },
 249 };
 250 #endif /* CONFIG_S5P_DEV_FIMC2 */
 251
 252 #ifdef CONFIG_S5P_DEV_FIMC3
 253 static struct resource s5p_fimc3_resource[] = {
 254         [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
 255         [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
 256 };
 257
 258 struct platform_device s5p_device_fimc3 = {
 259         .name           = "s5p-fimc",
 260         .id             = 3,
 261         .num_resources  = ARRAY_SIZE(s5p_fimc3_resource),
 262         .resource       = s5p_fimc3_resource,
 263         .dev            = {
 264                 .dma_mask               = &samsung_device_dma_mask,
 265                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 266         },
 267 };
 268 #endif /* CONFIG_S5P_DEV_FIMC3 */
 269
 270 /* FIMD0 */
 271
 272 #ifdef CONFIG_S5P_DEV_FIMD0
 273 static struct resource s5p_fimd0_resource[] = {
 274         [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
 275         [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
 276         [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
 277         [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
 278 };
 279
 280 struct platform_device s5p_device_fimd0 = {
 281         .name           = "s5p-fb",
 282         .id             = 0,
 283         .num_resources  = ARRAY_SIZE(s5p_fimd0_resource),
 284         .resource       = s5p_fimd0_resource,
 285         .dev            = {
 286                 .dma_mask               = &samsung_device_dma_mask,
 287                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 288         },
 289 };
 290
 291 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
 292 {
 293         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
 294                          &s5p_device_fimd0);
 295 }
 296 #endif /* CONFIG_S5P_DEV_FIMD0 */
 297
 298 /* HWMON */
 299
 300 #ifdef CONFIG_S3C_DEV_HWMON
 301 struct platform_device s3c_device_hwmon = {
 302         .name           = "s3c-hwmon",
 303         .id             = -1,
 304         .dev.parent     = &s3c_device_adc.dev,
 305 };
 306
 307 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
 308 {
 309         s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
 310                          &s3c_device_hwmon);
 311 }
 312 #endif /* CONFIG_S3C_DEV_HWMON */
 313
 314 /* HSMMC */
 315
 316 #ifdef CONFIG_S3C_DEV_HSMMC
 317 static struct resource s3c_hsmmc_resource[] = {
 318         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
 319         [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
 320 };
 321
 322 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
 323         .max_width      = 4,
 324         .host_caps      = (MMC_CAP_4_BIT_DATA |
 325                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 326         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
 327 };
 328
 329 struct platform_device s3c_device_hsmmc0 = {
 330         .name           = "s3c-sdhci",
 331         .id             = 0,
 332         .num_resources  = ARRAY_SIZE(s3c_hsmmc_resource),
 333         .resource       = s3c_hsmmc_resource,
 334         .dev            = {
 335                 .dma_mask               = &samsung_device_dma_mask,
 336                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 337                 .platform_data          = &s3c_hsmmc0_def_platdata,
 338         },
 339 };
 340
 341 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 342 {
 343         s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
 344 }
 345 #endif /* CONFIG_S3C_DEV_HSMMC */
 346
 347 #ifdef CONFIG_S3C_DEV_HSMMC1
 348 static struct resource s3c_hsmmc1_resource[] = {
 349         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
 350         [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
 351 };
 352
 353 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
 354         .max_width      = 4,
 355         .host_caps      = (MMC_CAP_4_BIT_DATA |
 356                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 357         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
 358 };
 359
 360 struct platform_device s3c_device_hsmmc1 = {
 361         .name           = "s3c-sdhci",
 362         .id             = 1,
 363         .num_resources  = ARRAY_SIZE(s3c_hsmmc1_resource),
 364         .resource       = s3c_hsmmc1_resource,
 365         .dev            = {
 366                 .dma_mask               = &samsung_device_dma_mask,
 367                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 368                 .platform_data          = &s3c_hsmmc1_def_platdata,
 369         },
 370 };
 371
 372 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 373 {
 374         s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
 375 }
 376 #endif /* CONFIG_S3C_DEV_HSMMC1 */
 377
 378 /* HSMMC2 */
 379
 380 #ifdef CONFIG_S3C_DEV_HSMMC2
 381 static struct resource s3c_hsmmc2_resource[] = {
 382         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
 383         [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
 384 };
 385
 386 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
 387         .max_width      = 4,
 388         .host_caps      = (MMC_CAP_4_BIT_DATA |
 389                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 390         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
 391 };
 392
 393 struct platform_device s3c_device_hsmmc2 = {
 394         .name           = "s3c-sdhci",
 395         .id             = 2,
 396         .num_resources  = ARRAY_SIZE(s3c_hsmmc2_resource),
 397         .resource       = s3c_hsmmc2_resource,
 398         .dev            = {
 399                 .dma_mask               = &samsung_device_dma_mask,
 400                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 401                 .platform_data          = &s3c_hsmmc2_def_platdata,
 402         },
 403 };
 404
 405 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 406 {
 407         s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
 408 }
 409 #endif /* CONFIG_S3C_DEV_HSMMC2 */
 410
 411 #ifdef CONFIG_S3C_DEV_HSMMC3
 412 static struct resource s3c_hsmmc3_resource[] = {
 413         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
 414         [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
 415 };
 416
 417 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
 418         .max_width      = 4,
 419         .host_caps      = (MMC_CAP_4_BIT_DATA |
 420                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 421         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
 422 };
 423
 424 struct platform_device s3c_device_hsmmc3 = {
 425         .name           = "s3c-sdhci",
 426         .id             = 3,
 427         .num_resources  = ARRAY_SIZE(s3c_hsmmc3_resource),
 428         .resource       = s3c_hsmmc3_resource,
 429         .dev            = {
 430                 .dma_mask               = &samsung_device_dma_mask,
 431                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 432                 .platform_data          = &s3c_hsmmc3_def_platdata,
 433         },
 434 };
 435
 436 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 437 {
 438         s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
 439 }
 440 #endif /* CONFIG_S3C_DEV_HSMMC3 */
 441
 442 /* I2C */
 443
 444 static struct resource s3c_i2c0_resource[] = {
 445         [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
 446         [1] = DEFINE_RES_IRQ(IRQ_IIC),
 447 };
 448
 449 struct platform_device s3c_device_i2c0 = {
 450         .name           = "s3c2410-i2c",
 451 #ifdef CONFIG_S3C_DEV_I2C1
 452         .id             = 0,
 453 #else
 454         .id             = -1,
 455 #endif
 456         .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
 457         .resource       = s3c_i2c0_resource,
 458 };
 459
 460 struct s3c2410_platform_i2c default_i2c_data __initdata = {
 461         .flags          = 0,
 462         .slave_addr     = 0x10,
 463         .frequency      = 100*1000,
 464         .sda_delay      = 100,
 465 };
 466
 467 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
 468 {
 469         struct s3c2410_platform_i2c *npd;
 470
 471         if (!pd) {
 472                 pd = &default_i2c_data;
 473                 pd->bus_num = 0;
 474         }
 475
 476         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 477                                &s3c_device_i2c0);
 478
 479         if (!npd->cfg_gpio)
 480                 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
 481 }
 482
 483 #ifdef CONFIG_S3C_DEV_I2C1
 484 static struct resource s3c_i2c1_resource[] = {
 485         [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
 486         [1] = DEFINE_RES_IRQ(IRQ_IIC1),
 487 };
 488
 489 struct platform_device s3c_device_i2c1 = {
 490         .name           = "s3c2410-i2c",
 491         .id             = 1,
 492         .num_resources  = ARRAY_SIZE(s3c_i2c1_resource),
 493         .resource       = s3c_i2c1_resource,
 494 };
 495
 496 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
 497 {
 498         struct s3c2410_platform_i2c *npd;
 499
 500         if (!pd) {
 501                 pd = &default_i2c_data;
 502                 pd->bus_num = 1;
 503         }
 504
 505         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 506                                &s3c_device_i2c1);
 507
 508         if (!npd->cfg_gpio)
 509                 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
 510 }
 511 #endif /* CONFIG_S3C_DEV_I2C1 */
 512
 513 #ifdef CONFIG_S3C_DEV_I2C2
 514 static struct resource s3c_i2c2_resource[] = {
 515         [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
 516         [1] = DEFINE_RES_IRQ(IRQ_IIC2),
 517 };
 518
 519 struct platform_device s3c_device_i2c2 = {
 520         .name           = "s3c2410-i2c",
 521         .id             = 2,
 522         .num_resources  = ARRAY_SIZE(s3c_i2c2_resource),
 523         .resource       = s3c_i2c2_resource,
 524 };
 525
 526 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
 527 {
 528         struct s3c2410_platform_i2c *npd;
 529
 530         if (!pd) {
 531                 pd = &default_i2c_data;
 532                 pd->bus_num = 2;
 533         }
 534
 535         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 536                                &s3c_device_i2c2);
 537
 538         if (!npd->cfg_gpio)
 539                 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
 540 }
 541 #endif /* CONFIG_S3C_DEV_I2C2 */
 542
 543 #ifdef CONFIG_S3C_DEV_I2C3
 544 static struct resource s3c_i2c3_resource[] = {
 545         [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
 546         [1] = DEFINE_RES_IRQ(IRQ_IIC3),
 547 };
 548
 549 struct platform_device s3c_device_i2c3 = {
 550         .name           = "s3c2440-i2c",
 551         .id             = 3,
 552         .num_resources  = ARRAY_SIZE(s3c_i2c3_resource),
 553         .resource       = s3c_i2c3_resource,
 554 };
 555
 556 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
 557 {
 558         struct s3c2410_platform_i2c *npd;
 559
 560         if (!pd) {
 561                 pd = &default_i2c_data;
 562                 pd->bus_num = 3;
 563         }
 564
 565         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 566                                &s3c_device_i2c3);
 567
 568         if (!npd->cfg_gpio)
 569                 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
 570 }
 571 #endif /*CONFIG_S3C_DEV_I2C3 */
 572
 573 #ifdef CONFIG_S3C_DEV_I2C4
 574 static struct resource s3c_i2c4_resource[] = {
 575         [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
 576         [1] = DEFINE_RES_IRQ(IRQ_IIC4),
 577 };
 578
 579 struct platform_device s3c_device_i2c4 = {
 580         .name           = "s3c2440-i2c",
 581         .id             = 4,
 582         .num_resources  = ARRAY_SIZE(s3c_i2c4_resource),
 583         .resource       = s3c_i2c4_resource,
 584 };
 585
 586 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
 587 {
 588         struct s3c2410_platform_i2c *npd;
 589
 590         if (!pd) {
 591                 pd = &default_i2c_data;
 592                 pd->bus_num = 4;
 593         }
 594
 595         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 596                                &s3c_device_i2c4);
 597
 598         if (!npd->cfg_gpio)
 599                 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
 600 }
 601 #endif /*CONFIG_S3C_DEV_I2C4 */
 602
 603 #ifdef CONFIG_S3C_DEV_I2C5
 604 static struct resource s3c_i2c5_resource[] = {
 605         [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
 606         [1] = DEFINE_RES_IRQ(IRQ_IIC5),
 607 };
 608
 609 struct platform_device s3c_device_i2c5 = {
 610         .name           = "s3c2440-i2c",
 611         .id             = 5,
 612         .num_resources  = ARRAY_SIZE(s3c_i2c5_resource),
 613         .resource       = s3c_i2c5_resource,
 614 };
 615
 616 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
 617 {
 618         struct s3c2410_platform_i2c *npd;
 619
 620         if (!pd) {
 621                 pd = &default_i2c_data;
 622                 pd->bus_num = 5;
 623         }
 624
 625         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 626                                &s3c_device_i2c5);
 627
 628         if (!npd->cfg_gpio)
 629                 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
 630 }
 631 #endif /*CONFIG_S3C_DEV_I2C5 */
 632
 633 #ifdef CONFIG_S3C_DEV_I2C6
 634 static struct resource s3c_i2c6_resource[] = {
 635         [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
 636         [1] = DEFINE_RES_IRQ(IRQ_IIC6),
 637 };
 638
 639 struct platform_device s3c_device_i2c6 = {
 640         .name           = "s3c2440-i2c",
 641         .id             = 6,
 642         .num_resources  = ARRAY_SIZE(s3c_i2c6_resource),
 643         .resource       = s3c_i2c6_resource,
 644 };
 645
 646 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
 647 {
 648         struct s3c2410_platform_i2c *npd;
 649
 650         if (!pd) {
 651                 pd = &default_i2c_data;
 652                 pd->bus_num = 6;
 653         }
 654
 655         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 656                                &s3c_device_i2c6);
 657
 658         if (!npd->cfg_gpio)
 659                 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
 660 }
 661 #endif /* CONFIG_S3C_DEV_I2C6 */
 662
 663 #ifdef CONFIG_S3C_DEV_I2C7
 664 static struct resource s3c_i2c7_resource[] = {
 665         [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
 666         [1] = DEFINE_RES_IRQ(IRQ_IIC7),
 667 };
 668
 669 struct platform_device s3c_device_i2c7 = {
 670         .name           = "s3c2440-i2c",
 671         .id             = 7,
 672         .num_resources  = ARRAY_SIZE(s3c_i2c7_resource),
 673         .resource       = s3c_i2c7_resource,
 674 };
 675
 676 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
 677 {
 678         struct s3c2410_platform_i2c *npd;
 679
 680         if (!pd) {
 681                 pd = &default_i2c_data;
 682                 pd->bus_num = 7;
 683         }
 684
 685         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 686                                &s3c_device_i2c7);
 687
 688         if (!npd->cfg_gpio)
 689                 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
 690 }
 691 #endif /* CONFIG_S3C_DEV_I2C7 */
 692
 693 /* I2C HDMIPHY */
 694
 695 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
 696 static struct resource s5p_i2c_resource[] = {
 697         [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
 698         [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
 699 };
 700
 701 struct platform_device s5p_device_i2c_hdmiphy = {
 702         .name           = "s3c2440-hdmiphy-i2c",
 703         .id             = -1,
 704         .num_resources  = ARRAY_SIZE(s5p_i2c_resource),
 705         .resource       = s5p_i2c_resource,
 706 };
 707
 708 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
 709 {
 710         struct s3c2410_platform_i2c *npd;
 711
 712         if (!pd) {
 713                 pd = &default_i2c_data;
 714
 715                 if (soc_is_exynos4210())
 716                         pd->bus_num = 8;
 717                 else if (soc_is_s5pv210())
 718                         pd->bus_num = 3;
 719                 else
 720                         pd->bus_num = 0;
 721         }
 722
 723         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 724                                &s5p_device_i2c_hdmiphy);
 725 }
 726 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
 727
 728 /* I2S */
 729
 730 #ifdef CONFIG_PLAT_S3C24XX
 731 static struct resource s3c_iis_resource[] = {
 732         [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
 733 };
 734
 735 struct platform_device s3c_device_iis = {
 736         .name           = "s3c24xx-iis",
 737         .id             = -1,
 738         .num_resources  = ARRAY_SIZE(s3c_iis_resource),
 739         .resource       = s3c_iis_resource,
 740         .dev            = {
 741                 .dma_mask               = &samsung_device_dma_mask,
 742                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 743         }
 744 };
 745 #endif /* CONFIG_PLAT_S3C24XX */
 746
 747 #ifdef CONFIG_CPU_S3C2440
 748 struct platform_device s3c2412_device_iis = {
 749         .name           = "s3c2412-iis",
 750         .id             = -1,
 751         .dev            = {
 752                 .dma_mask               = &samsung_device_dma_mask,
 753                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 754         }
 755 };
 756 #endif /* CONFIG_CPU_S3C2440 */
 757
 758 /* IDE CFCON */
 759
 760 #ifdef CONFIG_SAMSUNG_DEV_IDE
 761 static struct resource s3c_cfcon_resource[] = {
 762         [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
 763         [1] = DEFINE_RES_IRQ(IRQ_CFCON),
 764 };
 765
 766 struct platform_device s3c_device_cfcon = {
 767         .id             = 0,
 768         .num_resources  = ARRAY_SIZE(s3c_cfcon_resource),
 769         .resource       = s3c_cfcon_resource,
 770 };
 771
 772 void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
 773 {
 774         s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
 775                          &s3c_device_cfcon);
 776 }
 777 #endif /* CONFIG_SAMSUNG_DEV_IDE */
 778
 779 /* KEYPAD */
 780
 781 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
 782 static struct resource samsung_keypad_resources[] = {
 783         [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
 784         [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
 785 };
 786
 787 struct platform_device samsung_device_keypad = {
 788         .name           = "samsung-keypad",
 789         .id             = -1,
 790         .num_resources  = ARRAY_SIZE(samsung_keypad_resources),
 791         .resource       = samsung_keypad_resources,
 792 };
 793
 794 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
 795 {
 796         struct samsung_keypad_platdata *npd;
 797
 798         npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
 799                         &samsung_device_keypad);
 800
 801         if (!npd->cfg_gpio)
 802                 npd->cfg_gpio = samsung_keypad_cfg_gpio;
 803 }
 804 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
 805
 806 /* LCD Controller */
 807
 808 #ifdef CONFIG_PLAT_S3C24XX
 809 static struct resource s3c_lcd_resource[] = {
 810         [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
 811         [1] = DEFINE_RES_IRQ(IRQ_LCD),
 812 };
 813
 814 struct platform_device s3c_device_lcd = {
 815         .name           = "s3c2410-lcd",
 816         .id             = -1,
 817         .num_resources  = ARRAY_SIZE(s3c_lcd_resource),
 818         .resource       = s3c_lcd_resource,
 819         .dev            = {
 820                 .dma_mask               = &samsung_device_dma_mask,
 821                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 822         }
 823 };
 824
 825 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
 826 {
 827         struct s3c2410fb_mach_info *npd;
 828
 829         npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
 830         if (npd) {
 831                 npd->displays = kmemdup(pd->displays,
 832                         sizeof(struct s3c2410fb_display) * npd->num_displays,
 833                         GFP_KERNEL);
 834                 if (!npd->displays)
 835                         printk(KERN_ERR "no memory for LCD display data\n");
 836         } else {
 837                 printk(KERN_ERR "no memory for LCD platform data\n");
 838         }
 839 }
 840 #endif /* CONFIG_PLAT_S3C24XX */
 841
 842 /* MFC */
 843
 844 #ifdef CONFIG_S5P_DEV_MFC
 845 static struct resource s5p_mfc_resource[] = {
 846         [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
 847         [1] = DEFINE_RES_IRQ(IRQ_MFC),
 848 };
 849
 850 struct platform_device s5p_device_mfc = {
 851         .name           = "s5p-mfc",
 852         .id             = -1,
 853         .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
 854         .resource       = s5p_mfc_resource,
 855 };
 856
 857 /*
 858  * MFC hardware has 2 memory interfaces which are modelled as two separate
 859  * platform devices to let dma-mapping distinguish between them.
 860  *
 861  * MFC parent device (s5p_device_mfc) must be registered before memory
 862  * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
 863  */
 864
 865 struct platform_device s5p_device_mfc_l = {
 866         .name           = "s5p-mfc-l",
 867         .id             = -1,
 868         .dev            = {
 869                 .parent                 = &s5p_device_mfc.dev,
 870                 .dma_mask               = &samsung_device_dma_mask,
 871                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 872         },
 873 };
 874
 875 struct platform_device s5p_device_mfc_r = {
 876         .name           = "s5p-mfc-r",
 877         .id             = -1,
 878         .dev            = {
 879                 .parent                 = &s5p_device_mfc.dev,
 880                 .dma_mask               = &samsung_device_dma_mask,
 881                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 882         },
 883 };
 884 #endif /* CONFIG_S5P_DEV_MFC */
 885
 886 /* MIPI CSIS */
 887
 888 #ifdef CONFIG_S5P_DEV_CSIS0
 889 static struct resource s5p_mipi_csis0_resource[] = {
 890         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
 891         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
 892 };
 893
 894 struct platform_device s5p_device_mipi_csis0 = {
 895         .name           = "s5p-mipi-csis",
 896         .id             = 0,
 897         .num_resources  = ARRAY_SIZE(s5p_mipi_csis0_resource),
 898         .resource       = s5p_mipi_csis0_resource,
 899 };
 900 #endif /* CONFIG_S5P_DEV_CSIS0 */
 901
 902 #ifdef CONFIG_S5P_DEV_CSIS1
 903 static struct resource s5p_mipi_csis1_resource[] = {
 904         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
 905         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
 906 };
 907
 908 struct platform_device s5p_device_mipi_csis1 = {
 909         .name           = "s5p-mipi-csis",
 910         .id             = 1,
 911         .num_resources  = ARRAY_SIZE(s5p_mipi_csis1_resource),
 912         .resource       = s5p_mipi_csis1_resource,
 913 };
 914 #endif
 915
 916 /* NAND */
 917
 918 #ifdef CONFIG_S3C_DEV_NAND
 919 static struct resource s3c_nand_resource[] = {
 920         [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
 921 };
 922
 923 struct platform_device s3c_device_nand = {
 924         .name           = "s3c2410-nand",
 925         .id             = -1,
 926         .num_resources  = ARRAY_SIZE(s3c_nand_resource),
 927         .resource       = s3c_nand_resource,
 928 };
 929
 930 /*
 931  * s3c_nand_copy_set() - copy nand set data
 932  * @set: The new structure, directly copied from the old.
 933  *
 934  * Copy all the fields from the NAND set field from what is probably __initdata
 935  * to new kernel memory. The code returns 0 if the copy happened correctly or
 936  * an error code for the calling function to display.
 937  *
 938  * Note, we currently do not try and look to see if we've already copied the
 939  * data in a previous set.
 940  */
 941 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
 942 {
 943         void *ptr;
 944         int size;
 945
 946         size = sizeof(struct mtd_partition) * set->nr_partitions;
 947         if (size) {
 948                 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
 949                 set->partitions = ptr;
 950
 951                 if (!ptr)
 952                         return -ENOMEM;
 953         }
 954
 955         if (set->nr_map && set->nr_chips) {
 956                 size = sizeof(int) * set->nr_chips;
 957                 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
 958                 set->nr_map = ptr;
 959
 960                 if (!ptr)
 961                         return -ENOMEM;
 962         }
 963
 964         if (set->ecc_layout) {
 965                 ptr = kmemdup(set->ecc_layout,
 966                               sizeof(struct nand_ecclayout), GFP_KERNEL);
 967                 set->ecc_layout = ptr;
 968
 969                 if (!ptr)
 970                         return -ENOMEM;
 971         }
 972
 973         return 0;
 974 }
 975
 976 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
 977 {
 978         struct s3c2410_platform_nand *npd;
 979         int size;
 980         int ret;
 981
 982         /* note, if we get a failure in allocation, we simply drop out of the
 983          * function. If there is so little memory available at initialisation
 984          * time then there is little chance the system is going to run.
 985          */
 986
 987         npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
 988                                 &s3c_device_nand);
 989         if (!npd)
 990                 return;
 991
 992         /* now see if we need to copy any of the nand set data */
 993
 994         size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
 995         if (size) {
 996                 struct s3c2410_nand_set *from = npd->sets;
 997                 struct s3c2410_nand_set *to;
 998                 int i;
 999
1000                 to = kmemdup(from, size, GFP_KERNEL);
1001                 npd->sets = to; /* set, even if we failed */
1002
1003                 if (!to) {
1004                         printk(KERN_ERR "%s: no memory for sets\n", __func__);
1005                         return;
1006                 }
1007
1008                 for (i = 0; i < npd->nr_sets; i++) {
1009                         ret = s3c_nand_copy_set(to);
1010                         if (ret) {
1011                                 printk(KERN_ERR "%s: failed to copy set %d\n",
1012                                 __func__, i);
1013                                 return;
1014                         }
1015                         to++;
1016                 }
1017         }
1018 }
1019 #endif /* CONFIG_S3C_DEV_NAND */
1020
1021 /* ONENAND */
1022
1023 #ifdef CONFIG_S3C_DEV_ONENAND
1024 static struct resource s3c_onenand_resources[] = {
1025         [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1026         [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1027         [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1028 };
1029
1030 struct platform_device s3c_device_onenand = {
1031         .name           = "samsung-onenand",
1032         .id             = 0,
1033         .num_resources  = ARRAY_SIZE(s3c_onenand_resources),
1034         .resource       = s3c_onenand_resources,
1035 };
1036 #endif /* CONFIG_S3C_DEV_ONENAND */
1037
1038 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1039 static struct resource s3c64xx_onenand1_resources[] = {
1040         [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1041         [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1042         [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1043 };
1044
1045 struct platform_device s3c64xx_device_onenand1 = {
1046         .name           = "samsung-onenand",
1047         .id             = 1,
1048         .num_resources  = ARRAY_SIZE(s3c64xx_onenand1_resources),
1049         .resource       = s3c64xx_onenand1_resources,
1050 };
1051
1052 void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1053 {
1054         s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1055                          &s3c64xx_device_onenand1);
1056 }
1057 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1058
1059 #ifdef CONFIG_S5P_DEV_ONENAND
1060 static struct resource s5p_onenand_resources[] = {
1061         [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1062         [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1063         [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1064 };
1065
1066 struct platform_device s5p_device_onenand = {
1067         .name           = "s5pc110-onenand",
1068         .id             = -1,
1069         .num_resources  = ARRAY_SIZE(s5p_onenand_resources),
1070         .resource       = s5p_onenand_resources,
1071 };
1072 #endif /* CONFIG_S5P_DEV_ONENAND */
1073
1074 /* PMU */
1075
1076 #ifdef CONFIG_PLAT_S5P
1077 static struct resource s5p_pmu_resource[] = {
1078         DEFINE_RES_IRQ(IRQ_PMU)
1079 };
1080
1081 struct platform_device s5p_device_pmu = {
1082         .name           = "arm-pmu",
1083         .id             = ARM_PMU_DEVICE_CPU,
1084         .num_resources  = ARRAY_SIZE(s5p_pmu_resource),
1085         .resource       = s5p_pmu_resource,
1086 };
1087
1088 static int __init s5p_pmu_init(void)
1089 {
1090         platform_device_register(&s5p_device_pmu);
1091         return 0;
1092 }
1093 arch_initcall(s5p_pmu_init);
1094 #endif /* CONFIG_PLAT_S5P */
1095
1096 /* PWM Timer */
1097
1098 #ifdef CONFIG_SAMSUNG_DEV_PWM
1099
1100 #define TIMER_RESOURCE_SIZE (1)
1101
1102 #define TIMER_RESOURCE(_tmr, _irq)                      \
1103         (struct resource [TIMER_RESOURCE_SIZE]) {       \
1104                 [0] = {                                 \
1105                         .start  = _irq,                 \
1106                         .end    = _irq,                 \
1107                         .flags  = IORESOURCE_IRQ        \
1108                 }                                       \
1109         }
1110
1111 #define DEFINE_S3C_TIMER(_tmr_no, _irq)                 \
1112         .name           = "s3c24xx-pwm",                \
1113         .id             = _tmr_no,                      \
1114         .num_resources  = TIMER_RESOURCE_SIZE,          \
1115         .resource       = TIMER_RESOURCE(_tmr_no, _irq),        \
1116
1117 /*
1118  * since we already have an static mapping for the timer,
1119  * we do not bother setting any IO resource for the base.
1120  */
1121
1122 struct platform_device s3c_device_timer[] = {
1123         [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1124         [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1125         [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1126         [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1127         [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1128 };
1129 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1130
1131 /* RTC */
1132
1133 #ifdef CONFIG_PLAT_S3C24XX
1134 static struct resource s3c_rtc_resource[] = {
1135         [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1136         [1] = DEFINE_RES_IRQ(IRQ_RTC),
1137         [2] = DEFINE_RES_IRQ(IRQ_TICK),
1138 };
1139
1140 struct platform_device s3c_device_rtc = {
1141         .name           = "s3c2410-rtc",
1142         .id             = -1,
1143         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1144         .resource       = s3c_rtc_resource,
1145 };
1146 #endif /* CONFIG_PLAT_S3C24XX */
1147
1148 #ifdef CONFIG_S3C_DEV_RTC
1149 static struct resource s3c_rtc_resource[] = {
1150         [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1151         [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1152         [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1153 };
1154
1155 struct platform_device s3c_device_rtc = {
1156         .name           = "s3c64xx-rtc",
1157         .id             = -1,
1158         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1159         .resource       = s3c_rtc_resource,
1160 };
1161 #endif /* CONFIG_S3C_DEV_RTC */
1162
1163 /* SDI */
1164
1165 #ifdef CONFIG_PLAT_S3C24XX
1166 static struct resource s3c_sdi_resource[] = {
1167         [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1168         [1] = DEFINE_RES_IRQ(IRQ_SDI),
1169 };
1170
1171 struct platform_device s3c_device_sdi = {
1172         .name           = "s3c2410-sdi",
1173         .id             = -1,
1174         .num_resources  = ARRAY_SIZE(s3c_sdi_resource),
1175         .resource       = s3c_sdi_resource,
1176 };
1177
1178 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1179 {
1180         s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1181                          &s3c_device_sdi);
1182 }
1183 #endif /* CONFIG_PLAT_S3C24XX */
1184
1185 /* SPI */
1186
1187 #ifdef CONFIG_PLAT_S3C24XX
1188 static struct resource s3c_spi0_resource[] = {
1189         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1190         [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1191 };
1192
1193 struct platform_device s3c_device_spi0 = {
1194         .name           = "s3c2410-spi",
1195         .id             = 0,
1196         .num_resources  = ARRAY_SIZE(s3c_spi0_resource),
1197         .resource       = s3c_spi0_resource,
1198         .dev            = {
1199                 .dma_mask               = &samsung_device_dma_mask,
1200                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1201         }
1202 };
1203
1204 static struct resource s3c_spi1_resource[] = {
1205         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1206         [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1207 };
1208
1209 struct platform_device s3c_device_spi1 = {
1210         .name           = "s3c2410-spi",
1211         .id             = 1,
1212         .num_resources  = ARRAY_SIZE(s3c_spi1_resource),
1213         .resource       = s3c_spi1_resource,
1214         .dev            = {
1215                 .dma_mask               = &samsung_device_dma_mask,
1216                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1217         }
1218 };
1219 #endif /* CONFIG_PLAT_S3C24XX */
1220
1221 /* Touchscreen */
1222
1223 #ifdef CONFIG_PLAT_S3C24XX
1224 static struct resource s3c_ts_resource[] = {
1225         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1226         [1] = DEFINE_RES_IRQ(IRQ_TC),
1227 };
1228
1229 struct platform_device s3c_device_ts = {
1230         .name           = "s3c2410-ts",
1231         .id             = -1,
1232         .dev.parent     = &s3c_device_adc.dev,
1233         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1234         .resource       = s3c_ts_resource,
1235 };
1236
1237 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1238 {
1239         s3c_set_platdata(hard_s3c2410ts_info,
1240                          sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1241 }
1242 #endif /* CONFIG_PLAT_S3C24XX */
1243
1244 #ifdef CONFIG_SAMSUNG_DEV_TS
1245 static struct resource s3c_ts_resource[] = {
1246         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1247         [1] = DEFINE_RES_IRQ(IRQ_TC),
1248 };
1249
1250 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1251         .delay                  = 10000,
1252         .presc                  = 49,
1253         .oversampling_shift     = 2,
1254 };
1255
1256 struct platform_device s3c_device_ts = {
1257         .name           = "s3c64xx-ts",
1258         .id             = -1,
1259         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1260         .resource       = s3c_ts_resource,
1261 };
1262
1263 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1264 {
1265         if (!pd)
1266                 pd = &default_ts_data;
1267
1268         s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1269                          &s3c_device_ts);
1270 }
1271 #endif /* CONFIG_SAMSUNG_DEV_TS */
1272
1273 /* TV */
1274
1275 #ifdef CONFIG_S5P_DEV_TV
1276
1277 static struct resource s5p_hdmi_resources[] = {
1278         [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1279         [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1280 };
1281
1282 struct platform_device s5p_device_hdmi = {
1283         .name           = "s5p-hdmi",
1284         .id             = -1,
1285         .num_resources  = ARRAY_SIZE(s5p_hdmi_resources),
1286         .resource       = s5p_hdmi_resources,
1287 };
1288
1289 static struct resource s5p_sdo_resources[] = {
1290         [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1291         [1] = DEFINE_RES_IRQ(IRQ_SDO),
1292 };
1293
1294 struct platform_device s5p_device_sdo = {
1295         .name           = "s5p-sdo",
1296         .id             = -1,
1297         .num_resources  = ARRAY_SIZE(s5p_sdo_resources),
1298         .resource       = s5p_sdo_resources,
1299 };
1300
1301 static struct resource s5p_mixer_resources[] = {
1302         [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1303         [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1304         [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1305 };
1306
1307 struct platform_device s5p_device_mixer = {
1308         .name           = "s5p-mixer",
1309         .id             = -1,
1310         .num_resources  = ARRAY_SIZE(s5p_mixer_resources),
1311         .resource       = s5p_mixer_resources,
1312         .dev            = {
1313                 .dma_mask               = &samsung_device_dma_mask,
1314                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1315         }
1316 };
1317 #endif /* CONFIG_S5P_DEV_TV */
1318
1319 /* USB */
1320
1321 #ifdef CONFIG_S3C_DEV_USB_HOST
1322 static struct resource s3c_usb_resource[] = {
1323         [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1324         [1] = DEFINE_RES_IRQ(IRQ_USBH),
1325 };
1326
1327 struct platform_device s3c_device_ohci = {
1328         .name           = "s3c2410-ohci",
1329         .id             = -1,
1330         .num_resources  = ARRAY_SIZE(s3c_usb_resource),
1331         .resource       = s3c_usb_resource,
1332         .dev            = {
1333                 .dma_mask               = &samsung_device_dma_mask,
1334                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1335         }
1336 };
1337
1338 /*
1339  * s3c_ohci_set_platdata - initialise OHCI device platform data
1340  * @info: The platform data.
1341  *
1342  * This call copies the @info passed in and sets the device .platform_data
1343  * field to that copy. The @info is copied so that the original can be marked
1344  * __initdata.
1345  */
1346
1347 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1348 {
1349         s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1350                          &s3c_device_ohci);
1351 }
1352 #endif /* CONFIG_S3C_DEV_USB_HOST */
1353
1354 /* USB Device (Gadget) */
1355
1356 #ifdef CONFIG_PLAT_S3C24XX
1357 static struct resource s3c_usbgadget_resource[] = {
1358         [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1359         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1360 };
1361
1362 struct platform_device s3c_device_usbgadget = {
1363         .name           = "s3c2410-usbgadget",
1364         .id             = -1,
1365         .num_resources  = ARRAY_SIZE(s3c_usbgadget_resource),
1366         .resource       = s3c_usbgadget_resource,
1367 };
1368
1369 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1370 {
1371         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1372 }
1373 #endif /* CONFIG_PLAT_S3C24XX */
1374
1375 /* USB EHCI Host Controller */
1376
1377 #ifdef CONFIG_S5P_DEV_USB_EHCI
1378 static struct resource s5p_ehci_resource[] = {
1379         [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1380         [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1381 };
1382
1383 struct platform_device s5p_device_ehci = {
1384         .name           = "s5p-ehci",
1385         .id             = -1,
1386         .num_resources  = ARRAY_SIZE(s5p_ehci_resource),
1387         .resource       = s5p_ehci_resource,
1388         .dev            = {
1389                 .dma_mask               = &samsung_device_dma_mask,
1390                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1391         }
1392 };
1393
1394 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1395 {
1396         struct s5p_ehci_platdata *npd;
1397
1398         npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1399                         &s5p_device_ehci);
1400
1401         if (!npd->phy_init)
1402                 npd->phy_init = s5p_usb_phy_init;
1403         if (!npd->phy_exit)
1404                 npd->phy_exit = s5p_usb_phy_exit;
1405 }
1406 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1407
1408 /* USB HSOTG */
1409
1410 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1411 static struct resource s3c_usb_hsotg_resources[] = {
1412         [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
1413         [1] = DEFINE_RES_IRQ(IRQ_OTG),
1414 };
1415
1416 struct platform_device s3c_device_usb_hsotg = {
1417         .name           = "s3c-hsotg",
1418         .id             = -1,
1419         .num_resources  = ARRAY_SIZE(s3c_usb_hsotg_resources),
1420         .resource       = s3c_usb_hsotg_resources,
1421         .dev            = {
1422                 .dma_mask               = &samsung_device_dma_mask,
1423                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1424         },
1425 };
1426 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1427
1428 /* USB High Spped 2.0 Device (Gadget) */
1429
1430 #ifdef CONFIG_PLAT_S3C24XX
1431 static struct resource s3c_hsudc_resource[] = {
1432         [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1433         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1434 };
1435
1436 struct platform_device s3c_device_usb_hsudc = {
1437         .name           = "s3c-hsudc",
1438         .id             = -1,
1439         .num_resources  = ARRAY_SIZE(s3c_hsudc_resource),
1440         .resource       = s3c_hsudc_resource,
1441         .dev            = {
1442                 .dma_mask               = &samsung_device_dma_mask,
1443                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1444         },
1445 };
1446
1447 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1448 {
1449         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1450 }
1451 #endif /* CONFIG_PLAT_S3C24XX */
1452
1453 /* WDT */
1454
1455 #ifdef CONFIG_S3C_DEV_WDT
1456 static struct resource s3c_wdt_resource[] = {
1457         [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1458         [1] = DEFINE_RES_IRQ(IRQ_WDT),
1459 };
1460
1461 struct platform_device s3c_device_wdt = {
1462         .name           = "s3c2410-wdt",
1463         .id             = -1,
1464         .num_resources  = ARRAY_SIZE(s3c_wdt_resource),
1465         .resource       = s3c_wdt_resource,
1466 };
1467 #endif /* CONFIG_S3C_DEV_WDT */
1468
1469 #ifdef CONFIG_S3C64XX_DEV_SPI0
1470 static struct resource s3c64xx_spi0_resource[] = {
1471         [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1472         [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1473         [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1474         [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1475 };
1476
1477 struct platform_device s3c64xx_device_spi0 = {
1478         .name           = "s3c64xx-spi",
1479         .id             = 0,
1480         .num_resources  = ARRAY_SIZE(s3c64xx_spi0_resource),
1481         .resource       = s3c64xx_spi0_resource,
1482         .dev = {
1483                 .dma_mask               = &samsung_device_dma_mask,
1484                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1485         },
1486 };
1487
1488 void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1489                                       int src_clk_nr, int num_cs)
1490 {
1491         if (!pd) {
1492                 pr_err("%s:Need to pass platform data\n", __func__);
1493                 return;
1494         }
1495
1496         /* Reject invalid configuration */
1497         if (!num_cs || src_clk_nr < 0) {
1498                 pr_err("%s: Invalid SPI configuration\n", __func__);
1499                 return;
1500         }
1501
1502         pd->num_cs = num_cs;
1503         pd->src_clk_nr = src_clk_nr;
1504         if (!pd->cfg_gpio)
1505                 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1506
1507         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1508 }
1509 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1510
1511 #ifdef CONFIG_S3C64XX_DEV_SPI1
1512 static struct resource s3c64xx_spi1_resource[] = {
1513         [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1514         [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1515         [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1516         [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1517 };
1518
1519 struct platform_device s3c64xx_device_spi1 = {
1520         .name           = "s3c64xx-spi",
1521         .id             = 1,
1522         .num_resources  = ARRAY_SIZE(s3c64xx_spi1_resource),
1523         .resource       = s3c64xx_spi1_resource,
1524         .dev = {
1525                 .dma_mask               = &samsung_device_dma_mask,
1526                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1527         },
1528 };
1529
1530 void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1531                                       int src_clk_nr, int num_cs)
1532 {
1533         if (!pd) {
1534                 pr_err("%s:Need to pass platform data\n", __func__);
1535                 return;
1536         }
1537
1538         /* Reject invalid configuration */
1539         if (!num_cs || src_clk_nr < 0) {
1540                 pr_err("%s: Invalid SPI configuration\n", __func__);
1541                 return;
1542         }
1543
1544         pd->num_cs = num_cs;
1545         pd->src_clk_nr = src_clk_nr;
1546         if (!pd->cfg_gpio)
1547                 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1548
1549         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1550 }
1551 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1552
1553 #ifdef CONFIG_S3C64XX_DEV_SPI2
1554 static struct resource s3c64xx_spi2_resource[] = {
1555         [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1556         [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1557         [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1558         [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1559 };
1560
1561 struct platform_device s3c64xx_device_spi2 = {
1562         .name           = "s3c64xx-spi",
1563         .id             = 2,
1564         .num_resources  = ARRAY_SIZE(s3c64xx_spi2_resource),
1565         .resource       = s3c64xx_spi2_resource,
1566         .dev = {
1567                 .dma_mask               = &samsung_device_dma_mask,
1568                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1569         },
1570 };
1571
1572 void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1573                                       int src_clk_nr, int num_cs)
1574 {
1575         if (!pd) {
1576                 pr_err("%s:Need to pass platform data\n", __func__);
1577                 return;
1578         }
1579
1580         /* Reject invalid configuration */
1581         if (!num_cs || src_clk_nr < 0) {
1582                 pr_err("%s: Invalid SPI configuration\n", __func__);
1583                 return;
1584         }
1585
1586         pd->num_cs = num_cs;
1587         pd->src_clk_nr = src_clk_nr;
1588         if (!pd->cfg_gpio)
1589                 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1590
1591         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1592 }
1593 #endif /* CONFIG_S3C64XX_DEV_SPI2 */