1 /* linux/arch/arm/plat-s3c/gpio-config.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008-2010 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C series GPIO configuration core
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/gpio.h>
20 #include <plat/gpio-core.h>
21 #include <plat/gpio-cfg.h>
22 #include <plat/gpio-cfg-helpers.h>
24 int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
26 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
34 offset = pin - chip->chip.base;
36 s3c_gpio_lock(chip, flags);
37 ret = s3c_gpio_do_setcfg(chip, offset, config);
38 s3c_gpio_unlock(chip, flags);
42 EXPORT_SYMBOL(s3c_gpio_cfgpin);
44 unsigned s3c_gpio_getcfg(unsigned int pin)
46 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
52 offset = pin - chip->chip.base;
54 s3c_gpio_lock(chip, flags);
55 ret = s3c_gpio_do_getcfg(chip, offset);
56 s3c_gpio_unlock(chip, flags);
61 EXPORT_SYMBOL(s3c_gpio_getcfg);
64 int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
66 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
73 offset = pin - chip->chip.base;
75 s3c_gpio_lock(chip, flags);
76 ret = s3c_gpio_do_setpull(chip, offset, pull);
77 s3c_gpio_unlock(chip, flags);
81 EXPORT_SYMBOL(s3c_gpio_setpull);
83 #ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
84 int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
85 unsigned int off, unsigned int cfg)
87 void __iomem *reg = chip->base;
88 unsigned int shift = off;
91 if (s3c_gpio_is_cfg_special(cfg)) {
94 /* Map output to 0, and SFN2 to 1 */
102 con = __raw_readl(reg);
103 con &= ~(0x1 << shift);
105 __raw_writel(con, reg);
110 unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
115 con = __raw_readl(chip->base);
120 return S3C_GPIO_SFN(con);
123 int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
124 unsigned int off, unsigned int cfg)
126 void __iomem *reg = chip->base;
127 unsigned int shift = off * 2;
130 if (s3c_gpio_is_cfg_special(cfg)) {
138 con = __raw_readl(reg);
139 con &= ~(0x3 << shift);
141 __raw_writel(con, reg);
146 unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
151 con = __raw_readl(chip->base);
155 /* this conversion works for IN and OUT as well as special mode */
156 return S3C_GPIO_SPECIAL(con);
160 #ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
161 int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
162 unsigned int off, unsigned int cfg)
164 void __iomem *reg = chip->base;
165 unsigned int shift = (off & 7) * 4;
168 if (off < 8 && chip->chip.ngpio > 8)
171 if (s3c_gpio_is_cfg_special(cfg)) {
176 con = __raw_readl(reg);
177 con &= ~(0xf << shift);
179 __raw_writel(con, reg);
184 unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
187 void __iomem *reg = chip->base;
188 unsigned int shift = (off & 7) * 4;
191 if (off < 8 && chip->chip.ngpio > 8)
194 con = __raw_readl(reg);
198 /* this conversion works for IN and OUT as well as special mode */
199 return S3C_GPIO_SPECIAL(con);
202 #endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
204 #ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
205 int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip,
206 unsigned int off, s3c_gpio_pull_t pull)
208 void __iomem *reg = chip->base + 0x08;
212 pup = __raw_readl(reg);
213 pup &= ~(3 << shift);
214 pup |= pull << shift;
215 __raw_writel(pup, reg);
220 s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
223 void __iomem *reg = chip->base + 0x08;
225 u32 pup = __raw_readl(reg);
229 return (__force s3c_gpio_pull_t)pup;
233 #ifdef CONFIG_S3C_GPIO_PULL_UP
234 int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
235 unsigned int off, s3c_gpio_pull_t pull)
237 void __iomem *reg = chip->base + 0x08;
238 u32 pup = __raw_readl(reg);
240 pup = __raw_readl(reg);
242 if (pup == S3C_GPIO_PULL_UP)
244 else if (pup == S3C_GPIO_PULL_NONE)
249 __raw_writel(pup, reg);
253 s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
256 void __iomem *reg = chip->base + 0x08;
257 u32 pup = __raw_readl(reg);
260 return pup ? S3C_GPIO_PULL_NONE : S3C_GPIO_PULL_UP;
262 #endif /* CONFIG_S3C_GPIO_PULL_UP */
264 #ifdef CONFIG_S5P_GPIO_DRVSTR
265 s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
267 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
276 off = pin - chip->chip.base;
278 reg = chip->base + 0x0C;
280 drvstr = __raw_readl(reg);
281 drvstr = drvstr >> shift;
284 return (__force s5p_gpio_drvstr_t)drvstr;
286 EXPORT_SYMBOL(s5p_gpio_get_drvstr);
288 int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr)
290 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
299 off = pin - chip->chip.base;
301 reg = chip->base + 0x0C;
303 tmp = __raw_readl(reg);
304 tmp &= ~(0x3 << shift);
305 tmp |= drvstr << shift;
307 __raw_writel(tmp, reg);
311 EXPORT_SYMBOL(s5p_gpio_set_drvstr);
312 #endif /* CONFIG_S5P_GPIO_DRVSTR */