1 /* linux/arch/arm/plat-s3c/gpio.c
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
17 #include <linux/gpio.h>
18 #include <linux/spinlock.h>
20 #include <plat/gpio-core.h>
22 #ifdef CONFIG_S3C_GPIO_TRACK
23 struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
25 static __init void s3c_gpiolib_track(struct s3c_gpio_chip *chip)
30 gpn = chip->chip.base;
31 for (i = 0; i < chip->chip.ngpio; i++, gpn++) {
32 BUG_ON(gpn >= ARRAY_SIZE(s3c_gpios));
33 s3c_gpios[gpn] = chip;
36 #endif /* CONFIG_S3C_GPIO_TRACK */
38 /* Default routines for controlling GPIO, based on the original S3C24XX
39 * GPIO functions which deal with the case where each gpio bank of the
40 * chip is as following:
42 * base + 0x00: Control register, 2 bits per gpio
43 * gpio n: 2 bits starting at (2*n)
44 * 00 = input, 01 = output, others mean special-function
45 * base + 0x04: Data register, 1 bit per gpio
49 static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
51 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
52 void __iomem *base = ourchip->base;
56 s3c_gpio_lock(ourchip, flags);
58 con = __raw_readl(base + 0x00);
59 con &= ~(3 << (offset * 2));
61 __raw_writel(con, base + 0x00);
63 s3c_gpio_unlock(ourchip, flags);
67 static int s3c_gpiolib_output(struct gpio_chip *chip,
68 unsigned offset, int value)
70 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
71 void __iomem *base = ourchip->base;
76 s3c_gpio_lock(ourchip, flags);
78 dat = __raw_readl(base + 0x04);
79 dat &= ~(1 << offset);
82 __raw_writel(dat, base + 0x04);
84 con = __raw_readl(base + 0x00);
85 con &= ~(3 << (offset * 2));
86 con |= 1 << (offset * 2);
88 __raw_writel(con, base + 0x00);
89 __raw_writel(dat, base + 0x04);
91 s3c_gpio_unlock(ourchip, flags);
95 static void s3c_gpiolib_set(struct gpio_chip *chip,
96 unsigned offset, int value)
98 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
99 void __iomem *base = ourchip->base;
103 s3c_gpio_lock(ourchip, flags);
105 dat = __raw_readl(base + 0x04);
106 dat &= ~(1 << offset);
109 __raw_writel(dat, base + 0x04);
111 s3c_gpio_unlock(ourchip, flags);
114 static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
116 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
119 val = __raw_readl(ourchip->base + 0x04);
126 __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
128 struct gpio_chip *gc = &chip->chip;
135 spin_lock_init(&chip->lock);
137 if (!gc->direction_input)
138 gc->direction_input = s3c_gpiolib_input;
139 if (!gc->direction_output)
140 gc->direction_output = s3c_gpiolib_output;
142 gc->set = s3c_gpiolib_set;
144 gc->get = s3c_gpiolib_get;
147 if (chip->pm != NULL) {
148 if (!chip->pm->save || !chip->pm->resume)
149 printk(KERN_ERR "gpio: %s has missing PM functions\n",
152 printk(KERN_ERR "gpio: %s has no PM function\n", gc->label);
155 /* gpiochip_add() prints own failure message on error. */
156 ret = gpiochip_add(gc);
158 s3c_gpiolib_track(chip);
161 int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
163 struct s3c_gpio_chip *s3c_chip = container_of(chip,
164 struct s3c_gpio_chip, chip);
166 return s3c_chip->irq_base + offset;