1 /* linux/arch/arm/plat-samsung/include/plat/sdhci.h
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * http://armlinux.simtec.co.uk/
9 * Ben Dooks <ben@simtec.co.uk>
11 * S3C Platform - SDHCI (HSMMC) platform data definitions
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
18 #ifndef __PLAT_S3C_SDHCI_H
19 #define __PLAT_S3C_SDHCI_H __FILE__
21 struct platform_device;
27 S3C_SDHCI_CD_INTERNAL, /* use mmc internal CD line */
28 S3C_SDHCI_CD_EXTERNAL, /* use external callback */
29 S3C_SDHCI_CD_GPIO, /* use external gpio pin for CD line */
30 S3C_SDHCI_CD_NONE, /* no CD line, use polling to detect card */
31 S3C_SDHCI_CD_PERMANENT, /* no CD line, card permanently wired to host */
35 S3C_SDHCI_CLK_DIV_INTERNAL, /* use mmc internal clock divider */
36 S3C_SDHCI_CLK_DIV_EXTERNAL, /* use external clock divider */
40 * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
41 * @max_width: The maximum number of data bits supported.
42 * @host_caps: Standard MMC host capabilities bit field.
43 * @cd_type: Type of Card Detection method (see cd_types enum above)
44 * @clk_type: Type of clock divider method (see clk_types enum above)
45 * @ext_cd_init: Initialize external card detect subsystem. Called on
46 * sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL.
47 * notify_func argument is a callback to the sdhci-s3c driver
48 * that triggers the card detection event. Callback arguments:
49 * dev is pointer to platform device of the host controller,
50 * state is new state of the card (0 - removed, 1 - inserted).
51 * @ext_cd_cleanup: Cleanup external card detect subsystem. Called on
52 * sdhci-s3c driver remove when cd_type == S3C_SDHCI_CD_EXTERNAL.
53 * notify_func argument is the same callback as for ext_cd_init.
54 * @ext_cd_gpio: gpio pin used for external CD line, valid only if
55 * cd_type == S3C_SDHCI_CD_GPIO
56 * @ext_cd_gpio_invert: invert values for external CD gpio line
57 * @cfg_gpio: Configure the GPIO for a specific card bit-width
59 * Initialisation data specific to either the machine or the platform
60 * for the device driver to use or call-back when configuring gpio or
61 * card speed information.
63 struct s3c_sdhci_platdata {
64 unsigned int max_width;
65 unsigned int host_caps;
66 enum cd_types cd_type;
67 enum clk_types clk_type;
69 char **clocks; /* set of clock sources */
72 bool ext_cd_gpio_invert;
73 int (*ext_cd_init)(void (*notify_func)(struct platform_device *,
75 int (*ext_cd_cleanup)(void (*notify_func)(struct platform_device *,
78 void (*cfg_gpio)(struct platform_device *dev, int width);
81 /* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data
82 * @pd: The default platform data for this device.
83 * @set: Pointer to the platform data to fill in.
85 extern void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
86 struct s3c_sdhci_platdata *set);
89 * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device.
90 * @pd: Platform data to register to device.
92 * Register the given platform data for use withe S3C SDHCI device.
93 * The call will copy the platform data, so the board definitions can
94 * make the structure itself __initdata.
96 extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
97 extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
98 extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
99 extern void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd);
101 /* Default platform data, exported so that per-cpu initialisation can
102 * set the correct one when there are more than one cpu type selected.
105 extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
106 extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
107 extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
108 extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata;
110 /* Helper function availability */
112 extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
113 extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
114 extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
115 extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
116 extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
117 extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
118 extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
119 extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
120 extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
121 extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
122 extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
123 extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
124 extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
125 extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
126 extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
127 extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
129 /* S3C2416 SDHCI setup */
131 #ifdef CONFIG_S3C2416_SETUP_SDHCI
132 extern char *s3c2416_hsmmc_clksrcs[4];
134 static inline void s3c2416_default_sdhci0(void)
136 #ifdef CONFIG_S3C_DEV_HSMMC
137 s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
138 s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio;
139 #endif /* CONFIG_S3C_DEV_HSMMC */
142 static inline void s3c2416_default_sdhci1(void)
144 #ifdef CONFIG_S3C_DEV_HSMMC1
145 s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
146 s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio;
147 #endif /* CONFIG_S3C_DEV_HSMMC1 */
151 static inline void s3c2416_default_sdhci0(void) { }
152 static inline void s3c2416_default_sdhci1(void) { }
154 #endif /* CONFIG_S3C2416_SETUP_SDHCI */
155 /* S3C64XX SDHCI setup */
157 #ifdef CONFIG_S3C64XX_SETUP_SDHCI
158 extern char *s3c64xx_hsmmc_clksrcs[4];
160 static inline void s3c6400_default_sdhci0(void)
162 #ifdef CONFIG_S3C_DEV_HSMMC
163 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
164 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
168 static inline void s3c6400_default_sdhci1(void)
170 #ifdef CONFIG_S3C_DEV_HSMMC1
171 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
172 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
176 static inline void s3c6400_default_sdhci2(void)
178 #ifdef CONFIG_S3C_DEV_HSMMC2
179 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
180 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
184 static inline void s3c6410_default_sdhci0(void)
186 #ifdef CONFIG_S3C_DEV_HSMMC
187 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
188 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
192 static inline void s3c6410_default_sdhci1(void)
194 #ifdef CONFIG_S3C_DEV_HSMMC1
195 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
196 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
200 static inline void s3c6410_default_sdhci2(void)
202 #ifdef CONFIG_S3C_DEV_HSMMC2
203 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
204 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
209 static inline void s3c6410_default_sdhci0(void) { }
210 static inline void s3c6410_default_sdhci1(void) { }
211 static inline void s3c6410_default_sdhci2(void) { }
212 static inline void s3c6400_default_sdhci0(void) { }
213 static inline void s3c6400_default_sdhci1(void) { }
214 static inline void s3c6400_default_sdhci2(void) { }
216 #endif /* CONFIG_S3C64XX_SETUP_SDHCI */
218 /* S5PC100 SDHCI setup */
220 #ifdef CONFIG_S5PC100_SETUP_SDHCI
221 extern char *s5pc100_hsmmc_clksrcs[4];
223 static inline void s5pc100_default_sdhci0(void)
225 #ifdef CONFIG_S3C_DEV_HSMMC
226 s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
227 s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
231 static inline void s5pc100_default_sdhci1(void)
233 #ifdef CONFIG_S3C_DEV_HSMMC1
234 s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
235 s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
239 static inline void s5pc100_default_sdhci2(void)
241 #ifdef CONFIG_S3C_DEV_HSMMC2
242 s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
243 s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
248 static inline void s5pc100_default_sdhci0(void) { }
249 static inline void s5pc100_default_sdhci1(void) { }
250 static inline void s5pc100_default_sdhci2(void) { }
252 #endif /* CONFIG_S5PC100_SETUP_SDHCI */
254 /* S5PV210 SDHCI setup */
256 #ifdef CONFIG_S5PV210_SETUP_SDHCI
257 extern char *s5pv210_hsmmc_clksrcs[4];
259 static inline void s5pv210_default_sdhci0(void)
261 #ifdef CONFIG_S3C_DEV_HSMMC
262 s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
263 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
267 static inline void s5pv210_default_sdhci1(void)
269 #ifdef CONFIG_S3C_DEV_HSMMC1
270 s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
271 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
275 static inline void s5pv210_default_sdhci2(void)
277 #ifdef CONFIG_S3C_DEV_HSMMC2
278 s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
279 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
283 static inline void s5pv210_default_sdhci3(void)
285 #ifdef CONFIG_S3C_DEV_HSMMC3
286 s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
287 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
292 static inline void s5pv210_default_sdhci0(void) { }
293 static inline void s5pv210_default_sdhci1(void) { }
294 static inline void s5pv210_default_sdhci2(void) { }
295 static inline void s5pv210_default_sdhci3(void) { }
297 #endif /* CONFIG_S5PV210_SETUP_SDHCI */
299 /* EXYNOS4 SDHCI setup */
300 #ifdef CONFIG_EXYNOS4_SETUP_SDHCI
301 extern char *exynos4_hsmmc_clksrcs[4];
303 static inline void exynos4_default_sdhci0(void)
305 #ifdef CONFIG_S3C_DEV_HSMMC
306 s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs;
307 s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio;
311 static inline void exynos4_default_sdhci1(void)
313 #ifdef CONFIG_S3C_DEV_HSMMC1
314 s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs;
315 s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio;
319 static inline void exynos4_default_sdhci2(void)
321 #ifdef CONFIG_S3C_DEV_HSMMC2
322 s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs;
323 s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio;
327 static inline void exynos4_default_sdhci3(void)
329 #ifdef CONFIG_S3C_DEV_HSMMC3
330 s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs;
331 s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio;
336 static inline void exynos4_default_sdhci0(void) { }
337 static inline void exynos4_default_sdhci1(void) { }
338 static inline void exynos4_default_sdhci2(void) { }
339 static inline void exynos4_default_sdhci3(void) { }
341 #endif /* CONFIG_EXYNOS4_SETUP_SDHCI */
343 #endif /* __PLAT_S3C_SDHCI_H */