1 /* linux/arch/arm/plat-s3c/pm.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2004-2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C common power management (suspend to ram) support.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/suspend.h>
17 #include <linux/errno.h>
18 #include <linux/delay.h>
20 #include <linux/serial_s3c.h>
23 #include <asm/cacheflush.h>
24 #include <asm/suspend.h>
27 #include <mach/regs-clock.h>
28 #include <mach/regs-irq.h>
29 #include <mach/irqs.h>
34 #include <mach/pm-core.h>
36 /* for external use */
38 unsigned long s3c_pm_flags;
40 /* The IRQ ext-int code goes here, it is too small to currently bother
41 * with its own file. */
43 unsigned long s3c_irqwake_intmask = 0xffffffffL;
44 unsigned long s3c_irqwake_eintmask = 0xffffffffL;
46 int s3c_irqext_wake(struct irq_data *data, unsigned int state)
48 unsigned long bit = 1L << IRQ_EINT_BIT(data->irq);
50 if (!(s3c_irqwake_eintallow & bit))
53 printk(KERN_INFO "wake %s for irq %d\n",
54 state ? "enabled" : "disabled", data->irq);
57 s3c_irqwake_eintmask |= bit;
59 s3c_irqwake_eintmask &= ~bit;
64 void (*pm_cpu_prep)(void);
65 int (*pm_cpu_sleep)(unsigned long);
67 #define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
71 * central control for sleep/resume process
74 static int s3c_pm_enter(suspend_state_t state)
77 /* ensure the debug is initialised (if enabled) */
81 S3C_PMDBG("%s(%d)\n", __func__, state);
83 if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
84 printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
88 /* check if we have anything to wake-up with... bad things seem
89 * to happen if you suspend with no wakeup (system will often
90 * require a full power-cycle)
93 if (!of_have_populated_dt() &&
94 !any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
95 !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
96 printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
97 printk(KERN_ERR "%s: Aborting sleep\n", __func__);
101 /* save all necessary core registers not covered by the drivers */
103 if (!of_have_populated_dt()) {
104 samsung_pm_save_gpios();
105 samsung_pm_saved_gpios();
111 /* set the irq configuration for wake */
113 s3c_pm_configure_extint();
115 S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
116 s3c_irqwake_intmask, s3c_irqwake_eintmask);
118 s3c_pm_arch_prepare_irqs();
120 /* call cpu specific preparation */
124 /* flush cache back to ram */
128 s3c_pm_check_store();
130 /* send the cpu to sleep... */
132 s3c_pm_arch_stop_clocks();
134 /* this will also act as our return point from when
135 * we resume as it saves its own register state and restores it
136 * during the resume. */
138 ret = cpu_suspend(0, pm_cpu_sleep);
142 /* restore the system state */
144 s3c_pm_restore_core();
145 s3c_pm_restore_uarts();
147 if (!of_have_populated_dt()) {
148 samsung_pm_restore_gpios();
149 s3c_pm_restored_gpios();
154 /* check what irq (if any) restored the system */
156 s3c_pm_arch_show_resume_irqs();
158 S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
160 /* LEDs should now be 1110 */
161 s3c_pm_debug_smdkled(1 << 1, 0);
163 s3c_pm_check_restore();
165 /* ok, let's return from sleep */
167 S3C_PMDBG("S3C PM Resume (post-restore)\n");
171 static int s3c_pm_prepare(void)
173 /* prepare check area if configured */
175 s3c_pm_check_prepare();
179 static void s3c_pm_finish(void)
181 s3c_pm_check_cleanup();
184 static const struct platform_suspend_ops s3c_pm_ops = {
185 .enter = s3c_pm_enter,
186 .prepare = s3c_pm_prepare,
187 .finish = s3c_pm_finish,
188 .valid = suspend_valid_only_mem,
193 * Attach the power management functions. This should be called
194 * from the board specific initialisation if the board supports
198 int __init s3c_pm_init(void)
200 printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
202 suspend_set_ops(&s3c_pm_ops);