arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

   1 /*
   2  * Copyright (c) 2016 Andreas Färber
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "meson-gx.dtsi"
  44 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
  45 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
  46 #include <dt-bindings/clock/gxbb-clkc.h>
  47 #include <dt-bindings/clock/gxbb-aoclkc.h>
  48 #include <dt-bindings/reset/gxbb-aoclkc.h>
  49
  50 / {
  51         compatible = "amlogic,meson-gxbb";
  52
  53         soc {
  54                 usb0_phy: phy@c0000000 {
  55                         compatible = "amlogic,meson-gxbb-usb2-phy";
  56                         #phy-cells = <0>;
  57                         reg = <0x0 0xc0000000 0x0 0x20>;
  58                         resets = <&reset RESET_USB_OTG>;
  59                         clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
  60                         clock-names = "usb_general", "usb";
  61                         status = "disabled";
  62                 };
  63
  64                 usb1_phy: phy@c0000020 {
  65                         compatible = "amlogic,meson-gxbb-usb2-phy";
  66                         #phy-cells = <0>;
  67                         reg = <0x0 0xc0000020 0x0 0x20>;
  68                         resets = <&reset RESET_USB_OTG>;
  69                         clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
  70                         clock-names = "usb_general", "usb";
  71                         status = "disabled";
  72                 };
  73
  74                 usb0: usb@c9000000 {
  75                         compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
  76                         reg = <0x0 0xc9000000 0x0 0x40000>;
  77                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
  78                         clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
  79                         clock-names = "otg";
  80                         phys = <&usb0_phy>;
  81                         phy-names = "usb2-phy";
  82                         dr_mode = "host";
  83                         status = "disabled";
  84                 };
  85
  86                 usb1: usb@c9100000 {
  87                         compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
  88                         reg = <0x0 0xc9100000 0x0 0x40000>;
  89                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
  90                         clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
  91                         clock-names = "otg";
  92                         phys = <&usb1_phy>;
  93                         phy-names = "usb2-phy";
  94                         dr_mode = "host";
  95                         status = "disabled";
  96                 };
  97         };
  98 };
  99
 100 &cbus {
 101         spifc: spi@8c80 {
 102                 compatible = "amlogic,meson-gxbb-spifc";
 103                 reg = <0x0 0x08c80 0x0 0x80>;
 104                 #address-cells = <1>;
 105                 #size-cells = <0>;
 106                 clocks = <&clkc CLKID_SPI>;
 107                 status = "disabled";
 108         };
 109 };
 110
 111 &ethmac {
 112         clocks = <&clkc CLKID_ETH>,
 113                  <&clkc CLKID_FCLK_DIV2>,
 114                  <&clkc CLKID_MPLL2>;
 115         clock-names = "stmmaceth", "clkin0", "clkin1";
 116 };
 117
 118 &aobus {
 119         pinctrl_aobus: pinctrl@14 {
 120                 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
 121                 #address-cells = <2>;
 122                 #size-cells = <2>;
 123                 ranges;
 124
 125                 gpio_ao: bank@14 {
 126                         reg = <0x0 0x00014 0x0 0x8>,
 127                               <0x0 0x0002c 0x0 0x4>,
 128                               <0x0 0x00024 0x0 0x8>;
 129                         reg-names = "mux", "pull", "gpio";
 130                         gpio-controller;
 131                         #gpio-cells = <2>;
 132                 };
 133
 134                 uart_ao_a_pins: uart_ao_a {
 135                         mux {
 136                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
 137                                 function = "uart_ao";
 138                         };
 139                 };
 140
 141                 remote_input_ao_pins: remote_input_ao {
 142                         mux {
 143                                 groups = "remote_input_ao";
 144                                 function = "remote_input_ao";
 145                         };
 146                 };
 147
 148                 i2c_ao_pins: i2c_ao {
 149                         mux {
 150                                 groups = "i2c_sck_ao",
 151                                        "i2c_sda_ao";
 152                                 function = "i2c_ao";
 153                         };
 154                 };
 155
 156                 pwm_ao_a_3_pins: pwm_ao_a_3 {
 157                         mux {
 158                                 groups = "pwm_ao_a_3";
 159                                 function = "pwm_ao_a_3";
 160                         };
 161                 };
 162
 163                 pwm_ao_a_6_pins: pwm_ao_a_6 {
 164                         mux {
 165                                 groups = "pwm_ao_a_6";
 166                                 function = "pwm_ao_a_6";
 167                         };
 168                 };
 169
 170                 pwm_ao_a_12_pins: pwm_ao_a_12 {
 171                         mux {
 172                                 groups = "pwm_ao_a_12";
 173                                 function = "pwm_ao_a_12";
 174                         };
 175                 };
 176
 177                 pwm_ao_b_pins: pwm_ao_b {
 178                         mux {
 179                                 groups = "pwm_ao_b";
 180                                 function = "pwm_ao_b";
 181                         };
 182                 };
 183         };
 184
 185         clkc_AO: clock-controller@040 {
 186                 compatible = "amlogic,gxbb-aoclkc";
 187                 reg = <0x0 0x00040 0x0 0x4>;
 188                 #clock-cells = <1>;
 189                 #reset-cells = <1>;
 190         };
 191
 192         pwm_ab_AO: pwm@550 {
 193                 compatible = "amlogic,meson-gxbb-pwm";
 194                 reg = <0x0 0x0550 0x0 0x10>;
 195                 #pwm-cells = <3>;
 196                 status = "disabled";
 197         };
 198
 199         i2c_AO: i2c@500 {
 200                 compatible = "amlogic,meson-gxbb-i2c";
 201                 reg = <0x0 0x500 0x0 0x20>;
 202                 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
 203                 clocks = <&clkc CLKID_AO_I2C>;
 204                 #address-cells = <1>;
 205                 #size-cells = <0>;
 206                 status = "disabled";
 207         };
 208 };
 209
 210 &periphs {
 211         pinctrl_periphs: pinctrl@4b0 {
 212                 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
 213                 #address-cells = <2>;
 214                 #size-cells = <2>;
 215                 ranges;
 216
 217                 gpio: bank@4b0 {
 218                         reg = <0x0 0x004b0 0x0 0x28>,
 219                               <0x0 0x004e8 0x0 0x14>,
 220                               <0x0 0x00120 0x0 0x14>,
 221                               <0x0 0x00430 0x0 0x40>;
 222                         reg-names = "mux", "pull", "pull-enable", "gpio";
 223                         gpio-controller;
 224                         #gpio-cells = <2>;
 225                 };
 226
 227                 emmc_pins: emmc {
 228                         mux {
 229                                 groups = "emmc_nand_d07",
 230                                        "emmc_cmd",
 231                                        "emmc_clk",
 232                                        "emmc_ds";
 233                                 function = "emmc";
 234                         };
 235                 };
 236
 237                 nor_pins: nor {
 238                         mux {
 239                                 groups = "nor_d",
 240                                        "nor_q",
 241                                        "nor_c",
 242                                        "nor_cs";
 243                                 function = "nor";
 244                         };
 245                 };
 246
 247                 sdcard_pins: sdcard {
 248                         mux {
 249                                 groups = "sdcard_d0",
 250                                        "sdcard_d1",
 251                                        "sdcard_d2",
 252                                        "sdcard_d3",
 253                                        "sdcard_cmd",
 254                                        "sdcard_clk";
 255                                 function = "sdcard";
 256                         };
 257                 };
 258
 259                 sdio_pins: sdio {
 260                         mux {
 261                                 groups = "sdio_d0",
 262                                        "sdio_d1",
 263                                        "sdio_d2",
 264                                        "sdio_d3",
 265                                        "sdio_cmd",
 266                                        "sdio_clk";
 267                                 function = "sdio";
 268                         };
 269                 };
 270
 271                 sdio_irq_pins: sdio_irq {
 272                         mux {
 273                                 groups = "sdio_irq";
 274                                 function = "sdio";
 275                         };
 276                 };
 277
 278                 uart_a_pins: uart_a {
 279                         mux {
 280                                 groups = "uart_tx_a",
 281                                        "uart_rx_a";
 282                                 function = "uart_a";
 283                         };
 284                 };
 285
 286                 uart_b_pins: uart_b {
 287                         mux {
 288                                 groups = "uart_tx_b",
 289                                        "uart_rx_b";
 290                                 function = "uart_b";
 291                         };
 292                 };
 293
 294                 uart_c_pins: uart_c {
 295                         mux {
 296                                 groups = "uart_tx_c",
 297                                        "uart_rx_c";
 298                                 function = "uart_c";
 299                         };
 300                 };
 301
 302                 i2c_a_pins: i2c_a {
 303                         mux {
 304                                 groups = "i2c_sck_a",
 305                                        "i2c_sda_a";
 306                                 function = "i2c_a";
 307                         };
 308                 };
 309
 310                 i2c_b_pins: i2c_b {
 311                         mux {
 312                                 groups = "i2c_sck_b",
 313                                        "i2c_sda_b";
 314                                 function = "i2c_b";
 315                         };
 316                 };
 317
 318                 i2c_c_pins: i2c_c {
 319                         mux {
 320                                 groups = "i2c_sck_c",
 321                                        "i2c_sda_c";
 322                                 function = "i2c_c";
 323                         };
 324                 };
 325
 326                 eth_rgmii_pins: eth-rgmii {
 327                         mux {
 328                                 groups = "eth_mdio",
 329                                        "eth_mdc",
 330                                        "eth_clk_rx_clk",
 331                                        "eth_rx_dv",
 332                                        "eth_rxd0",
 333                                        "eth_rxd1",
 334                                        "eth_rxd2",
 335                                        "eth_rxd3",
 336                                        "eth_rgmii_tx_clk",
 337                                        "eth_tx_en",
 338                                        "eth_txd0",
 339                                        "eth_txd1",
 340                                        "eth_txd2",
 341                                        "eth_txd3";
 342                                 function = "eth";
 343                         };
 344                 };
 345
 346                 eth_rmii_pins: eth-rmii {
 347                         mux {
 348                                 groups = "eth_mdio",
 349                                        "eth_mdc",
 350                                        "eth_clk_rx_clk",
 351                                        "eth_rx_dv",
 352                                        "eth_rxd0",
 353                                        "eth_rxd1",
 354                                        "eth_tx_en",
 355                                        "eth_txd0",
 356                                        "eth_txd1";
 357                                 function = "eth";
 358                         };
 359                 };
 360
 361                 pwm_a_x_pins: pwm_a_x {
 362                         mux {
 363                                 groups = "pwm_a_x";
 364                                 function = "pwm_a_x";
 365                         };
 366                 };
 367
 368                 pwm_a_y_pins: pwm_a_y {
 369                         mux {
 370                                 groups = "pwm_a_y";
 371                                 function = "pwm_a_y";
 372                         };
 373                 };
 374
 375                 pwm_b_pins: pwm_b {
 376                         mux {
 377                                 groups = "pwm_b";
 378                                 function = "pwm_b";
 379                         };
 380                 };
 381
 382                 pwm_d_pins: pwm_d {
 383                         mux {
 384                                 groups = "pwm_d";
 385                                 function = "pwm_d";
 386                         };
 387                 };
 388
 389                 pwm_e_pins: pwm_e {
 390                         mux {
 391                                 groups = "pwm_e";
 392                                 function = "pwm_e";
 393                         };
 394                 };
 395
 396                 pwm_f_x_pins: pwm_f_x {
 397                         mux {
 398                                 groups = "pwm_f_x";
 399                                 function = "pwm_f_x";
 400                         };
 401                 };
 402
 403                 pwm_f_y_pins: pwm_f_y {
 404                         mux {
 405                                 groups = "pwm_f_y";
 406                                 function = "pwm_f_y";
 407                         };
 408                 };
 409         };
 410 };
 411
 412 &hiubus {
 413         clkc: clock-controller@0 {
 414                 compatible = "amlogic,gxbb-clkc";
 415                 #clock-cells = <1>;
 416                 reg = <0x0 0x0 0x0 0x3db>;
 417         };
 418 };
 419
 420 &i2c_A {
 421         clocks = <&clkc CLKID_I2C>;
 422 };
 423
 424 &i2c_B {
 425         clocks = <&clkc CLKID_I2C>;
 426 };
 427
 428 &i2c_C {
 429         clocks = <&clkc CLKID_I2C>;
 430 };
 431
 432 &sd_emmc_a {
 433         clocks = <&clkc CLKID_SD_EMMC_A>,
 434                  <&xtal>,
 435                  <&clkc CLKID_FCLK_DIV2>;
 436         clock-names = "core", "clkin0", "clkin1";
 437 };
 438
 439 &sd_emmc_b {
 440         clocks = <&clkc CLKID_SD_EMMC_B>,
 441                  <&xtal>,
 442                  <&clkc CLKID_FCLK_DIV2>;
 443         clock-names = "core", "clkin0", "clkin1";
 444 };
 445
 446 &sd_emmc_c {
 447         clocks = <&clkc CLKID_SD_EMMC_C>,
 448                  <&xtal>,
 449                  <&clkc CLKID_FCLK_DIV2>;
 450         clock-names = "core", "clkin0", "clkin1";
 451 };
 452
 453 &vpu {
 454         compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
 455 };