arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

   1 /*
   2  * Copyright (c) 2016 Andreas Färber
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include <dt-bindings/gpio/gpio.h>
  44 #include <dt-bindings/interrupt-controller/irq.h>
  45 #include <dt-bindings/interrupt-controller/arm-gic.h>
  46 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
  47 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
  48 #include <dt-bindings/clock/gxbb-clkc.h>
  49 #include <dt-bindings/clock/gxbb-aoclkc.h>
  50 #include <dt-bindings/reset/gxbb-aoclkc.h>
  51
  52 / {
  53         compatible = "amlogic,meson-gxbb";
  54         interrupt-parent = <&gic>;
  55         #address-cells = <2>;
  56         #size-cells = <2>;
  57
  58         cpus {
  59                 #address-cells = <0x2>;
  60                 #size-cells = <0x0>;
  61
  62                 cpu0: cpu@0 {
  63                         device_type = "cpu";
  64                         compatible = "arm,cortex-a53", "arm,armv8";
  65                         reg = <0x0 0x0>;
  66                         enable-method = "psci";
  67                 };
  68
  69                 cpu1: cpu@1 {
  70                         device_type = "cpu";
  71                         compatible = "arm,cortex-a53", "arm,armv8";
  72                         reg = <0x0 0x1>;
  73                         enable-method = "psci";
  74                 };
  75
  76                 cpu2: cpu@2 {
  77                         device_type = "cpu";
  78                         compatible = "arm,cortex-a53", "arm,armv8";
  79                         reg = <0x0 0x2>;
  80                         enable-method = "psci";
  81                 };
  82
  83                 cpu3: cpu@3 {
  84                         device_type = "cpu";
  85                         compatible = "arm,cortex-a53", "arm,armv8";
  86                         reg = <0x0 0x3>;
  87                         enable-method = "psci";
  88                 };
  89         };
  90
  91         arm-pmu {
  92                 compatible = "arm,cortex-a53-pmu";
  93                 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
  94                              <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
  95                              <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
  96                              <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
  97                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
  98         };
  99
 100         psci {
 101                 compatible = "arm,psci-0.2";
 102                 method = "smc";
 103         };
 104
 105         timer {
 106                 compatible = "arm,armv8-timer";
 107                 interrupts = <GIC_PPI 13
 108                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 109                              <GIC_PPI 14
 110                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 111                              <GIC_PPI 11
 112                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 113                              <GIC_PPI 10
 114                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
 115         };
 116
 117         xtal: xtal-clk {
 118                 compatible = "fixed-clock";
 119                 clock-frequency = <24000000>;
 120                 clock-output-names = "xtal";
 121                 #clock-cells = <0>;
 122         };
 123
 124         soc {
 125                 compatible = "simple-bus";
 126                 #address-cells = <2>;
 127                 #size-cells = <2>;
 128                 ranges;
 129
 130                 cbus: cbus@c1100000 {
 131                         compatible = "simple-bus";
 132                         reg = <0x0 0xc1100000 0x0 0x100000>;
 133                         #address-cells = <2>;
 134                         #size-cells = <2>;
 135                         ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
 136
 137                         reset: reset-controller@4404 {
 138                                 compatible = "amlogic,meson-gxbb-reset";
 139                                 reg = <0x0 0x04404 0x0 0x20>;
 140                                 #reset-cells = <1>;
 141                         };
 142
 143                         uart_A: serial@84c0 {
 144                                 compatible = "amlogic,meson-uart";
 145                                 reg = <0x0 0x84c0 0x0 0x14>;
 146                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 147                                 clocks = <&xtal>;
 148                                 status = "disabled";
 149                         };
 150
 151                         uart_B: serial@84dc {
 152                                 compatible = "amlogic,meson-uart";
 153                                 reg = <0x0 0x84dc 0x0 0x14>;
 154                                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
 155                                 clocks = <&xtal>;
 156                                 status = "disabled";
 157                         };
 158
 159                         uart_C: serial@8700 {
 160                                 compatible = "amlogic,meson-uart";
 161                                 reg = <0x0 0x8700 0x0 0x14>;
 162                                 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
 163                                 clocks = <&xtal>;
 164                                 status = "disabled";
 165                         };
 166
 167                         watchdog@98d0 {
 168                                 compatible = "amlogic,meson-gxbb-wdt";
 169                                 reg = <0x0 0x098d0 0x0 0x10>;
 170                                 clocks = <&xtal>;
 171                         };
 172                 };
 173
 174                 gic: interrupt-controller@c4301000 {
 175                         compatible = "arm,gic-400";
 176                         reg = <0x0 0xc4301000 0 0x1000>,
 177                               <0x0 0xc4302000 0 0x2000>,
 178                               <0x0 0xc4304000 0 0x2000>,
 179                               <0x0 0xc4306000 0 0x2000>;
 180                         interrupt-controller;
 181                         interrupts = <GIC_PPI 9
 182                                 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 183                         #interrupt-cells = <3>;
 184                         #address-cells = <0>;
 185                 };
 186
 187                 aobus: aobus@c8100000 {
 188                         compatible = "simple-bus";
 189                         reg = <0x0 0xc8100000 0x0 0x100000>;
 190                         #address-cells = <2>;
 191                         #size-cells = <2>;
 192                         ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
 193
 194                         pinctrl_aobus: pinctrl@14 {
 195                                 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
 196                                 #address-cells = <2>;
 197                                 #size-cells = <2>;
 198                                 ranges;
 199
 200                                 gpio_ao: bank@14 {
 201                                         reg = <0x0 0x00014 0x0 0x8>,
 202                                               <0x0 0x0002c 0x0 0x4>,
 203                                               <0x0 0x00024 0x0 0x8>;
 204                                         reg-names = "mux", "pull", "gpio";
 205                                         gpio-controller;
 206                                         #gpio-cells = <2>;
 207                                 };
 208
 209                                 uart_ao_a_pins: uart_ao_a {
 210                                         mux {
 211                                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
 212                                                 function = "uart_ao";
 213                                         };
 214                                 };
 215
 216                                 remote_input_ao_pins: remote_input_ao {
 217                                         mux {
 218                                                 groups = "remote_input_ao";
 219                                                 function = "remote_input_ao";
 220                                         };
 221                                 };
 222
 223                                 pwm_ao_a_3_pins: pwm_ao_a_3 {
 224                                         mux {
 225                                                 groups = "pwm_ao_a_3";
 226                                                 function = "pwm_ao_a_3";
 227                                         };
 228                                 };
 229
 230                                 pwm_ao_a_6_pins: pwm_ao_a_6 {
 231                                         mux {
 232                                                 groups = "pwm_ao_a_6";
 233                                                 function = "pwm_ao_a_6";
 234                                         };
 235                                 };
 236
 237                                 pwm_ao_a_12_pins: pwm_ao_a_12 {
 238                                         mux {
 239                                                 groups = "pwm_ao_a_12";
 240                                                 function = "pwm_ao_a_12";
 241                                         };
 242                                 };
 243
 244                                 pwm_ao_b_pins: pwm_ao_b {
 245                                         mux {
 246                                                 groups = "pwm_ao_b";
 247                                                 function = "pwm_ao_b";
 248                                         };
 249                                 };
 250                         };
 251
 252                         clkc_AO: clock-controller@040 {
 253                                 compatible = "amlogic,gxbb-aoclkc";
 254                                 reg = <0x0 0x00040 0x0 0x4>;
 255                                 #clock-cells = <1>;
 256                                 #reset-cells = <1>;
 257                         };
 258
 259                         uart_AO: serial@4c0 {
 260                                 compatible = "amlogic,meson-uart";
 261                                 reg = <0x0 0x004c0 0x0 0x14>;
 262                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
 263                                 clocks = <&xtal>;
 264                                 status = "disabled";
 265                         };
 266
 267                         ir: ir@580 {
 268                                 compatible = "amlogic,meson-gxbb-ir";
 269                                 reg = <0x0 0x00580 0x0 0x40>;
 270                                 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
 271                                 status = "disabled";
 272                         };
 273                 };
 274
 275                 periphs: periphs@c8834000 {
 276                         compatible = "simple-bus";
 277                         reg = <0x0 0xc8834000 0x0 0x2000>;
 278                         #address-cells = <2>;
 279                         #size-cells = <2>;
 280                         ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
 281
 282                         rng {
 283                                 compatible = "amlogic,meson-rng";
 284                                 reg = <0x0 0x0 0x0 0x4>;
 285                         };
 286
 287                         pinctrl_periphs: pinctrl@4b0 {
 288                                 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
 289                                 #address-cells = <2>;
 290                                 #size-cells = <2>;
 291                                 ranges;
 292
 293                                 gpio: bank@4b0 {
 294                                         reg = <0x0 0x004b0 0x0 0x28>,
 295                                               <0x0 0x004e8 0x0 0x14>,
 296                                               <0x0 0x00120 0x0 0x14>,
 297                                               <0x0 0x00430 0x0 0x40>;
 298                                         reg-names = "mux", "pull", "pull-enable", "gpio";
 299                                         gpio-controller;
 300                                         #gpio-cells = <2>;
 301                                 };
 302
 303                                 emmc_pins: emmc {
 304                                         mux {
 305                                                 groups = "emmc_nand_d07",
 306                                                        "emmc_cmd",
 307                                                        "emmc_clk";
 308                                                 function = "emmc";
 309                                         };
 310                                 };
 311
 312                                 sdcard_pins: sdcard {
 313                                         mux {
 314                                                 groups = "sdcard_d0",
 315                                                        "sdcard_d1",
 316                                                        "sdcard_d2",
 317                                                        "sdcard_d3",
 318                                                        "sdcard_cmd",
 319                                                        "sdcard_clk";
 320                                                 function = "sdcard";
 321                                         };
 322                                 };
 323
 324                                 uart_a_pins: uart_a {
 325                                         mux {
 326                                                 groups = "uart_tx_a",
 327                                                        "uart_rx_a";
 328                                                 function = "uart_a";
 329                                         };
 330                                 };
 331
 332                                 uart_b_pins: uart_b {
 333                                         mux {
 334                                                 groups = "uart_tx_b",
 335                                                        "uart_rx_b";
 336                                                 function = "uart_b";
 337                                         };
 338                                 };
 339
 340                                 uart_c_pins: uart_c {
 341                                         mux {
 342                                                 groups = "uart_tx_c",
 343                                                        "uart_rx_c";
 344                                                 function = "uart_c";
 345                                         };
 346                                 };
 347
 348                                 eth_pins: eth_c {
 349                                         mux {
 350                                                 groups = "eth_mdio",
 351                                                        "eth_mdc",
 352                                                        "eth_clk_rx_clk",
 353                                                        "eth_rx_dv",
 354                                                        "eth_rxd0",
 355                                                        "eth_rxd1",
 356                                                        "eth_rxd2",
 357                                                        "eth_rxd3",
 358                                                        "eth_rgmii_tx_clk",
 359                                                        "eth_tx_en",
 360                                                        "eth_txd0",
 361                                                        "eth_txd1",
 362                                                        "eth_txd2",
 363                                                        "eth_txd3";
 364                                                 function = "eth";
 365                                         };
 366                                 };
 367
 368                                 pwm_a_x_pins: pwm_a_x {
 369                                         mux {
 370                                                 groups = "pwm_a_x";
 371                                                 function = "pwm_a_x";
 372                                         };
 373                                 };
 374
 375                                 pwm_a_y_pins: pwm_a_y {
 376                                         mux {
 377                                                 groups = "pwm_a_y";
 378                                                 function = "pwm_a_y";
 379                                         };
 380                                 };
 381
 382                                 pwm_b_pins: pwm_b {
 383                                         mux {
 384                                                 groups = "pwm_b";
 385                                                 function = "pwm_b";
 386                                         };
 387                                 };
 388
 389                                 pwm_d_pins: pwm_d {
 390                                         mux {
 391                                                 groups = "pwm_d";
 392                                                 function = "pwm_d";
 393                                         };
 394                                 };
 395
 396                                 pwm_e_pins: pwm_e {
 397                                         mux {
 398                                                 groups = "pwm_e";
 399                                                 function = "pwm_e";
 400                                         };
 401                                 };
 402
 403                                 pwm_f_x_pins: pwm_f_x {
 404                                         mux {
 405                                                 groups = "pwm_f_x";
 406                                                 function = "pwm_f_x";
 407                                         };
 408                                 };
 409
 410                                 pwm_f_y_pins: pwm_f_y {
 411                                         mux {
 412                                                 groups = "pwm_f_y";
 413                                                 function = "pwm_f_y";
 414                                         };
 415                                 };
 416                         };
 417                 };
 418
 419                 hiubus: hiubus@c883c000 {
 420                         compatible = "simple-bus";
 421                         reg = <0x0 0xc883c000 0x0 0x2000>;
 422                         #address-cells = <2>;
 423                         #size-cells = <2>;
 424                         ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
 425
 426                         clkc: clock-controller@0 {
 427                                 compatible = "amlogic,gxbb-clkc";
 428                                 #clock-cells = <1>;
 429                                 reg = <0x0 0x0 0x0 0x3db>;
 430                         };
 431                 };
 432
 433                 apb: apb@d0000000 {
 434                         compatible = "simple-bus";
 435                         reg = <0x0 0xd0000000 0x0 0x200000>;
 436                         #address-cells = <2>;
 437                         #size-cells = <2>;
 438                         ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
 439                 };
 440
 441                 ethmac: ethernet@c9410000 {
 442                         compatible = "amlogic,meson6-dwmac", "snps,dwmac";
 443                         reg = <0x0 0xc9410000 0x0 0x10000
 444                                0x0 0xc8834540 0x0 0x4>;
 445                         interrupts = <0 8 1>;
 446                         interrupt-names = "macirq";
 447                         clocks = <&clkc CLKID_ETH>;
 448                         clock-names = "stmmaceth";
 449                         phy-mode = "rgmii";
 450                         status = "disabled";
 451                 };
 452         };
 453 };