2 * ARM Juno Platform motherboard peripherals
4 * Copyright (c) 2013-2014 ARM Ltd
6 * This file is licensed under a dual GPLv2 or BSD license.
10 mb_clk24mhz: clk24mhz {
11 compatible = "fixed-clock";
13 clock-frequency = <24000000>;
14 clock-output-names = "juno_mb:clk24mhz";
17 mb_clk25mhz: clk25mhz {
18 compatible = "fixed-clock";
20 clock-frequency = <25000000>;
21 clock-output-names = "juno_mb:clk25mhz";
25 compatible = "arm,vexpress,v2p-p1", "simple-bus";
26 #address-cells = <2>; /* SMB chipselect number and offset */
28 #interrupt-cells = <1>;
32 arm,vexpress,site = <0>;
33 arm,v2m-memory-map = "rs1";
35 mb_fixed_3v3: fixedregulator@0 {
36 compatible = "regulator-fixed";
37 regulator-name = "MCC_SB_3V3";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
44 compatible = "smsc,lan9118", "smsc,lan9115";
45 reg = <2 0x00000000 0x10000>;
51 clocks = <&mb_clk25mhz>;
52 vdd33a-supply = <&mb_fixed_3v3>;
53 vddvario-supply = <&mb_fixed_3v3>;
57 compatible = "nxp,usb-isp1763";
58 reg = <5 0x00000000 0x20000>;
64 compatible = "arm,amba-bus", "simple-bus";
67 ranges = <0 3 0 0x200000>;
70 compatible = "arm,pl180", "arm,primecell";
71 reg = <0x050000 0x1000>;
73 /* cd-gpios = <&v2m_mmc_gpios 0 0>;
74 wp-gpios = <&v2m_mmc_gpios 1 0>; */
75 max-frequency = <12000000>;
76 vmmc-supply = <&mb_fixed_3v3>;
77 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
78 clock-names = "mclk", "apb_pclk";
82 compatible = "arm,pl050", "arm,primecell";
83 reg = <0x060000 0x1000>;
85 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
86 clock-names = "KMIREFCLK", "apb_pclk";
90 compatible = "arm,pl050", "arm,primecell";
91 reg = <0x070000 0x1000>;
93 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
94 clock-names = "KMIREFCLK", "apb_pclk";
98 compatible = "arm,sp805", "arm,primecell";
99 reg = <0x0f0000 0x10000>;
101 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
102 clock-names = "wdogclk", "apb_pclk";
105 v2m_timer01: timer@110000 {
106 compatible = "arm,sp804", "arm,primecell";
107 reg = <0x110000 0x10000>;
109 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
110 clock-names = "timclken1", "apb_pclk";
113 v2m_timer23: timer@120000 {
114 compatible = "arm,sp804", "arm,primecell";
115 reg = <0x120000 0x10000>;
117 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
118 clock-names = "timclken1", "apb_pclk";
122 compatible = "arm,pl031", "arm,primecell";
123 reg = <0x170000 0x10000>;
125 clocks = <&soc_smc50mhz>;
126 clock-names = "apb_pclk";