2 * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
4 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
5 * Chanwoo Choi <cw00.choi@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
14 compatible = "samsung,exynos-bus";
15 clocks = <&cmu_top CLK_ACLK_G2D_400>;
17 operating-points-v2 = <&bus_g2d_400_opp_table>;
22 compatible = "samsung,exynos-bus";
23 clocks = <&cmu_top CLK_ACLK_G2D_266>;
25 operating-points-v2 = <&bus_g2d_266_opp_table>;
30 compatible = "samsung,exynos-bus";
31 clocks = <&cmu_top CLK_ACLK_GSCL_333>;
33 operating-points-v2 = <&bus_gscl_opp_table>;
38 compatible = "samsung,exynos-bus";
39 clocks = <&cmu_top CLK_ACLK_HEVC_400>;
41 operating-points-v2 = <&bus_hevc_opp_table>;
46 compatible = "samsung,exynos-bus";
47 clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
49 operating-points-v2 = <&bus_g2d_400_opp_table>;
54 compatible = "samsung,exynos-bus";
55 clocks = <&cmu_top CLK_ACLK_MFC_400>;
57 operating-points-v2 = <&bus_g2d_400_opp_table>;
62 compatible = "samsung,exynos-bus";
63 clocks = <&cmu_top CLK_ACLK_MSCL_400>;
65 operating-points-v2 = <&bus_g2d_400_opp_table>;
70 compatible = "samsung,exynos-bus";
71 clocks = <&cmu_top CLK_ACLK_BUS0_400>;
73 operating-points-v2 = <&bus_hevc_opp_table>;
78 compatible = "samsung,exynos-bus";
79 clocks = <&cmu_top CLK_ACLK_BUS1_400>;
81 operating-points-v2 = <&bus_hevc_opp_table>;
86 compatible = "samsung,exynos-bus";
87 clocks = <&cmu_mif CLK_ACLK_BUS2_400>;
89 operating-points-v2 = <&bus_noc2_opp_table>;
93 bus_g2d_400_opp_table: opp_table2 {
94 compatible = "operating-points-v2";
98 opp-hz = /bits/ 64 <400000000>;
99 opp-microvolt = <1075000>;
102 opp-hz = /bits/ 64 <267000000>;
103 opp-microvolt = <1000000>;
106 opp-hz = /bits/ 64 <200000000>;
107 opp-microvolt = <975000>;
110 opp-hz = /bits/ 64 <160000000>;
111 opp-microvolt = <962500>;
114 opp-hz = /bits/ 64 <134000000>;
115 opp-microvolt = <950000>;
118 opp-hz = /bits/ 64 <100000000>;
119 opp-microvolt = <937500>;
123 bus_g2d_266_opp_table: opp_table3 {
124 compatible = "operating-points-v2";
127 opp-hz = /bits/ 64 <267000000>;
130 opp-hz = /bits/ 64 <200000000>;
133 opp-hz = /bits/ 64 <160000000>;
136 opp-hz = /bits/ 64 <134000000>;
139 opp-hz = /bits/ 64 <100000000>;
143 bus_gscl_opp_table: opp_table4 {
144 compatible = "operating-points-v2";
147 opp-hz = /bits/ 64 <333000000>;
150 opp-hz = /bits/ 64 <222000000>;
153 opp-hz = /bits/ 64 <166500000>;
157 bus_hevc_opp_table: opp_table5 {
158 compatible = "operating-points-v2";
162 opp-hz = /bits/ 64 <400000000>;
165 opp-hz = /bits/ 64 <267000000>;
168 opp-hz = /bits/ 64 <200000000>;
171 opp-hz = /bits/ 64 <160000000>;
174 opp-hz = /bits/ 64 <134000000>;
177 opp-hz = /bits/ 64 <100000000>;
181 bus_noc2_opp_table: opp_table6 {
182 compatible = "operating-points-v2";
185 opp-hz = /bits/ 64 <400000000>;
188 opp-hz = /bits/ 64 <200000000>;
191 opp-hz = /bits/ 64 <134000000>;
194 opp-hz = /bits/ 64 <100000000>;