2 * dts file for Hisilicon Hi6220 SoC
4 * Copyright (C) 2015, Hisilicon Ltd.
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 compatible = "hisilicon,hi6220";
11 interrupt-parent = <&gic>;
16 compatible = "arm,psci-0.2";
56 compatible = "arm,cortex-a53", "arm,armv8";
59 enable-method = "psci";
63 compatible = "arm,cortex-a53", "arm,armv8";
66 enable-method = "psci";
70 compatible = "arm,cortex-a53", "arm,armv8";
73 enable-method = "psci";
77 compatible = "arm,cortex-a53", "arm,armv8";
80 enable-method = "psci";
84 compatible = "arm,cortex-a53", "arm,armv8";
87 enable-method = "psci";
91 compatible = "arm,cortex-a53", "arm,armv8";
94 enable-method = "psci";
98 compatible = "arm,cortex-a53", "arm,armv8";
101 enable-method = "psci";
105 compatible = "arm,cortex-a53", "arm,armv8";
108 enable-method = "psci";
112 gic: interrupt-controller@f6801000 {
113 compatible = "arm,gic-400";
114 reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
115 <0x0 0xf6802000 0 0x2000>, /* GICC */
116 <0x0 0xf6804000 0 0x2000>, /* GICH */
117 <0x0 0xf6806000 0 0x2000>; /* GICV */
118 #address-cells = <0>;
119 #interrupt-cells = <3>;
120 interrupt-controller;
121 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
125 compatible = "arm,armv8-timer";
126 interrupt-parent = <&gic>;
127 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
128 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
129 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
130 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
134 compatible = "simple-bus";
135 #address-cells = <2>;
139 ao_ctrl: ao_ctrl@f7800000 {
140 compatible = "hisilicon,hi6220-aoctrl", "syscon";
141 reg = <0x0 0xf7800000 0x0 0x2000>;
145 sys_ctrl: sys_ctrl@f7030000 {
146 compatible = "hisilicon,hi6220-sysctrl", "syscon";
147 reg = <0x0 0xf7030000 0x0 0x2000>;
151 media_ctrl: media_ctrl@f4410000 {
152 compatible = "hisilicon,hi6220-mediactrl", "syscon";
153 reg = <0x0 0xf4410000 0x0 0x1000>;
157 pm_ctrl: pm_ctrl@f7032000 {
158 compatible = "hisilicon,hi6220-pmctrl", "syscon";
159 reg = <0x0 0xf7032000 0x0 0x1000>;
163 uart0: uart@f8015000 { /* console */
164 compatible = "arm,pl011", "arm,primecell";
165 reg = <0x0 0xf8015000 0x0 0x1000>;
166 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
167 clocks = <&ao_ctrl 36>, <&ao_ctrl 36>;
168 clock-names = "uartclk", "apb_pclk";