arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         psci {
  32                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  33                 method = "smc";
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 a57_0: cpu@0 {
  41                         compatible = "arm,cortex-a57", "arm,armv8";
  42                         reg = <0x0>;
  43                         device_type = "cpu";
  44                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  45                         next-level-cache = <&L2_CA57>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a57_1: cpu@1 {
  50                         compatible = "arm,cortex-a57","arm,armv8";
  51                         reg = <0x1>;
  52                         device_type = "cpu";
  53                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  54                         next-level-cache = <&L2_CA57>;
  55                         enable-method = "psci";
  56                 };
  57
  58                 a57_2: cpu@2 {
  59                         compatible = "arm,cortex-a57","arm,armv8";
  60                         reg = <0x2>;
  61                         device_type = "cpu";
  62                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  63                         next-level-cache = <&L2_CA57>;
  64                         enable-method = "psci";
  65                 };
  66
  67                 a57_3: cpu@3 {
  68                         compatible = "arm,cortex-a57","arm,armv8";
  69                         reg = <0x3>;
  70                         device_type = "cpu";
  71                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  72                         next-level-cache = <&L2_CA57>;
  73                         enable-method = "psci";
  74                 };
  75
  76                 a53_0: cpu@100 {
  77                         compatible = "arm,cortex-a53", "arm,armv8";
  78                         reg = <0x100>;
  79                         device_type = "cpu";
  80                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
  81                         next-level-cache = <&L2_CA53>;
  82                         enable-method = "psci";
  83                 };
  84
  85                 a53_1: cpu@101 {
  86                         compatible = "arm,cortex-a53","arm,armv8";
  87                         reg = <0x101>;
  88                         device_type = "cpu";
  89                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
  90                         next-level-cache = <&L2_CA53>;
  91                         enable-method = "psci";
  92                 };
  93
  94                 a53_2: cpu@102 {
  95                         compatible = "arm,cortex-a53","arm,armv8";
  96                         reg = <0x102>;
  97                         device_type = "cpu";
  98                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
  99                         next-level-cache = <&L2_CA53>;
 100                         enable-method = "psci";
 101                 };
 102
 103                 a53_3: cpu@103 {
 104                         compatible = "arm,cortex-a53","arm,armv8";
 105                         reg = <0x103>;
 106                         device_type = "cpu";
 107                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 108                         next-level-cache = <&L2_CA53>;
 109                         enable-method = "psci";
 110                 };
 111
 112                 L2_CA57: cache-controller-0 {
 113                         compatible = "cache";
 114                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 115                         cache-unified;
 116                         cache-level = <2>;
 117                 };
 118
 119                 L2_CA53: cache-controller-1 {
 120                         compatible = "cache";
 121                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 122                         cache-unified;
 123                         cache-level = <2>;
 124                 };
 125         };
 126
 127         extal_clk: extal {
 128                 compatible = "fixed-clock";
 129                 #clock-cells = <0>;
 130                 /* This value must be overridden by the board */
 131                 clock-frequency = <0>;
 132         };
 133
 134         extalr_clk: extalr {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 /* This value must be overridden by the board */
 138                 clock-frequency = <0>;
 139         };
 140
 141         /*
 142          * The external audio clocks are configured as 0 Hz fixed frequency
 143          * clocks by default.
 144          * Boards that provide audio clocks should override them.
 145          */
 146         audio_clk_a: audio_clk_a {
 147                 compatible = "fixed-clock";
 148                 #clock-cells = <0>;
 149                 clock-frequency = <0>;
 150         };
 151
 152         audio_clk_b: audio_clk_b {
 153                 compatible = "fixed-clock";
 154                 #clock-cells = <0>;
 155                 clock-frequency = <0>;
 156         };
 157
 158         audio_clk_c: audio_clk_c {
 159                 compatible = "fixed-clock";
 160                 #clock-cells = <0>;
 161                 clock-frequency = <0>;
 162         };
 163
 164         /* External CAN clock - to be overridden by boards that provide it */
 165         can_clk: can {
 166                 compatible = "fixed-clock";
 167                 #clock-cells = <0>;
 168                 clock-frequency = <0>;
 169         };
 170
 171         /* External SCIF clock - to be overridden by boards that provide it */
 172         scif_clk: scif {
 173                 compatible = "fixed-clock";
 174                 #clock-cells = <0>;
 175                 clock-frequency = <0>;
 176         };
 177
 178         /* External PCIe clock - can be overridden by the board */
 179         pcie_bus_clk: pcie_bus {
 180                 compatible = "fixed-clock";
 181                 #clock-cells = <0>;
 182                 clock-frequency = <0>;
 183         };
 184
 185         soc {
 186                 compatible = "simple-bus";
 187                 interrupt-parent = <&gic>;
 188
 189                 #address-cells = <2>;
 190                 #size-cells = <2>;
 191                 ranges;
 192
 193                 gic: interrupt-controller@f1010000 {
 194                         compatible = "arm,gic-400";
 195                         #interrupt-cells = <3>;
 196                         #address-cells = <0>;
 197                         interrupt-controller;
 198                         reg = <0x0 0xf1010000 0 0x1000>,
 199                               <0x0 0xf1020000 0 0x20000>,
 200                               <0x0 0xf1040000 0 0x20000>,
 201                               <0x0 0xf1060000 0 0x20000>;
 202                         interrupts = <GIC_PPI 9
 203                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 204                         clocks = <&cpg CPG_MOD 408>;
 205                         clock-names = "clk";
 206                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 207                 };
 208
 209                 wdt0: watchdog@e6020000 {
 210                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 211                         reg = <0 0xe6020000 0 0x0c>;
 212                         clocks = <&cpg CPG_MOD 402>;
 213                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 214                         status = "disabled";
 215                 };
 216
 217                 gpio0: gpio@e6050000 {
 218                         compatible = "renesas,gpio-r8a7795",
 219                                      "renesas,gpio-rcar";
 220                         reg = <0 0xe6050000 0 0x50>;
 221                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 222                         #gpio-cells = <2>;
 223                         gpio-controller;
 224                         gpio-ranges = <&pfc 0 0 16>;
 225                         #interrupt-cells = <2>;
 226                         interrupt-controller;
 227                         clocks = <&cpg CPG_MOD 912>;
 228                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 229                 };
 230
 231                 gpio1: gpio@e6051000 {
 232                         compatible = "renesas,gpio-r8a7795",
 233                                      "renesas,gpio-rcar";
 234                         reg = <0 0xe6051000 0 0x50>;
 235                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 236                         #gpio-cells = <2>;
 237                         gpio-controller;
 238                         gpio-ranges = <&pfc 0 32 28>;
 239                         #interrupt-cells = <2>;
 240                         interrupt-controller;
 241                         clocks = <&cpg CPG_MOD 911>;
 242                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 243                 };
 244
 245                 gpio2: gpio@e6052000 {
 246                         compatible = "renesas,gpio-r8a7795",
 247                                      "renesas,gpio-rcar";
 248                         reg = <0 0xe6052000 0 0x50>;
 249                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 250                         #gpio-cells = <2>;
 251                         gpio-controller;
 252                         gpio-ranges = <&pfc 0 64 15>;
 253                         #interrupt-cells = <2>;
 254                         interrupt-controller;
 255                         clocks = <&cpg CPG_MOD 910>;
 256                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 257                 };
 258
 259                 gpio3: gpio@e6053000 {
 260                         compatible = "renesas,gpio-r8a7795",
 261                                      "renesas,gpio-rcar";
 262                         reg = <0 0xe6053000 0 0x50>;
 263                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 264                         #gpio-cells = <2>;
 265                         gpio-controller;
 266                         gpio-ranges = <&pfc 0 96 16>;
 267                         #interrupt-cells = <2>;
 268                         interrupt-controller;
 269                         clocks = <&cpg CPG_MOD 909>;
 270                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 271                 };
 272
 273                 gpio4: gpio@e6054000 {
 274                         compatible = "renesas,gpio-r8a7795",
 275                                      "renesas,gpio-rcar";
 276                         reg = <0 0xe6054000 0 0x50>;
 277                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 278                         #gpio-cells = <2>;
 279                         gpio-controller;
 280                         gpio-ranges = <&pfc 0 128 18>;
 281                         #interrupt-cells = <2>;
 282                         interrupt-controller;
 283                         clocks = <&cpg CPG_MOD 908>;
 284                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 285                 };
 286
 287                 gpio5: gpio@e6055000 {
 288                         compatible = "renesas,gpio-r8a7795",
 289                                      "renesas,gpio-rcar";
 290                         reg = <0 0xe6055000 0 0x50>;
 291                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 292                         #gpio-cells = <2>;
 293                         gpio-controller;
 294                         gpio-ranges = <&pfc 0 160 26>;
 295                         #interrupt-cells = <2>;
 296                         interrupt-controller;
 297                         clocks = <&cpg CPG_MOD 907>;
 298                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 299                 };
 300
 301                 gpio6: gpio@e6055400 {
 302                         compatible = "renesas,gpio-r8a7795",
 303                                      "renesas,gpio-rcar";
 304                         reg = <0 0xe6055400 0 0x50>;
 305                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 306                         #gpio-cells = <2>;
 307                         gpio-controller;
 308                         gpio-ranges = <&pfc 0 192 32>;
 309                         #interrupt-cells = <2>;
 310                         interrupt-controller;
 311                         clocks = <&cpg CPG_MOD 906>;
 312                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 313                 };
 314
 315                 gpio7: gpio@e6055800 {
 316                         compatible = "renesas,gpio-r8a7795",
 317                                      "renesas,gpio-rcar";
 318                         reg = <0 0xe6055800 0 0x50>;
 319                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 320                         #gpio-cells = <2>;
 321                         gpio-controller;
 322                         gpio-ranges = <&pfc 0 224 4>;
 323                         #interrupt-cells = <2>;
 324                         interrupt-controller;
 325                         clocks = <&cpg CPG_MOD 905>;
 326                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 327                 };
 328
 329                 pmu_a57 {
 330                         compatible = "arm,cortex-a57-pmu";
 331                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 332                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 333                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 334                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 335                         interrupt-affinity = <&a57_0>,
 336                                              <&a57_1>,
 337                                              <&a57_2>,
 338                                              <&a57_3>;
 339                 };
 340
 341                 pmu_a53 {
 342                         compatible = "arm,cortex-a53-pmu";
 343                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 345                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 346                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 347                         interrupt-affinity = <&a53_0>,
 348                                              <&a53_1>,
 349                                              <&a53_2>,
 350                                              <&a53_3>;
 351                 };
 352
 353                 timer {
 354                         compatible = "arm,armv8-timer";
 355                         interrupts = <GIC_PPI 13
 356                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 357                                      <GIC_PPI 14
 358                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 359                                      <GIC_PPI 11
 360                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 361                                      <GIC_PPI 10
 362                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 363                 };
 364
 365                 cpg: clock-controller@e6150000 {
 366                         compatible = "renesas,r8a7795-cpg-mssr";
 367                         reg = <0 0xe6150000 0 0x1000>;
 368                         clocks = <&extal_clk>, <&extalr_clk>;
 369                         clock-names = "extal", "extalr";
 370                         #clock-cells = <2>;
 371                         #power-domain-cells = <0>;
 372                 };
 373
 374                 rst: reset-controller@e6160000 {
 375                         compatible = "renesas,r8a7795-rst";
 376                         reg = <0 0xe6160000 0 0x0200>;
 377                 };
 378
 379                 prr: chipid@fff00044 {
 380                         compatible = "renesas,prr";
 381                         reg = <0 0xfff00044 0 4>;
 382                 };
 383
 384                 sysc: system-controller@e6180000 {
 385                         compatible = "renesas,r8a7795-sysc";
 386                         reg = <0 0xe6180000 0 0x0400>;
 387                         #power-domain-cells = <1>;
 388                 };
 389
 390                 pfc: pfc@e6060000 {
 391                         compatible = "renesas,pfc-r8a7795";
 392                         reg = <0 0xe6060000 0 0x50c>;
 393                 };
 394
 395                 intc_ex: interrupt-controller@e61c0000 {
 396                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 397                         #interrupt-cells = <2>;
 398                         interrupt-controller;
 399                         reg = <0 0xe61c0000 0 0x200>;
 400                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 401                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 402                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 403                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 404                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 405                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 406                         clocks = <&cpg CPG_MOD 407>;
 407                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 408                 };
 409
 410                 dmac0: dma-controller@e6700000 {
 411                         compatible = "renesas,dmac-r8a7795",
 412                                      "renesas,rcar-dmac";
 413                         reg = <0 0xe6700000 0 0x10000>;
 414                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 415                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 416                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 417                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 418                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 419                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 420                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 421                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 422                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 423                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 424                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 425                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 431                         interrupt-names = "error",
 432                                         "ch0", "ch1", "ch2", "ch3",
 433                                         "ch4", "ch5", "ch6", "ch7",
 434                                         "ch8", "ch9", "ch10", "ch11",
 435                                         "ch12", "ch13", "ch14", "ch15";
 436                         clocks = <&cpg CPG_MOD 219>;
 437                         clock-names = "fck";
 438                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 439                         #dma-cells = <1>;
 440                         dma-channels = <16>;
 441                 };
 442
 443                 dmac1: dma-controller@e7300000 {
 444                         compatible = "renesas,dmac-r8a7795",
 445                                      "renesas,rcar-dmac";
 446                         reg = <0 0xe7300000 0 0x10000>;
 447                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 448                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 449                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 450                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 451                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 452                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 453                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 454                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 455                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 456                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 457                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 458                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 459                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 464                         interrupt-names = "error",
 465                                         "ch0", "ch1", "ch2", "ch3",
 466                                         "ch4", "ch5", "ch6", "ch7",
 467                                         "ch8", "ch9", "ch10", "ch11",
 468                                         "ch12", "ch13", "ch14", "ch15";
 469                         clocks = <&cpg CPG_MOD 218>;
 470                         clock-names = "fck";
 471                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 472                         #dma-cells = <1>;
 473                         dma-channels = <16>;
 474                 };
 475
 476                 dmac2: dma-controller@e7310000 {
 477                         compatible = "renesas,dmac-r8a7795",
 478                                      "renesas,rcar-dmac";
 479                         reg = <0 0xe7310000 0 0x10000>;
 480                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 481                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 482                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 483                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 484                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 485                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 486                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 487                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 488                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 489                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 490                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 491                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 492                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 493                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 494                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 495                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 496                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 497                         interrupt-names = "error",
 498                                         "ch0", "ch1", "ch2", "ch3",
 499                                         "ch4", "ch5", "ch6", "ch7",
 500                                         "ch8", "ch9", "ch10", "ch11",
 501                                         "ch12", "ch13", "ch14", "ch15";
 502                         clocks = <&cpg CPG_MOD 217>;
 503                         clock-names = "fck";
 504                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 505                         #dma-cells = <1>;
 506                         dma-channels = <16>;
 507                 };
 508
 509                 audma0: dma-controller@ec700000 {
 510                         compatible = "renesas,dmac-r8a7795",
 511                                      "renesas,rcar-dmac";
 512                         reg = <0 0xec700000 0 0x10000>;
 513                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 514                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 515                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 516                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 517                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 518                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 519                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 520                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 521                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 522                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 523                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 524                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 525                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 526                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 527                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 528                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 529                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 530                         interrupt-names = "error",
 531                                         "ch0", "ch1", "ch2", "ch3",
 532                                         "ch4", "ch5", "ch6", "ch7",
 533                                         "ch8", "ch9", "ch10", "ch11",
 534                                         "ch12", "ch13", "ch14", "ch15";
 535                         clocks = <&cpg CPG_MOD 502>;
 536                         clock-names = "fck";
 537                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 538                         #dma-cells = <1>;
 539                         dma-channels = <16>;
 540                 };
 541
 542                 audma1: dma-controller@ec720000 {
 543                         compatible = "renesas,dmac-r8a7795",
 544                                      "renesas,rcar-dmac";
 545                         reg = <0 0xec720000 0 0x10000>;
 546                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 547                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 548                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 549                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 550                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 551                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 552                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 553                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 554                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 555                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 556                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 557                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 558                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 559                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 560                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 561                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 562                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 563                         interrupt-names = "error",
 564                                         "ch0", "ch1", "ch2", "ch3",
 565                                         "ch4", "ch5", "ch6", "ch7",
 566                                         "ch8", "ch9", "ch10", "ch11",
 567                                         "ch12", "ch13", "ch14", "ch15";
 568                         clocks = <&cpg CPG_MOD 501>;
 569                         clock-names = "fck";
 570                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 571                         #dma-cells = <1>;
 572                         dma-channels = <16>;
 573                 };
 574
 575                 avb: ethernet@e6800000 {
 576                         compatible = "renesas,etheravb-r8a7795",
 577                                      "renesas,etheravb-rcar-gen3";
 578                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 579                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 580                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 581                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 582                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 583                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 584                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 585                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 586                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 587                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 588                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 589                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 590                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 591                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 592                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 593                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 594                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 595                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 597                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 598                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 599                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 600                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 601                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 602                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 603                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 604                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 605                                           "ch4", "ch5", "ch6", "ch7",
 606                                           "ch8", "ch9", "ch10", "ch11",
 607                                           "ch12", "ch13", "ch14", "ch15",
 608                                           "ch16", "ch17", "ch18", "ch19",
 609                                           "ch20", "ch21", "ch22", "ch23",
 610                                           "ch24";
 611                         clocks = <&cpg CPG_MOD 812>;
 612                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 613                         phy-mode = "rgmii-txid";
 614                         #address-cells = <1>;
 615                         #size-cells = <0>;
 616                         status = "disabled";
 617                 };
 618
 619                 can0: can@e6c30000 {
 620                         compatible = "renesas,can-r8a7795",
 621                                      "renesas,rcar-gen3-can";
 622                         reg = <0 0xe6c30000 0 0x1000>;
 623                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 624                         clocks = <&cpg CPG_MOD 916>,
 625                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 626                                <&can_clk>;
 627                         clock-names = "clkp1", "clkp2", "can_clk";
 628                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 629                         assigned-clock-rates = <40000000>;
 630                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 631                         status = "disabled";
 632                 };
 633
 634                 can1: can@e6c38000 {
 635                         compatible = "renesas,can-r8a7795",
 636                                      "renesas,rcar-gen3-can";
 637                         reg = <0 0xe6c38000 0 0x1000>;
 638                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 639                         clocks = <&cpg CPG_MOD 915>,
 640                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 641                                <&can_clk>;
 642                         clock-names = "clkp1", "clkp2", "can_clk";
 643                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 644                         assigned-clock-rates = <40000000>;
 645                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 646                         status = "disabled";
 647                 };
 648
 649                 canfd: can@e66c0000 {
 650                         compatible = "renesas,r8a7795-canfd",
 651                                      "renesas,rcar-gen3-canfd";
 652                         reg = <0 0xe66c0000 0 0x8000>;
 653                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 654                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 655                         clocks = <&cpg CPG_MOD 914>,
 656                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 657                                <&can_clk>;
 658                         clock-names = "fck", "canfd", "can_clk";
 659                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 660                         assigned-clock-rates = <40000000>;
 661                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 662                         status = "disabled";
 663
 664                         channel0 {
 665                                 status = "disabled";
 666                         };
 667
 668                         channel1 {
 669                                 status = "disabled";
 670                         };
 671                 };
 672
 673                 hscif0: serial@e6540000 {
 674                         compatible = "renesas,hscif-r8a7795",
 675                                      "renesas,rcar-gen3-hscif",
 676                                      "renesas,hscif";
 677                         reg = <0 0xe6540000 0 96>;
 678                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 679                         clocks = <&cpg CPG_MOD 520>,
 680                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 681                                  <&scif_clk>;
 682                         clock-names = "fck", "brg_int", "scif_clk";
 683                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 684                         dma-names = "tx", "rx";
 685                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 686                         status = "disabled";
 687                 };
 688
 689                 hscif1: serial@e6550000 {
 690                         compatible = "renesas,hscif-r8a7795",
 691                                      "renesas,rcar-gen3-hscif",
 692                                      "renesas,hscif";
 693                         reg = <0 0xe6550000 0 96>;
 694                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 695                         clocks = <&cpg CPG_MOD 519>,
 696                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 697                                  <&scif_clk>;
 698                         clock-names = "fck", "brg_int", "scif_clk";
 699                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 700                         dma-names = "tx", "rx";
 701                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 702                         status = "disabled";
 703                 };
 704
 705                 hscif2: serial@e6560000 {
 706                         compatible = "renesas,hscif-r8a7795",
 707                                      "renesas,rcar-gen3-hscif",
 708                                      "renesas,hscif";
 709                         reg = <0 0xe6560000 0 96>;
 710                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 711                         clocks = <&cpg CPG_MOD 518>,
 712                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 713                                  <&scif_clk>;
 714                         clock-names = "fck", "brg_int", "scif_clk";
 715                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 716                         dma-names = "tx", "rx";
 717                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 718                         status = "disabled";
 719                 };
 720
 721                 hscif3: serial@e66a0000 {
 722                         compatible = "renesas,hscif-r8a7795",
 723                                      "renesas,rcar-gen3-hscif",
 724                                      "renesas,hscif";
 725                         reg = <0 0xe66a0000 0 96>;
 726                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 727                         clocks = <&cpg CPG_MOD 517>,
 728                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 729                                  <&scif_clk>;
 730                         clock-names = "fck", "brg_int", "scif_clk";
 731                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 732                         dma-names = "tx", "rx";
 733                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 734                         status = "disabled";
 735                 };
 736
 737                 hscif4: serial@e66b0000 {
 738                         compatible = "renesas,hscif-r8a7795",
 739                                      "renesas,rcar-gen3-hscif",
 740                                      "renesas,hscif";
 741                         reg = <0 0xe66b0000 0 96>;
 742                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 743                         clocks = <&cpg CPG_MOD 516>,
 744                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 745                                  <&scif_clk>;
 746                         clock-names = "fck", "brg_int", "scif_clk";
 747                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 748                         dma-names = "tx", "rx";
 749                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 750                         status = "disabled";
 751                 };
 752
 753                 scif0: serial@e6e60000 {
 754                         compatible = "renesas,scif-r8a7795",
 755                                      "renesas,rcar-gen3-scif", "renesas,scif";
 756                         reg = <0 0xe6e60000 0 64>;
 757                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 758                         clocks = <&cpg CPG_MOD 207>,
 759                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 760                                  <&scif_clk>;
 761                         clock-names = "fck", "brg_int", "scif_clk";
 762                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 763                         dma-names = "tx", "rx";
 764                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 765                         status = "disabled";
 766                 };
 767
 768                 scif1: serial@e6e68000 {
 769                         compatible = "renesas,scif-r8a7795",
 770                                      "renesas,rcar-gen3-scif", "renesas,scif";
 771                         reg = <0 0xe6e68000 0 64>;
 772                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 773                         clocks = <&cpg CPG_MOD 206>,
 774                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 775                                  <&scif_clk>;
 776                         clock-names = "fck", "brg_int", "scif_clk";
 777                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 778                         dma-names = "tx", "rx";
 779                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 780                         status = "disabled";
 781                 };
 782
 783                 scif2: serial@e6e88000 {
 784                         compatible = "renesas,scif-r8a7795",
 785                                      "renesas,rcar-gen3-scif", "renesas,scif";
 786                         reg = <0 0xe6e88000 0 64>;
 787                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 788                         clocks = <&cpg CPG_MOD 310>,
 789                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 790                                  <&scif_clk>;
 791                         clock-names = "fck", "brg_int", "scif_clk";
 792                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 793                         dma-names = "tx", "rx";
 794                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 795                         status = "disabled";
 796                 };
 797
 798                 scif3: serial@e6c50000 {
 799                         compatible = "renesas,scif-r8a7795",
 800                                      "renesas,rcar-gen3-scif", "renesas,scif";
 801                         reg = <0 0xe6c50000 0 64>;
 802                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 803                         clocks = <&cpg CPG_MOD 204>,
 804                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 805                                  <&scif_clk>;
 806                         clock-names = "fck", "brg_int", "scif_clk";
 807                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 808                         dma-names = "tx", "rx";
 809                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 810                         status = "disabled";
 811                 };
 812
 813                 scif4: serial@e6c40000 {
 814                         compatible = "renesas,scif-r8a7795",
 815                                      "renesas,rcar-gen3-scif", "renesas,scif";
 816                         reg = <0 0xe6c40000 0 64>;
 817                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 818                         clocks = <&cpg CPG_MOD 203>,
 819                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 820                                  <&scif_clk>;
 821                         clock-names = "fck", "brg_int", "scif_clk";
 822                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 823                         dma-names = "tx", "rx";
 824                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 825                         status = "disabled";
 826                 };
 827
 828                 scif5: serial@e6f30000 {
 829                         compatible = "renesas,scif-r8a7795",
 830                                      "renesas,rcar-gen3-scif", "renesas,scif";
 831                         reg = <0 0xe6f30000 0 64>;
 832                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 833                         clocks = <&cpg CPG_MOD 202>,
 834                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 835                                  <&scif_clk>;
 836                         clock-names = "fck", "brg_int", "scif_clk";
 837                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 838                         dma-names = "tx", "rx";
 839                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 840                         status = "disabled";
 841                 };
 842
 843                 i2c_dvfs: i2c@e60b0000 {
 844                         #address-cells = <1>;
 845                         #size-cells = <0>;
 846                         compatible = "renesas,iic-r8a7795",
 847                                      "renesas,rcar-gen3-iic",
 848                                      "renesas,rmobile-iic";
 849                         reg = <0 0xe60b0000 0 0x425>;
 850                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 851                         clocks = <&cpg CPG_MOD 926>;
 852                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 853                         status = "disabled";
 854                 };
 855
 856                 i2c0: i2c@e6500000 {
 857                         #address-cells = <1>;
 858                         #size-cells = <0>;
 859                         compatible = "renesas,i2c-r8a7795",
 860                                      "renesas,rcar-gen3-i2c";
 861                         reg = <0 0xe6500000 0 0x40>;
 862                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 863                         clocks = <&cpg CPG_MOD 931>;
 864                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 865                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 866                         dma-names = "tx", "rx";
 867                         i2c-scl-internal-delay-ns = <110>;
 868                         status = "disabled";
 869                 };
 870
 871                 i2c1: i2c@e6508000 {
 872                         #address-cells = <1>;
 873                         #size-cells = <0>;
 874                         compatible = "renesas,i2c-r8a7795",
 875                                      "renesas,rcar-gen3-i2c";
 876                         reg = <0 0xe6508000 0 0x40>;
 877                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 878                         clocks = <&cpg CPG_MOD 930>;
 879                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 880                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 881                         dma-names = "tx", "rx";
 882                         i2c-scl-internal-delay-ns = <6>;
 883                         status = "disabled";
 884                 };
 885
 886                 i2c2: i2c@e6510000 {
 887                         #address-cells = <1>;
 888                         #size-cells = <0>;
 889                         compatible = "renesas,i2c-r8a7795",
 890                                      "renesas,rcar-gen3-i2c";
 891                         reg = <0 0xe6510000 0 0x40>;
 892                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 893                         clocks = <&cpg CPG_MOD 929>;
 894                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 895                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 896                         dma-names = "tx", "rx";
 897                         i2c-scl-internal-delay-ns = <6>;
 898                         status = "disabled";
 899                 };
 900
 901                 i2c3: i2c@e66d0000 {
 902                         #address-cells = <1>;
 903                         #size-cells = <0>;
 904                         compatible = "renesas,i2c-r8a7795",
 905                                      "renesas,rcar-gen3-i2c";
 906                         reg = <0 0xe66d0000 0 0x40>;
 907                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 908                         clocks = <&cpg CPG_MOD 928>;
 909                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 910                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 911                         dma-names = "tx", "rx";
 912                         i2c-scl-internal-delay-ns = <110>;
 913                         status = "disabled";
 914                 };
 915
 916                 i2c4: i2c@e66d8000 {
 917                         #address-cells = <1>;
 918                         #size-cells = <0>;
 919                         compatible = "renesas,i2c-r8a7795",
 920                                      "renesas,rcar-gen3-i2c";
 921                         reg = <0 0xe66d8000 0 0x40>;
 922                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 923                         clocks = <&cpg CPG_MOD 927>;
 924                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 925                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 926                         dma-names = "tx", "rx";
 927                         i2c-scl-internal-delay-ns = <110>;
 928                         status = "disabled";
 929                 };
 930
 931                 i2c5: i2c@e66e0000 {
 932                         #address-cells = <1>;
 933                         #size-cells = <0>;
 934                         compatible = "renesas,i2c-r8a7795",
 935                                      "renesas,rcar-gen3-i2c";
 936                         reg = <0 0xe66e0000 0 0x40>;
 937                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 938                         clocks = <&cpg CPG_MOD 919>;
 939                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 940                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 941                         dma-names = "tx", "rx";
 942                         i2c-scl-internal-delay-ns = <110>;
 943                         status = "disabled";
 944                 };
 945
 946                 i2c6: i2c@e66e8000 {
 947                         #address-cells = <1>;
 948                         #size-cells = <0>;
 949                         compatible = "renesas,i2c-r8a7795",
 950                                      "renesas,rcar-gen3-i2c";
 951                         reg = <0 0xe66e8000 0 0x40>;
 952                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 953                         clocks = <&cpg CPG_MOD 918>;
 954                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 955                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 956                         dma-names = "tx", "rx";
 957                         i2c-scl-internal-delay-ns = <6>;
 958                         status = "disabled";
 959                 };
 960
 961                 pwm0: pwm@e6e30000 {
 962                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
 963                         reg = <0 0xe6e30000 0 0x8>;
 964                         clocks = <&cpg CPG_MOD 523>;
 965                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 966                         #pwm-cells = <2>;
 967                         status = "disabled";
 968                 };
 969
 970                 pwm1: pwm@e6e31000 {
 971                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
 972                         reg = <0 0xe6e31000 0 0x8>;
 973                         clocks = <&cpg CPG_MOD 523>;
 974                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 975                         #pwm-cells = <2>;
 976                         status = "disabled";
 977                 };
 978
 979                 pwm2: pwm@e6e32000 {
 980                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
 981                         reg = <0 0xe6e32000 0 0x8>;
 982                         clocks = <&cpg CPG_MOD 523>;
 983                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 984                         #pwm-cells = <2>;
 985                         status = "disabled";
 986                 };
 987
 988                 pwm3: pwm@e6e33000 {
 989                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
 990                         reg = <0 0xe6e33000 0 0x8>;
 991                         clocks = <&cpg CPG_MOD 523>;
 992                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 993                         #pwm-cells = <2>;
 994                         status = "disabled";
 995                 };
 996
 997                 pwm4: pwm@e6e34000 {
 998                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
 999                         reg = <0 0xe6e34000 0 0x8>;
1000                         clocks = <&cpg CPG_MOD 523>;
1001                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1002                         #pwm-cells = <2>;
1003                         status = "disabled";
1004                 };
1005
1006                 pwm5: pwm@e6e35000 {
1007                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1008                         reg = <0 0xe6e35000 0 0x8>;
1009                         clocks = <&cpg CPG_MOD 523>;
1010                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1011                         #pwm-cells = <2>;
1012                         status = "disabled";
1013                 };
1014
1015                 pwm6: pwm@e6e36000 {
1016                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1017                         reg = <0 0xe6e36000 0 0x8>;
1018                         clocks = <&cpg CPG_MOD 523>;
1019                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1020                         #pwm-cells = <2>;
1021                         status = "disabled";
1022                 };
1023
1024                 rcar_sound: sound@ec500000 {
1025                         /*
1026                          * #sound-dai-cells is required
1027                          *
1028                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1029                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1030                          */
1031                         /*
1032                          * #clock-cells is required for audio_clkout0/1/2/3
1033                          *
1034                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1035                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1036                          */
1037                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1038                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1039                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1040                                 <0 0xec540000 0 0x1000>, /* SSIU */
1041                                 <0 0xec541000 0 0x280>,  /* SSI */
1042                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1043                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1044
1045                         clocks = <&cpg CPG_MOD 1005>,
1046                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1047                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1048                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1049                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1050                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1051                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1052                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1053                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1054                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1055                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1056                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1057                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1058                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1059                                  <&audio_clk_a>, <&audio_clk_b>,
1060                                  <&audio_clk_c>,
1061                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1062                         clock-names = "ssi-all",
1063                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1064                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1065                                       "ssi.1", "ssi.0",
1066                                       "src.9", "src.8", "src.7", "src.6",
1067                                       "src.5", "src.4", "src.3", "src.2",
1068                                       "src.1", "src.0",
1069                                       "mix.1", "mix.0",
1070                                       "ctu.1", "ctu.0",
1071                                       "dvc.0", "dvc.1",
1072                                       "clk_a", "clk_b", "clk_c", "clk_i";
1073                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1074                         status = "disabled";
1075
1076                         rcar_sound,dvc {
1077                                 dvc0: dvc-0 {
1078                                         dmas = <&audma1 0xbc>;
1079                                         dma-names = "tx";
1080                                 };
1081                                 dvc1: dvc-1 {
1082                                         dmas = <&audma1 0xbe>;
1083                                         dma-names = "tx";
1084                                 };
1085                         };
1086
1087                         rcar_sound,mix {
1088                                 mix0: mix-0 { };
1089                                 mix1: mix-1 { };
1090                         };
1091
1092                         rcar_sound,ctu {
1093                                 ctu00: ctu-0 { };
1094                                 ctu01: ctu-1 { };
1095                                 ctu02: ctu-2 { };
1096                                 ctu03: ctu-3 { };
1097                                 ctu10: ctu-4 { };
1098                                 ctu11: ctu-5 { };
1099                                 ctu12: ctu-6 { };
1100                                 ctu13: ctu-7 { };
1101                         };
1102
1103                         rcar_sound,src {
1104                                 src0: src-0 {
1105                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1106                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1107                                         dma-names = "rx", "tx";
1108                                 };
1109                                 src1: src-1 {
1110                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1111                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1112                                         dma-names = "rx", "tx";
1113                                 };
1114                                 src2: src-2 {
1115                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1116                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1117                                         dma-names = "rx", "tx";
1118                                 };
1119                                 src3: src-3 {
1120                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1121                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1122                                         dma-names = "rx", "tx";
1123                                 };
1124                                 src4: src-4 {
1125                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1126                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1127                                         dma-names = "rx", "tx";
1128                                 };
1129                                 src5: src-5 {
1130                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1131                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1132                                         dma-names = "rx", "tx";
1133                                 };
1134                                 src6: src-6 {
1135                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1136                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1137                                         dma-names = "rx", "tx";
1138                                 };
1139                                 src7: src-7 {
1140                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1141                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1142                                         dma-names = "rx", "tx";
1143                                 };
1144                                 src8: src-8 {
1145                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1146                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1147                                         dma-names = "rx", "tx";
1148                                 };
1149                                 src9: src-9 {
1150                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1151                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1152                                         dma-names = "rx", "tx";
1153                                 };
1154                         };
1155
1156                         rcar_sound,ssi {
1157                                 ssi0: ssi-0 {
1158                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1159                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1160                                         dma-names = "rx", "tx", "rxu", "txu";
1161                                 };
1162                                 ssi1: ssi-1 {
1163                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1164                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1165                                         dma-names = "rx", "tx", "rxu", "txu";
1166                                 };
1167                                 ssi2: ssi-2 {
1168                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1169                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1170                                         dma-names = "rx", "tx", "rxu", "txu";
1171                                 };
1172                                 ssi3: ssi-3 {
1173                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1174                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1175                                         dma-names = "rx", "tx", "rxu", "txu";
1176                                 };
1177                                 ssi4: ssi-4 {
1178                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1179                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1180                                         dma-names = "rx", "tx", "rxu", "txu";
1181                                 };
1182                                 ssi5: ssi-5 {
1183                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1184                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1185                                         dma-names = "rx", "tx", "rxu", "txu";
1186                                 };
1187                                 ssi6: ssi-6 {
1188                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1189                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1190                                         dma-names = "rx", "tx", "rxu", "txu";
1191                                 };
1192                                 ssi7: ssi-7 {
1193                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1194                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1195                                         dma-names = "rx", "tx", "rxu", "txu";
1196                                 };
1197                                 ssi8: ssi-8 {
1198                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1199                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1200                                         dma-names = "rx", "tx", "rxu", "txu";
1201                                 };
1202                                 ssi9: ssi-9 {
1203                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1204                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1205                                         dma-names = "rx", "tx", "rxu", "txu";
1206                                 };
1207                         };
1208                 };
1209
1210                 sata: sata@ee300000 {
1211                         compatible = "renesas,sata-r8a7795";
1212                         reg = <0 0xee300000 0 0x1fff>;
1213                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1214                         clocks = <&cpg CPG_MOD 815>;
1215                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1216                         status = "disabled";
1217                 };
1218
1219                 xhci0: usb@ee000000 {
1220                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1221                         reg = <0 0xee000000 0 0xc00>;
1222                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1223                         clocks = <&cpg CPG_MOD 328>;
1224                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1225                         status = "disabled";
1226                 };
1227
1228                 xhci1: usb@ee0400000 {
1229                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1230                         reg = <0 0xee040000 0 0xc00>;
1231                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1232                         clocks = <&cpg CPG_MOD 327>;
1233                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1234                         status = "disabled";
1235                 };
1236
1237                 usb_dmac0: dma-controller@e65a0000 {
1238                         compatible = "renesas,r8a7795-usb-dmac",
1239                                      "renesas,usb-dmac";
1240                         reg = <0 0xe65a0000 0 0x100>;
1241                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1242                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1243                         interrupt-names = "ch0", "ch1";
1244                         clocks = <&cpg CPG_MOD 330>;
1245                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1246                         #dma-cells = <1>;
1247                         dma-channels = <2>;
1248                 };
1249
1250                 usb_dmac1: dma-controller@e65b0000 {
1251                         compatible = "renesas,r8a7795-usb-dmac",
1252                                      "renesas,usb-dmac";
1253                         reg = <0 0xe65b0000 0 0x100>;
1254                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1255                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1256                         interrupt-names = "ch0", "ch1";
1257                         clocks = <&cpg CPG_MOD 331>;
1258                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1259                         #dma-cells = <1>;
1260                         dma-channels = <2>;
1261                 };
1262
1263                 sdhi0: sd@ee100000 {
1264                         compatible = "renesas,sdhi-r8a7795";
1265                         reg = <0 0xee100000 0 0x2000>;
1266                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1267                         clocks = <&cpg CPG_MOD 314>;
1268                         max-frequency = <200000000>;
1269                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1270                         status = "disabled";
1271                 };
1272
1273                 sdhi1: sd@ee120000 {
1274                         compatible = "renesas,sdhi-r8a7795";
1275                         reg = <0 0xee120000 0 0x2000>;
1276                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1277                         clocks = <&cpg CPG_MOD 313>;
1278                         max-frequency = <200000000>;
1279                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1280                         status = "disabled";
1281                 };
1282
1283                 sdhi2: sd@ee140000 {
1284                         compatible = "renesas,sdhi-r8a7795";
1285                         reg = <0 0xee140000 0 0x2000>;
1286                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1287                         clocks = <&cpg CPG_MOD 312>;
1288                         max-frequency = <200000000>;
1289                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1290                         status = "disabled";
1291                 };
1292
1293                 sdhi3: sd@ee160000 {
1294                         compatible = "renesas,sdhi-r8a7795";
1295                         reg = <0 0xee160000 0 0x2000>;
1296                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1297                         clocks = <&cpg CPG_MOD 311>;
1298                         max-frequency = <200000000>;
1299                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1300                         status = "disabled";
1301                 };
1302
1303                 usb2_phy0: usb-phy@ee080200 {
1304                         compatible = "renesas,usb2-phy-r8a7795",
1305                                      "renesas,rcar-gen3-usb2-phy";
1306                         reg = <0 0xee080200 0 0x700>;
1307                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1308                         clocks = <&cpg CPG_MOD 703>;
1309                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1310                         #phy-cells = <0>;
1311                         status = "disabled";
1312                 };
1313
1314                 usb2_phy1: usb-phy@ee0a0200 {
1315                         compatible = "renesas,usb2-phy-r8a7795",
1316                                      "renesas,rcar-gen3-usb2-phy";
1317                         reg = <0 0xee0a0200 0 0x700>;
1318                         clocks = <&cpg CPG_MOD 702>;
1319                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1320                         #phy-cells = <0>;
1321                         status = "disabled";
1322                 };
1323
1324                 usb2_phy2: usb-phy@ee0c0200 {
1325                         compatible = "renesas,usb2-phy-r8a7795",
1326                                      "renesas,rcar-gen3-usb2-phy";
1327                         reg = <0 0xee0c0200 0 0x700>;
1328                         clocks = <&cpg CPG_MOD 701>;
1329                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1330                         #phy-cells = <0>;
1331                         status = "disabled";
1332                 };
1333
1334                 ehci0: usb@ee080100 {
1335                         compatible = "generic-ehci";
1336                         reg = <0 0xee080100 0 0x100>;
1337                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1338                         clocks = <&cpg CPG_MOD 703>;
1339                         phys = <&usb2_phy0>;
1340                         phy-names = "usb";
1341                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1342                         status = "disabled";
1343                 };
1344
1345                 ehci1: usb@ee0a0100 {
1346                         compatible = "generic-ehci";
1347                         reg = <0 0xee0a0100 0 0x100>;
1348                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1349                         clocks = <&cpg CPG_MOD 702>;
1350                         phys = <&usb2_phy1>;
1351                         phy-names = "usb";
1352                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1353                         status = "disabled";
1354                 };
1355
1356                 ehci2: usb@ee0c0100 {
1357                         compatible = "generic-ehci";
1358                         reg = <0 0xee0c0100 0 0x100>;
1359                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1360                         clocks = <&cpg CPG_MOD 701>;
1361                         phys = <&usb2_phy2>;
1362                         phy-names = "usb";
1363                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1364                         status = "disabled";
1365                 };
1366
1367                 ohci0: usb@ee080000 {
1368                         compatible = "generic-ohci";
1369                         reg = <0 0xee080000 0 0x100>;
1370                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1371                         clocks = <&cpg CPG_MOD 703>;
1372                         phys = <&usb2_phy0>;
1373                         phy-names = "usb";
1374                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1375                         status = "disabled";
1376                 };
1377
1378                 ohci1: usb@ee0a0000 {
1379                         compatible = "generic-ohci";
1380                         reg = <0 0xee0a0000 0 0x100>;
1381                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1382                         clocks = <&cpg CPG_MOD 702>;
1383                         phys = <&usb2_phy1>;
1384                         phy-names = "usb";
1385                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1386                         status = "disabled";
1387                 };
1388
1389                 ohci2: usb@ee0c0000 {
1390                         compatible = "generic-ohci";
1391                         reg = <0 0xee0c0000 0 0x100>;
1392                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1393                         clocks = <&cpg CPG_MOD 701>;
1394                         phys = <&usb2_phy2>;
1395                         phy-names = "usb";
1396                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1397                         status = "disabled";
1398                 };
1399
1400                 hsusb: usb@e6590000 {
1401                         compatible = "renesas,usbhs-r8a7795",
1402                                      "renesas,rcar-gen3-usbhs";
1403                         reg = <0 0xe6590000 0 0x100>;
1404                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1405                         clocks = <&cpg CPG_MOD 704>;
1406                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1407                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1408                         dma-names = "ch0", "ch1", "ch2", "ch3";
1409                         renesas,buswait = <11>;
1410                         phys = <&usb2_phy0>;
1411                         phy-names = "usb";
1412                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1413                         status = "disabled";
1414                 };
1415
1416                 pciec0: pcie@fe000000 {
1417                         compatible = "renesas,pcie-r8a7795",
1418                                      "renesas,pcie-rcar-gen3";
1419                         reg = <0 0xfe000000 0 0x80000>;
1420                         #address-cells = <3>;
1421                         #size-cells = <2>;
1422                         bus-range = <0x00 0xff>;
1423                         device_type = "pci";
1424                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1425                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1426                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1427                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1428                         /* Map all possible DDR as inbound ranges */
1429                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1430                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1431                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1432                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1433                         #interrupt-cells = <1>;
1434                         interrupt-map-mask = <0 0 0 0>;
1435                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1436                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1437                         clock-names = "pcie", "pcie_bus";
1438                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1439                         status = "disabled";
1440                 };
1441
1442                 pciec1: pcie@ee800000 {
1443                         compatible = "renesas,pcie-r8a7795",
1444                                      "renesas,pcie-rcar-gen3";
1445                         reg = <0 0xee800000 0 0x80000>;
1446                         #address-cells = <3>;
1447                         #size-cells = <2>;
1448                         bus-range = <0x00 0xff>;
1449                         device_type = "pci";
1450                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1451                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1452                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1453                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1454                         /* Map all possible DDR as inbound ranges */
1455                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1456                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1457                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1458                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1459                         #interrupt-cells = <1>;
1460                         interrupt-map-mask = <0 0 0 0>;
1461                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1462                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1463                         clock-names = "pcie", "pcie_bus";
1464                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1465                         status = "disabled";
1466                 };
1467
1468                 vspbc: vsp@fe920000 {
1469                         compatible = "renesas,vsp2";
1470                         reg = <0 0xfe920000 0 0x8000>;
1471                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1472                         clocks = <&cpg CPG_MOD 624>;
1473                         power-domains = <&sysc R8A7795_PD_A3VP>;
1474
1475                         renesas,fcp = <&fcpvb1>;
1476                 };
1477
1478                 fcpvb1: fcp@fe92f000 {
1479                         compatible = "renesas,fcpv";
1480                         reg = <0 0xfe92f000 0 0x200>;
1481                         clocks = <&cpg CPG_MOD 606>;
1482                         power-domains = <&sysc R8A7795_PD_A3VP>;
1483                 };
1484
1485                 fcpf0: fcp@fe950000 {
1486                         compatible = "renesas,fcpf";
1487                         reg = <0 0xfe950000 0 0x200>;
1488                         clocks = <&cpg CPG_MOD 615>;
1489                         power-domains = <&sysc R8A7795_PD_A3VP>;
1490                 };
1491
1492                 fcpf1: fcp@fe951000 {
1493                         compatible = "renesas,fcpf";
1494                         reg = <0 0xfe951000 0 0x200>;
1495                         clocks = <&cpg CPG_MOD 614>;
1496                         power-domains = <&sysc R8A7795_PD_A3VP>;
1497                 };
1498
1499                 fcpf2: fcp@fe952000 {
1500                         compatible = "renesas,fcpf";
1501                         reg = <0 0xfe952000 0 0x200>;
1502                         clocks = <&cpg CPG_MOD 613>;
1503                         power-domains = <&sysc R8A7795_PD_A3VP>;
1504                 };
1505
1506                 vspbd: vsp@fe960000 {
1507                         compatible = "renesas,vsp2";
1508                         reg = <0 0xfe960000 0 0x8000>;
1509                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1510                         clocks = <&cpg CPG_MOD 626>;
1511                         power-domains = <&sysc R8A7795_PD_A3VP>;
1512
1513                         renesas,fcp = <&fcpvb0>;
1514                 };
1515
1516                 fcpvb0: fcp@fe96f000 {
1517                         compatible = "renesas,fcpv";
1518                         reg = <0 0xfe96f000 0 0x200>;
1519                         clocks = <&cpg CPG_MOD 607>;
1520                         power-domains = <&sysc R8A7795_PD_A3VP>;
1521                 };
1522
1523                 vspi0: vsp@fe9a0000 {
1524                         compatible = "renesas,vsp2";
1525                         reg = <0 0xfe9a0000 0 0x8000>;
1526                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1527                         clocks = <&cpg CPG_MOD 631>;
1528                         power-domains = <&sysc R8A7795_PD_A3VP>;
1529
1530                         renesas,fcp = <&fcpvi0>;
1531                 };
1532
1533                 fcpvi0: fcp@fe9af000 {
1534                         compatible = "renesas,fcpv";
1535                         reg = <0 0xfe9af000 0 0x200>;
1536                         clocks = <&cpg CPG_MOD 611>;
1537                         power-domains = <&sysc R8A7795_PD_A3VP>;
1538                 };
1539
1540                 vspi1: vsp@fe9b0000 {
1541                         compatible = "renesas,vsp2";
1542                         reg = <0 0xfe9b0000 0 0x8000>;
1543                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1544                         clocks = <&cpg CPG_MOD 630>;
1545                         power-domains = <&sysc R8A7795_PD_A3VP>;
1546
1547                         renesas,fcp = <&fcpvi1>;
1548                 };
1549
1550                 fcpvi1: fcp@fe9bf000 {
1551                         compatible = "renesas,fcpv";
1552                         reg = <0 0xfe9bf000 0 0x200>;
1553                         clocks = <&cpg CPG_MOD 610>;
1554                         power-domains = <&sysc R8A7795_PD_A3VP>;
1555                 };
1556
1557                 vspi2: vsp@fe9c0000 {
1558                         compatible = "renesas,vsp2";
1559                         reg = <0 0xfe9c0000 0 0x8000>;
1560                         interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1561                         clocks = <&cpg CPG_MOD 629>;
1562                         power-domains = <&sysc R8A7795_PD_A3VP>;
1563
1564                         renesas,fcp = <&fcpvi2>;
1565                 };
1566
1567                 fcpvi2: fcp@fe9cf000 {
1568                         compatible = "renesas,fcpv";
1569                         reg = <0 0xfe9cf000 0 0x200>;
1570                         clocks = <&cpg CPG_MOD 609>;
1571                         power-domains = <&sysc R8A7795_PD_A3VP>;
1572                 };
1573
1574                 vspd0: vsp@fea20000 {
1575                         compatible = "renesas,vsp2";
1576                         reg = <0 0xfea20000 0 0x4000>;
1577                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1578                         clocks = <&cpg CPG_MOD 623>;
1579                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1580
1581                         renesas,fcp = <&fcpvd0>;
1582                 };
1583
1584                 fcpvd0: fcp@fea27000 {
1585                         compatible = "renesas,fcpv";
1586                         reg = <0 0xfea27000 0 0x200>;
1587                         clocks = <&cpg CPG_MOD 603>;
1588                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1589                 };
1590
1591                 vspd1: vsp@fea28000 {
1592                         compatible = "renesas,vsp2";
1593                         reg = <0 0xfea28000 0 0x4000>;
1594                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1595                         clocks = <&cpg CPG_MOD 622>;
1596                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1597
1598                         renesas,fcp = <&fcpvd1>;
1599                 };
1600
1601                 fcpvd1: fcp@fea2f000 {
1602                         compatible = "renesas,fcpv";
1603                         reg = <0 0xfea2f000 0 0x200>;
1604                         clocks = <&cpg CPG_MOD 602>;
1605                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1606                 };
1607
1608                 vspd2: vsp@fea30000 {
1609                         compatible = "renesas,vsp2";
1610                         reg = <0 0xfea30000 0 0x4000>;
1611                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1612                         clocks = <&cpg CPG_MOD 621>;
1613                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1614
1615                         renesas,fcp = <&fcpvd2>;
1616                 };
1617
1618                 fcpvd2: fcp@fea37000 {
1619                         compatible = "renesas,fcpv";
1620                         reg = <0 0xfea37000 0 0x200>;
1621                         clocks = <&cpg CPG_MOD 601>;
1622                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1623                 };
1624
1625                 vspd3: vsp@fea38000 {
1626                         compatible = "renesas,vsp2";
1627                         reg = <0 0xfea38000 0 0x4000>;
1628                         interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1629                         clocks = <&cpg CPG_MOD 620>;
1630                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1631
1632                         renesas,fcp = <&fcpvd3>;
1633                 };
1634
1635                 fcpvd3: fcp@fea3f000 {
1636                         compatible = "renesas,fcpv";
1637                         reg = <0 0xfea3f000 0 0x200>;
1638                         clocks = <&cpg CPG_MOD 600>;
1639                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1640                 };
1641
1642                 fdp1@fe940000 {
1643                         compatible = "renesas,fdp1";
1644                         reg = <0 0xfe940000 0 0x2400>;
1645                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1646                         clocks = <&cpg CPG_MOD 119>;
1647                         power-domains = <&sysc R8A7795_PD_A3VP>;
1648                         renesas,fcp = <&fcpf0>;
1649                 };
1650
1651                 fdp1@fe944000 {
1652                         compatible = "renesas,fdp1";
1653                         reg = <0 0xfe944000 0 0x2400>;
1654                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1655                         clocks = <&cpg CPG_MOD 118>;
1656                         power-domains = <&sysc R8A7795_PD_A3VP>;
1657                         renesas,fcp = <&fcpf1>;
1658                 };
1659
1660                 fdp1@fe948000 {
1661                         compatible = "renesas,fdp1";
1662                         reg = <0 0xfe948000 0 0x2400>;
1663                         interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1664                         clocks = <&cpg CPG_MOD 117>;
1665                         power-domains = <&sysc R8A7795_PD_A3VP>;
1666                         renesas,fcp = <&fcpf2>;
1667                 };
1668
1669                 du: display@feb00000 {
1670                         compatible = "renesas,du-r8a7795";
1671                         reg = <0 0xfeb00000 0 0x80000>,
1672                               <0 0xfeb90000 0 0x14>;
1673                         reg-names = "du", "lvds.0";
1674                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1675                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1676                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1677                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1678                         clocks = <&cpg CPG_MOD 724>,
1679                                  <&cpg CPG_MOD 723>,
1680                                  <&cpg CPG_MOD 722>,
1681                                  <&cpg CPG_MOD 721>,
1682                                  <&cpg CPG_MOD 727>;
1683                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1684                         status = "disabled";
1685
1686                         vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1687
1688                         ports {
1689                                 #address-cells = <1>;
1690                                 #size-cells = <0>;
1691
1692                                 port@0 {
1693                                         reg = <0>;
1694                                         du_out_rgb: endpoint {
1695                                         };
1696                                 };
1697                                 port@1 {
1698                                         reg = <1>;
1699                                         du_out_hdmi0: endpoint {
1700                                         };
1701                                 };
1702                                 port@2 {
1703                                         reg = <2>;
1704                                         du_out_hdmi1: endpoint {
1705                                         };
1706                                 };
1707                                 port@3 {
1708                                         reg = <3>;
1709                                         du_out_lvds0: endpoint {
1710                                         };
1711                                 };
1712                         };
1713                 };
1714
1715                 tsc: thermal@e6198000 {
1716                         compatible = "renesas,r8a7795-thermal";
1717                         reg = <0 0xe6198000 0 0x68>,
1718                               <0 0xe61a0000 0 0x5c>,
1719                               <0 0xe61a8000 0 0x5c>;
1720                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1721                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1722                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1723                         clocks = <&cpg CPG_MOD 522>;
1724                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1725                         #thermal-sensor-cells = <1>;
1726                         status = "okay";
1727                 };
1728
1729                 thermal-zones {
1730                         sensor_thermal1: sensor-thermal1 {
1731                                 polling-delay-passive = <250>;
1732                                 polling-delay = <1000>;
1733                                 thermal-sensors = <&tsc 0>;
1734
1735                                 trips {
1736                                         sensor1_crit: sensor1-crit {
1737                                                 temperature = <120000>;
1738                                                 hysteresis = <2000>;
1739                                                 type = "critical";
1740                                         };
1741                                 };
1742                         };
1743
1744                         sensor_thermal2: sensor-thermal2 {
1745                                 polling-delay-passive = <250>;
1746                                 polling-delay = <1000>;
1747                                 thermal-sensors = <&tsc 1>;
1748
1749                                 trips {
1750                                         sensor2_crit: sensor2-crit {
1751                                                 temperature = <120000>;
1752                                                 hysteresis = <2000>;
1753                                                 type = "critical";
1754                                         };
1755                                 };
1756                         };
1757
1758                         sensor_thermal3: sensor-thermal3 {
1759                                 polling-delay-passive = <250>;
1760                                 polling-delay = <1000>;
1761                                 thermal-sensors = <&tsc 2>;
1762
1763                                 trips {
1764                                         sensor3_crit: sensor3-crit {
1765                                                 temperature = <120000>;
1766                                                 hysteresis = <2000>;
1767                                                 type = "critical";
1768                                         };
1769                                 };
1770                         };
1771                 };
1772         };
1773 };