arch/arm64/boot/dts/renesas/r8a7796.dtsi

   1 /*
   2  * Device Tree Source for the r8a7796 SoC
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7796-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7796";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         psci {
  32                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  33                 method = "smc";
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 a57_0: cpu@0 {
  41                         compatible = "arm,cortex-a57", "arm,armv8";
  42                         reg = <0x0>;
  43                         device_type = "cpu";
  44                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
  45                         next-level-cache = <&L2_CA57>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a57_1: cpu@1 {
  50                         compatible = "arm,cortex-a57","arm,armv8";
  51                         reg = <0x1>;
  52                         device_type = "cpu";
  53                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
  54                         next-level-cache = <&L2_CA57>;
  55                         enable-method = "psci";
  56                 };
  57
  58                 L2_CA57: cache-controller-0 {
  59                         compatible = "cache";
  60                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
  61                         cache-unified;
  62                         cache-level = <2>;
  63                 };
  64
  65                 L2_CA53: cache-controller-1 {
  66                         compatible = "cache";
  67                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
  68                         cache-unified;
  69                         cache-level = <2>;
  70                 };
  71         };
  72
  73         extal_clk: extal {
  74                 compatible = "fixed-clock";
  75                 #clock-cells = <0>;
  76                 /* This value must be overridden by the board */
  77                 clock-frequency = <0>;
  78         };
  79
  80         extalr_clk: extalr {
  81                 compatible = "fixed-clock";
  82                 #clock-cells = <0>;
  83                 /* This value must be overridden by the board */
  84                 clock-frequency = <0>;
  85         };
  86
  87         /* External CAN clock - to be overridden by boards that provide it */
  88         can_clk: can {
  89                 compatible = "fixed-clock";
  90                 #clock-cells = <0>;
  91                 clock-frequency = <0>;
  92         };
  93
  94         /* External SCIF clock - to be overridden by boards that provide it */
  95         scif_clk: scif {
  96                 compatible = "fixed-clock";
  97                 #clock-cells = <0>;
  98                 clock-frequency = <0>;
  99         };
 100
 101         soc {
 102                 compatible = "simple-bus";
 103                 interrupt-parent = <&gic>;
 104                 #address-cells = <2>;
 105                 #size-cells = <2>;
 106                 ranges;
 107
 108                 gic: interrupt-controller@f1010000 {
 109                         compatible = "arm,gic-400";
 110                         #interrupt-cells = <3>;
 111                         #address-cells = <0>;
 112                         interrupt-controller;
 113                         reg = <0x0 0xf1010000 0 0x1000>,
 114                               <0x0 0xf1020000 0 0x20000>,
 115                               <0x0 0xf1040000 0 0x20000>,
 116                               <0x0 0xf1060000 0 0x20000>;
 117                         interrupts = <GIC_PPI 9
 118                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 119                         clocks = <&cpg CPG_MOD 408>;
 120                         clock-names = "clk";
 121                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 122                 };
 123
 124                 timer {
 125                         compatible = "arm,armv8-timer";
 126                         interrupts = <GIC_PPI 13
 127                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 128                                      <GIC_PPI 14
 129                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 130                                      <GIC_PPI 11
 131                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 132                                      <GIC_PPI 10
 133                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 134                 };
 135
 136                 wdt0: watchdog@e6020000 {
 137                         compatible = "renesas,r8a7796-wdt",
 138                                      "renesas,rcar-gen3-wdt";
 139                         reg = <0 0xe6020000 0 0x0c>;
 140                         clocks = <&cpg CPG_MOD 402>;
 141                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 142                         status = "disabled";
 143                 };
 144
 145                 gpio0: gpio@e6050000 {
 146                         compatible = "renesas,gpio-r8a7796",
 147                                      "renesas,gpio-rcar";
 148                         reg = <0 0xe6050000 0 0x50>;
 149                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 150                         #gpio-cells = <2>;
 151                         gpio-controller;
 152                         gpio-ranges = <&pfc 0 0 16>;
 153                         #interrupt-cells = <2>;
 154                         interrupt-controller;
 155                         clocks = <&cpg CPG_MOD 912>;
 156                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 157                 };
 158
 159                 gpio1: gpio@e6051000 {
 160                         compatible = "renesas,gpio-r8a7796",
 161                                      "renesas,gpio-rcar";
 162                         reg = <0 0xe6051000 0 0x50>;
 163                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 164                         #gpio-cells = <2>;
 165                         gpio-controller;
 166                         gpio-ranges = <&pfc 0 32 29>;
 167                         #interrupt-cells = <2>;
 168                         interrupt-controller;
 169                         clocks = <&cpg CPG_MOD 911>;
 170                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 171                 };
 172
 173                 gpio2: gpio@e6052000 {
 174                         compatible = "renesas,gpio-r8a7796",
 175                                      "renesas,gpio-rcar";
 176                         reg = <0 0xe6052000 0 0x50>;
 177                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 178                         #gpio-cells = <2>;
 179                         gpio-controller;
 180                         gpio-ranges = <&pfc 0 64 15>;
 181                         #interrupt-cells = <2>;
 182                         interrupt-controller;
 183                         clocks = <&cpg CPG_MOD 910>;
 184                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 185                 };
 186
 187                 gpio3: gpio@e6053000 {
 188                         compatible = "renesas,gpio-r8a7796",
 189                                      "renesas,gpio-rcar";
 190                         reg = <0 0xe6053000 0 0x50>;
 191                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 192                         #gpio-cells = <2>;
 193                         gpio-controller;
 194                         gpio-ranges = <&pfc 0 96 16>;
 195                         #interrupt-cells = <2>;
 196                         interrupt-controller;
 197                         clocks = <&cpg CPG_MOD 909>;
 198                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 199                 };
 200
 201                 gpio4: gpio@e6054000 {
 202                         compatible = "renesas,gpio-r8a7796",
 203                                      "renesas,gpio-rcar";
 204                         reg = <0 0xe6054000 0 0x50>;
 205                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 206                         #gpio-cells = <2>;
 207                         gpio-controller;
 208                         gpio-ranges = <&pfc 0 128 18>;
 209                         #interrupt-cells = <2>;
 210                         interrupt-controller;
 211                         clocks = <&cpg CPG_MOD 908>;
 212                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 213                 };
 214
 215                 gpio5: gpio@e6055000 {
 216                         compatible = "renesas,gpio-r8a7796",
 217                                      "renesas,gpio-rcar";
 218                         reg = <0 0xe6055000 0 0x50>;
 219                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 220                         #gpio-cells = <2>;
 221                         gpio-controller;
 222                         gpio-ranges = <&pfc 0 160 26>;
 223                         #interrupt-cells = <2>;
 224                         interrupt-controller;
 225                         clocks = <&cpg CPG_MOD 907>;
 226                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 227                 };
 228
 229                 gpio6: gpio@e6055400 {
 230                         compatible = "renesas,gpio-r8a7796",
 231                                      "renesas,gpio-rcar";
 232                         reg = <0 0xe6055400 0 0x50>;
 233                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 234                         #gpio-cells = <2>;
 235                         gpio-controller;
 236                         gpio-ranges = <&pfc 0 192 32>;
 237                         #interrupt-cells = <2>;
 238                         interrupt-controller;
 239                         clocks = <&cpg CPG_MOD 906>;
 240                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 241                 };
 242
 243                 gpio7: gpio@e6055800 {
 244                         compatible = "renesas,gpio-r8a7796",
 245                                      "renesas,gpio-rcar";
 246                         reg = <0 0xe6055800 0 0x50>;
 247                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 248                         #gpio-cells = <2>;
 249                         gpio-controller;
 250                         gpio-ranges = <&pfc 0 224 4>;
 251                         #interrupt-cells = <2>;
 252                         interrupt-controller;
 253                         clocks = <&cpg CPG_MOD 905>;
 254                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 255                 };
 256
 257                 pfc: pin-controller@e6060000 {
 258                         compatible = "renesas,pfc-r8a7796";
 259                         reg = <0 0xe6060000 0 0x50c>;
 260                 };
 261
 262                 pmu_a57 {
 263                         compatible = "arm,cortex-a57-pmu";
 264                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 265                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 266                         interrupt-affinity = <&a57_0>,
 267                                              <&a57_1>;
 268                 };
 269
 270                 cpg: clock-controller@e6150000 {
 271                         compatible = "renesas,r8a7796-cpg-mssr";
 272                         reg = <0 0xe6150000 0 0x1000>;
 273                         clocks = <&extal_clk>, <&extalr_clk>;
 274                         clock-names = "extal", "extalr";
 275                         #clock-cells = <2>;
 276                         #power-domain-cells = <0>;
 277                 };
 278
 279                 rst: reset-controller@e6160000 {
 280                         compatible = "renesas,r8a7796-rst";
 281                         reg = <0 0xe6160000 0 0x0200>;
 282                 };
 283
 284                 prr: chipid@fff00044 {
 285                         compatible = "renesas,prr";
 286                         reg = <0 0xfff00044 0 4>;
 287                 };
 288
 289                 sysc: system-controller@e6180000 {
 290                         compatible = "renesas,r8a7796-sysc";
 291                         reg = <0 0xe6180000 0 0x0400>;
 292                         #power-domain-cells = <1>;
 293                 };
 294
 295                 i2c_dvfs: i2c@e60b0000 {
 296                         #address-cells = <1>;
 297                         #size-cells = <0>;
 298                         compatible = "renesas,iic-r8a7796",
 299                                      "renesas,rcar-gen3-iic",
 300                                      "renesas,rmobile-iic";
 301                         reg = <0 0xe60b0000 0 0x425>;
 302                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 303                         clocks = <&cpg CPG_MOD 926>;
 304                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 305                         status = "disabled";
 306                 };
 307
 308                 i2c0: i2c@e6500000 {
 309                         #address-cells = <1>;
 310                         #size-cells = <0>;
 311                         compatible = "renesas,i2c-r8a7796",
 312                                      "renesas,rcar-gen3-i2c";
 313                         reg = <0 0xe6500000 0 0x40>;
 314                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 315                         clocks = <&cpg CPG_MOD 931>;
 316                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 317                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 318                                <&dmac2 0x91>, <&dmac2 0x90>;
 319                         dma-names = "tx", "rx", "tx", "rx";
 320                         i2c-scl-internal-delay-ns = <110>;
 321                         status = "disabled";
 322                 };
 323
 324                 i2c1: i2c@e6508000 {
 325                         #address-cells = <1>;
 326                         #size-cells = <0>;
 327                         compatible = "renesas,i2c-r8a7796",
 328                                      "renesas,rcar-gen3-i2c";
 329                         reg = <0 0xe6508000 0 0x40>;
 330                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 331                         clocks = <&cpg CPG_MOD 930>;
 332                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 333                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 334                                <&dmac2 0x93>, <&dmac2 0x92>;
 335                         dma-names = "tx", "rx", "tx", "rx";
 336                         i2c-scl-internal-delay-ns = <6>;
 337                         status = "disabled";
 338                 };
 339
 340                 i2c2: i2c@e6510000 {
 341                         #address-cells = <1>;
 342                         #size-cells = <0>;
 343                         compatible = "renesas,i2c-r8a7796",
 344                                      "renesas,rcar-gen3-i2c";
 345                         reg = <0 0xe6510000 0 0x40>;
 346                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 347                         clocks = <&cpg CPG_MOD 929>;
 348                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 349                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 350                                <&dmac2 0x95>, <&dmac2 0x94>;
 351                         dma-names = "tx", "rx", "tx", "rx";
 352                         i2c-scl-internal-delay-ns = <6>;
 353                         status = "disabled";
 354                 };
 355
 356                 i2c3: i2c@e66d0000 {
 357                         #address-cells = <1>;
 358                         #size-cells = <0>;
 359                         compatible = "renesas,i2c-r8a7796",
 360                                      "renesas,rcar-gen3-i2c";
 361                         reg = <0 0xe66d0000 0 0x40>;
 362                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 363                         clocks = <&cpg CPG_MOD 928>;
 364                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 365                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 366                         dma-names = "tx", "rx";
 367                         i2c-scl-internal-delay-ns = <110>;
 368                         status = "disabled";
 369                 };
 370
 371                 i2c4: i2c@e66d8000 {
 372                         #address-cells = <1>;
 373                         #size-cells = <0>;
 374                         compatible = "renesas,i2c-r8a7796",
 375                                      "renesas,rcar-gen3-i2c";
 376                         reg = <0 0xe66d8000 0 0x40>;
 377                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 378                         clocks = <&cpg CPG_MOD 927>;
 379                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 380                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 381                         dma-names = "tx", "rx";
 382                         i2c-scl-internal-delay-ns = <110>;
 383                         status = "disabled";
 384                 };
 385
 386                 i2c5: i2c@e66e0000 {
 387                         #address-cells = <1>;
 388                         #size-cells = <0>;
 389                         compatible = "renesas,i2c-r8a7796",
 390                                      "renesas,rcar-gen3-i2c";
 391                         reg = <0 0xe66e0000 0 0x40>;
 392                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 393                         clocks = <&cpg CPG_MOD 919>;
 394                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 395                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 396                         dma-names = "tx", "rx";
 397                         i2c-scl-internal-delay-ns = <110>;
 398                         status = "disabled";
 399                 };
 400
 401                 i2c6: i2c@e66e8000 {
 402                         #address-cells = <1>;
 403                         #size-cells = <0>;
 404                         compatible = "renesas,i2c-r8a7796",
 405                                      "renesas,rcar-gen3-i2c";
 406                         reg = <0 0xe66e8000 0 0x40>;
 407                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 408                         clocks = <&cpg CPG_MOD 918>;
 409                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 410                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 411                         dma-names = "tx", "rx";
 412                         i2c-scl-internal-delay-ns = <6>;
 413                         status = "disabled";
 414                 };
 415
 416                 can0: can@e6c30000 {
 417                         compatible = "renesas,can-r8a7796",
 418                                      "renesas,rcar-gen3-can";
 419                         reg = <0 0xe6c30000 0 0x1000>;
 420                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 421                         clocks = <&cpg CPG_MOD 916>,
 422                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 423                                <&can_clk>;
 424                         clock-names = "clkp1", "clkp2", "can_clk";
 425                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 426                         assigned-clock-rates = <40000000>;
 427                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 428                         status = "disabled";
 429                 };
 430
 431                 can1: can@e6c38000 {
 432                         compatible = "renesas,can-r8a7796",
 433                                      "renesas,rcar-gen3-can";
 434                         reg = <0 0xe6c38000 0 0x1000>;
 435                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 436                         clocks = <&cpg CPG_MOD 915>,
 437                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 438                                <&can_clk>;
 439                         clock-names = "clkp1", "clkp2", "can_clk";
 440                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 441                         assigned-clock-rates = <40000000>;
 442                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 443                         status = "disabled";
 444                 };
 445
 446                 canfd: can@e66c0000 {
 447                         compatible = "renesas,r8a7796-canfd",
 448                                      "renesas,rcar-gen3-canfd";
 449                         reg = <0 0xe66c0000 0 0x8000>;
 450                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 451                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 452                         clocks = <&cpg CPG_MOD 914>,
 453                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 454                                <&can_clk>;
 455                         clock-names = "fck", "canfd", "can_clk";
 456                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 457                         assigned-clock-rates = <40000000>;
 458                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 459                         status = "disabled";
 460
 461                         channel0 {
 462                                 status = "disabled";
 463                         };
 464
 465                         channel1 {
 466                                 status = "disabled";
 467                         };
 468                 };
 469
 470                 avb: ethernet@e6800000 {
 471                         compatible = "renesas,etheravb-r8a7796",
 472                                      "renesas,etheravb-rcar-gen3";
 473                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 474                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 475                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 477                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 478                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 479                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 481                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 482                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 483                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 484                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 485                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 486                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 487                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 488                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 489                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 490                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 491                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 492                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 493                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 494                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 499                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 500                                           "ch4", "ch5", "ch6", "ch7",
 501                                           "ch8", "ch9", "ch10", "ch11",
 502                                           "ch12", "ch13", "ch14", "ch15",
 503                                           "ch16", "ch17", "ch18", "ch19",
 504                                           "ch20", "ch21", "ch22", "ch23",
 505                                           "ch24";
 506                         clocks = <&cpg CPG_MOD 812>;
 507                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 508                         phy-mode = "rgmii-txid";
 509                         #address-cells = <1>;
 510                         #size-cells = <0>;
 511                         status = "disabled";
 512                 };
 513
 514                 hscif0: serial@e6540000 {
 515                         compatible = "renesas,hscif-r8a7796",
 516                                      "renesas,rcar-gen3-hscif",
 517                                      "renesas,hscif";
 518                         reg = <0 0xe6540000 0 0x60>;
 519                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 520                         clocks = <&cpg CPG_MOD 520>,
 521                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 522                                  <&scif_clk>;
 523                         clock-names = "fck", "brg_int", "scif_clk";
 524                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 525                                <&dmac2 0x31>, <&dmac2 0x30>;
 526                         dma-names = "tx", "rx", "tx", "rx";
 527                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 528                         status = "disabled";
 529                 };
 530
 531                 hscif1: serial@e6550000 {
 532                         compatible = "renesas,hscif-r8a7796",
 533                                      "renesas,rcar-gen3-hscif",
 534                                      "renesas,hscif";
 535                         reg = <0 0xe6550000 0 0x60>;
 536                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 537                         clocks = <&cpg CPG_MOD 519>,
 538                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 539                                  <&scif_clk>;
 540                         clock-names = "fck", "brg_int", "scif_clk";
 541                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 542                                <&dmac2 0x33>, <&dmac2 0x32>;
 543                         dma-names = "tx", "rx", "tx", "rx";
 544                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 545                         status = "disabled";
 546                 };
 547
 548                 hscif2: serial@e6560000 {
 549                         compatible = "renesas,hscif-r8a7796",
 550                                      "renesas,rcar-gen3-hscif",
 551                                      "renesas,hscif";
 552                         reg = <0 0xe6560000 0 0x60>;
 553                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 554                         clocks = <&cpg CPG_MOD 518>,
 555                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 556                                  <&scif_clk>;
 557                         clock-names = "fck", "brg_int", "scif_clk";
 558                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 559                                <&dmac2 0x35>, <&dmac2 0x34>;
 560                         dma-names = "tx", "rx", "tx", "rx";
 561                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 562                         status = "disabled";
 563                 };
 564
 565                 hscif3: serial@e66a0000 {
 566                         compatible = "renesas,hscif-r8a7796",
 567                                      "renesas,rcar-gen3-hscif",
 568                                      "renesas,hscif";
 569                         reg = <0 0xe66a0000 0 0x60>;
 570                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 571                         clocks = <&cpg CPG_MOD 517>,
 572                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 573                                  <&scif_clk>;
 574                         clock-names = "fck", "brg_int", "scif_clk";
 575                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 576                         dma-names = "tx", "rx";
 577                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 578                         status = "disabled";
 579                 };
 580
 581                 hscif4: serial@e66b0000 {
 582                         compatible = "renesas,hscif-r8a7796",
 583                                      "renesas,rcar-gen3-hscif",
 584                                      "renesas,hscif";
 585                         reg = <0 0xe66b0000 0 0x60>;
 586                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 587                         clocks = <&cpg CPG_MOD 516>,
 588                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 589                                  <&scif_clk>;
 590                         clock-names = "fck", "brg_int", "scif_clk";
 591                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 592                         dma-names = "tx", "rx";
 593                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 594                         status = "disabled";
 595                 };
 596
 597                 scif0: serial@e6e60000 {
 598                         compatible = "renesas,scif-r8a7796",
 599                                      "renesas,rcar-gen3-scif", "renesas,scif";
 600                         reg = <0 0xe6e60000 0 64>;
 601                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 602                         clocks = <&cpg CPG_MOD 207>,
 603                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 604                                  <&scif_clk>;
 605                         clock-names = "fck", "brg_int", "scif_clk";
 606                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 607                                <&dmac2 0x51>, <&dmac2 0x50>;
 608                         dma-names = "tx", "rx", "tx", "rx";
 609                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 610                         status = "disabled";
 611                 };
 612
 613                 scif1: serial@e6e68000 {
 614                         compatible = "renesas,scif-r8a7796",
 615                                      "renesas,rcar-gen3-scif", "renesas,scif";
 616                         reg = <0 0xe6e68000 0 64>;
 617                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 618                         clocks = <&cpg CPG_MOD 206>,
 619                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 620                                  <&scif_clk>;
 621                         clock-names = "fck", "brg_int", "scif_clk";
 622                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 623                                <&dmac2 0x53>, <&dmac2 0x52>;
 624                         dma-names = "tx", "rx", "tx", "rx";
 625                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 626                         status = "disabled";
 627                 };
 628
 629                 scif2: serial@e6e88000 {
 630                         compatible = "renesas,scif-r8a7796",
 631                                      "renesas,rcar-gen3-scif", "renesas,scif";
 632                         reg = <0 0xe6e88000 0 64>;
 633                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 634                         clocks = <&cpg CPG_MOD 310>,
 635                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 636                                  <&scif_clk>;
 637                         clock-names = "fck", "brg_int", "scif_clk";
 638                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 639                         status = "disabled";
 640                 };
 641
 642                 scif3: serial@e6c50000 {
 643                         compatible = "renesas,scif-r8a7796",
 644                                      "renesas,rcar-gen3-scif", "renesas,scif";
 645                         reg = <0 0xe6c50000 0 64>;
 646                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 647                         clocks = <&cpg CPG_MOD 204>,
 648                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 649                                  <&scif_clk>;
 650                         clock-names = "fck", "brg_int", "scif_clk";
 651                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 652                         dma-names = "tx", "rx";
 653                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 654                         status = "disabled";
 655                 };
 656
 657                 scif4: serial@e6c40000 {
 658                         compatible = "renesas,scif-r8a7796",
 659                                      "renesas,rcar-gen3-scif", "renesas,scif";
 660                         reg = <0 0xe6c40000 0 64>;
 661                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 662                         clocks = <&cpg CPG_MOD 203>,
 663                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 664                                  <&scif_clk>;
 665                         clock-names = "fck", "brg_int", "scif_clk";
 666                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 667                         dma-names = "tx", "rx";
 668                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 669                         status = "disabled";
 670                 };
 671
 672                 scif5: serial@e6f30000 {
 673                         compatible = "renesas,scif-r8a7796",
 674                                      "renesas,rcar-gen3-scif", "renesas,scif";
 675                         reg = <0 0xe6f30000 0 64>;
 676                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 677                         clocks = <&cpg CPG_MOD 202>,
 678                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 679                                  <&scif_clk>;
 680                         clock-names = "fck", "brg_int", "scif_clk";
 681                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
 682                                <&dmac2 0x5b>, <&dmac2 0x5a>;
 683                         dma-names = "tx", "rx", "tx", "rx";
 684                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 685                         status = "disabled";
 686                 };
 687
 688                 msiof0: spi@e6e90000 {
 689                         compatible = "renesas,msiof-r8a7796",
 690                                      "renesas,rcar-gen3-msiof";
 691                         reg = <0 0xe6e90000 0 0x0064>;
 692                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 693                         clocks = <&cpg CPG_MOD 211>;
 694                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
 695                                <&dmac2 0x41>, <&dmac2 0x40>;
 696                         dma-names = "tx", "rx";
 697                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 698                         #address-cells = <1>;
 699                         #size-cells = <0>;
 700                         status = "disabled";
 701                 };
 702
 703                 msiof1: spi@e6ea0000 {
 704                         compatible = "renesas,msiof-r8a7796",
 705                                      "renesas,rcar-gen3-msiof";
 706                         reg = <0 0xe6ea0000 0 0x0064>;
 707                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 708                         clocks = <&cpg CPG_MOD 210>;
 709                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
 710                                <&dmac2 0x43>, <&dmac2 0x42>;
 711                         dma-names = "tx", "rx";
 712                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 713                         #address-cells = <1>;
 714                         #size-cells = <0>;
 715                         status = "disabled";
 716                 };
 717
 718                 msiof2: spi@e6c00000 {
 719                         compatible = "renesas,msiof-r8a7796",
 720                                      "renesas,rcar-gen3-msiof";
 721                         reg = <0 0xe6c00000 0 0x0064>;
 722                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 723                         clocks = <&cpg CPG_MOD 209>;
 724                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
 725                         dma-names = "tx", "rx";
 726                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 727                         #address-cells = <1>;
 728                         #size-cells = <0>;
 729                         status = "disabled";
 730                 };
 731
 732                 msiof3: spi@e6c10000 {
 733                         compatible = "renesas,msiof-r8a7796",
 734                                      "renesas,rcar-gen3-msiof";
 735                         reg = <0 0xe6c10000 0 0x0064>;
 736                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 737                         clocks = <&cpg CPG_MOD 208>;
 738                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
 739                         dma-names = "tx", "rx";
 740                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 741                         #address-cells = <1>;
 742                         #size-cells = <0>;
 743                         status = "disabled";
 744                 };
 745
 746                 dmac0: dma-controller@e6700000 {
 747                         compatible = "renesas,dmac-r8a7796",
 748                                      "renesas,rcar-dmac";
 749                         reg = <0 0xe6700000 0 0x10000>;
 750                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 751                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 752                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 753                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 754                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 755                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 756                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 757                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 758                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 759                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 760                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 761                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 762                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 763                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 764                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 765                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 766                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 767                         interrupt-names = "error",
 768                                         "ch0", "ch1", "ch2", "ch3",
 769                                         "ch4", "ch5", "ch6", "ch7",
 770                                         "ch8", "ch9", "ch10", "ch11",
 771                                         "ch12", "ch13", "ch14", "ch15";
 772                         clocks = <&cpg CPG_MOD 219>;
 773                         clock-names = "fck";
 774                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 775                         #dma-cells = <1>;
 776                         dma-channels = <16>;
 777                 };
 778
 779                 dmac1: dma-controller@e7300000 {
 780                         compatible = "renesas,dmac-r8a7796",
 781                                      "renesas,rcar-dmac";
 782                         reg = <0 0xe7300000 0 0x10000>;
 783                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 784                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 785                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 786                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 787                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 788                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 789                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 790                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 791                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 792                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 793                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 794                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 795                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 796                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 797                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 798                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 799                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 800                         interrupt-names = "error",
 801                                         "ch0", "ch1", "ch2", "ch3",
 802                                         "ch4", "ch5", "ch6", "ch7",
 803                                         "ch8", "ch9", "ch10", "ch11",
 804                                         "ch12", "ch13", "ch14", "ch15";
 805                         clocks = <&cpg CPG_MOD 218>;
 806                         clock-names = "fck";
 807                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 808                         #dma-cells = <1>;
 809                         dma-channels = <16>;
 810                 };
 811
 812                 dmac2: dma-controller@e7310000 {
 813                         compatible = "renesas,dmac-r8a7796",
 814                                      "renesas,rcar-dmac";
 815                         reg = <0 0xe7310000 0 0x10000>;
 816                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 817                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 818                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 819                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 820                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 821                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 822                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 823                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 824                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 825                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 826                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 827                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 828                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 829                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 830                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 831                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 832                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 833                         interrupt-names = "error",
 834                                         "ch0", "ch1", "ch2", "ch3",
 835                                         "ch4", "ch5", "ch6", "ch7",
 836                                         "ch8", "ch9", "ch10", "ch11",
 837                                         "ch12", "ch13", "ch14", "ch15";
 838                         clocks = <&cpg CPG_MOD 217>;
 839                         clock-names = "fck";
 840                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 841                         #dma-cells = <1>;
 842                         dma-channels = <16>;
 843                 };
 844
 845                 sdhi0: sd@ee100000 {
 846                         compatible = "renesas,sdhi-r8a7796";
 847                         reg = <0 0xee100000 0 0x2000>;
 848                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 849                         clocks = <&cpg CPG_MOD 314>;
 850                         max-frequency = <200000000>;
 851                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 852                         status = "disabled";
 853                 };
 854
 855                 sdhi1: sd@ee120000 {
 856                         compatible = "renesas,sdhi-r8a7796";
 857                         reg = <0 0xee120000 0 0x2000>;
 858                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 859                         clocks = <&cpg CPG_MOD 313>;
 860                         max-frequency = <200000000>;
 861                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 862                         status = "disabled";
 863                 };
 864
 865                 sdhi2: sd@ee140000 {
 866                         compatible = "renesas,sdhi-r8a7796";
 867                         reg = <0 0xee140000 0 0x2000>;
 868                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 869                         clocks = <&cpg CPG_MOD 312>;
 870                         max-frequency = <200000000>;
 871                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 872                         status = "disabled";
 873                 };
 874
 875                 sdhi3: sd@ee160000 {
 876                         compatible = "renesas,sdhi-r8a7796";
 877                         reg = <0 0xee160000 0 0x2000>;
 878                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 879                         clocks = <&cpg CPG_MOD 311>;
 880                         max-frequency = <200000000>;
 881                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 882                         status = "disabled";
 883                 };
 884
 885                 tsc: thermal@e6198000 {
 886                         compatible = "renesas,r8a7796-thermal";
 887                         reg = <0 0xe6198000 0 0x68>,
 888                               <0 0xe61a0000 0 0x5c>,
 889                               <0 0xe61a8000 0 0x5c>;
 890                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 891                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 892                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 893                         clocks = <&cpg CPG_MOD 522>;
 894                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 895                         #thermal-sensor-cells = <1>;
 896                         status = "okay";
 897                 };
 898
 899                 thermal-zones {
 900                         sensor_thermal1: sensor-thermal1 {
 901                                 polling-delay-passive = <250>;
 902                                 polling-delay = <1000>;
 903                                 thermal-sensors = <&tsc 0>;
 904
 905                                 trips {
 906                                         sensor1_crit: sensor1-crit {
 907                                                 temperature = <120000>;
 908                                                 hysteresis = <2000>;
 909                                                 type = "critical";
 910                                         };
 911                                 };
 912                         };
 913
 914                         sensor_thermal2: sensor-thermal2 {
 915                                 polling-delay-passive = <250>;
 916                                 polling-delay = <1000>;
 917                                 thermal-sensors = <&tsc 1>;
 918
 919                                 trips {
 920                                         sensor2_crit: sensor2-crit {
 921                                                 temperature = <120000>;
 922                                                 hysteresis = <2000>;
 923                                                 type = "critical";
 924                                         };
 925                                 };
 926                         };
 927
 928                         sensor_thermal3: sensor-thermal3 {
 929                                 polling-delay-passive = <250>;
 930                                 polling-delay = <1000>;
 931                                 thermal-sensors = <&tsc 2>;
 932
 933                                 trips {
 934                                         sensor3_crit: sensor3-crit {
 935                                                 temperature = <120000>;
 936                                                 hysteresis = <2000>;
 937                                                 type = "critical";
 938                                         };
 939                                 };
 940                         };
 941                 };
 942         };
 943 };