arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi

   1 /*
   2  * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 / {
  44         cluster0_opp: opp-table0 {
  45                 compatible = "operating-points-v2";
  46                 opp-shared;
  47
  48                 opp00 {
  49                         opp-hz = /bits/ 64 <408000000>;
  50                         opp-microvolt = <800000>;
  51                         clock-latency-ns = <40000>;
  52                 };
  53                 opp01 {
  54                         opp-hz = /bits/ 64 <600000000>;
  55                         opp-microvolt = <800000>;
  56                 };
  57                 opp02 {
  58                         opp-hz = /bits/ 64 <816000000>;
  59                         opp-microvolt = <800000>;
  60                 };
  61                 opp03 {
  62                         opp-hz = /bits/ 64 <1008000000>;
  63                         opp-microvolt = <875000>;
  64                 };
  65                 opp04 {
  66                         opp-hz = /bits/ 64 <1200000000>;
  67                         opp-microvolt = <925000>;
  68                 };
  69                 opp05 {
  70                         opp-hz = /bits/ 64 <1416000000>;
  71                         opp-microvolt = <1050000>;
  72                 };
  73                 opp06 {
  74                         opp-hz = /bits/ 64 <1512000000>;
  75                         opp-microvolt = <1125000>;
  76                 };
  77         };
  78
  79         cluster1_opp: opp-table1 {
  80                 compatible = "operating-points-v2";
  81                 opp-shared;
  82
  83                 opp00 {
  84                         opp-hz = /bits/ 64 <408000000>;
  85                         opp-microvolt = <800000>;
  86                         clock-latency-ns = <40000>;
  87                 };
  88                 opp01 {
  89                         opp-hz = /bits/ 64 <600000000>;
  90                         opp-microvolt = <800000>;
  91                 };
  92                 opp02 {
  93                         opp-hz = /bits/ 64 <816000000>;
  94                         opp-microvolt = <825000>;
  95                 };
  96                 opp03 {
  97                         opp-hz = /bits/ 64 <1008000000>;
  98                         opp-microvolt = <875000>;
  99                 };
 100                 opp04 {
 101                         opp-hz = /bits/ 64 <1200000000>;
 102                         opp-microvolt = <950000>;
 103                 };
 104                 opp05 {
 105                         opp-hz = /bits/ 64 <1416000000>;
 106                         opp-microvolt = <1025000>;
 107                 };
 108                 opp06 {
 109                         opp-hz = /bits/ 64 <1608000000>;
 110                         opp-microvolt = <1075000>;
 111                 };
 112                 opp07 {
 113                         opp-hz = /bits/ 64 <1800000000>;
 114                         opp-microvolt = <1150000>;
 115                 };
 116                 opp08 {
 117                         opp-hz = /bits/ 64 <2016000000>;
 118                         opp-microvolt = <1250000>;
 119                 };
 120         };
 121 };
 122
 123 &cpu_l0 {
 124         operating-points-v2 = <&cluster0_opp>;
 125 };
 126
 127 &cpu_l1 {
 128         operating-points-v2 = <&cluster0_opp>;
 129 };
 130
 131 &cpu_l2 {
 132         operating-points-v2 = <&cluster0_opp>;
 133 };
 134
 135 &cpu_l3 {
 136         operating-points-v2 = <&cluster0_opp>;
 137 };
 138
 139 &cpu_b0 {
 140         operating-points-v2 = <&cluster1_opp>;
 141 };
 142
 143 &cpu_b1 {
 144         operating-points-v2 = <&cluster1_opp>;
 145 };