2 * arch/arm64/include/asm/arch_timer.h
4 * Copyright (C) 2012 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef __ASM_ARCH_TIMER_H
20 #define __ASM_ARCH_TIMER_H
22 #include <asm/barrier.h>
24 #include <linux/bug.h>
25 #include <linux/init.h>
26 #include <linux/types.h>
28 #include <clocksource/arm_arch_timer.h>
31 * These register accessors are marked inline so the compiler can
32 * nicely work out which register we want, and chuck away the rest of
35 static __always_inline
36 void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
38 if (access == ARCH_TIMER_PHYS_ACCESS) {
40 case ARCH_TIMER_REG_CTRL:
41 asm volatile("msr cntp_ctl_el0, %0" : : "r" (val));
43 case ARCH_TIMER_REG_TVAL:
44 asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
47 } else if (access == ARCH_TIMER_VIRT_ACCESS) {
49 case ARCH_TIMER_REG_CTRL:
50 asm volatile("msr cntv_ctl_el0, %0" : : "r" (val));
52 case ARCH_TIMER_REG_TVAL:
53 asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
61 static __always_inline
62 u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
66 if (access == ARCH_TIMER_PHYS_ACCESS) {
68 case ARCH_TIMER_REG_CTRL:
69 asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val));
71 case ARCH_TIMER_REG_TVAL:
72 asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
75 } else if (access == ARCH_TIMER_VIRT_ACCESS) {
77 case ARCH_TIMER_REG_CTRL:
78 asm volatile("mrs %0, cntv_ctl_el0" : "=r" (val));
80 case ARCH_TIMER_REG_TVAL:
81 asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
89 static inline u32 arch_timer_get_cntfrq(void)
92 asm volatile("mrs %0, cntfrq_el0" : "=r" (val));
96 static inline u32 arch_timer_get_cntkctl(void)
99 asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
103 static inline void arch_timer_set_cntkctl(u32 cntkctl)
105 asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
108 static inline u64 arch_counter_get_cntpct(void)
111 * AArch64 kernel and user space mandate the use of CNTVCT.
117 static inline u64 arch_counter_get_cntvct(void)
122 asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
127 static inline int arch_timer_arch_init(void)