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1 /*
2  * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 #ifndef __ASM_CPUFEATURE_H
10 #define __ASM_CPUFEATURE_H
11
12 #include <asm/hwcap.h>
13 #include <asm/sysreg.h>
14
15 /*
16  * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
17  * in the kernel and for user space to keep track of which optional features
18  * are supported by the current system. So let's map feature 'x' to HWCAP_x.
19  * Note that HWCAP_x constants are bit fields so we need to take the log.
20  */
21
22 #define MAX_CPU_FEATURES        (8 * sizeof(elf_hwcap))
23 #define cpu_feature(x)          ilog2(HWCAP_ ## x)
24
25 #define ARM64_WORKAROUND_CLEAN_CACHE            0
26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE    1
27 #define ARM64_WORKAROUND_845719                 2
28 #define ARM64_HAS_SYSREG_GIC_CPUIF              3
29 #define ARM64_HAS_PAN                           4
30 #define ARM64_HAS_LSE_ATOMICS                   5
31
32 #define ARM64_NCAPS                             6
33
34 #ifndef __ASSEMBLY__
35
36 #include <linux/kernel.h>
37
38 /* CPU feature register tracking */
39 enum ftr_type {
40         FTR_EXACT,      /* Use a predefined safe value */
41         FTR_LOWER_SAFE, /* Smaller value is safe */
42         FTR_HIGHER_SAFE,/* Bigger value is safe */
43 };
44
45 #define FTR_STRICT      true    /* SANITY check strict matching required */
46 #define FTR_NONSTRICT   false   /* SANITY check ignored */
47
48 struct arm64_ftr_bits {
49         bool            strict;   /* CPU Sanity check: strict matching required ? */
50         enum ftr_type   type;
51         u8              shift;
52         u8              width;
53         s64             safe_val; /* safe value for discrete features */
54 };
55
56 /*
57  * @arm64_ftr_reg - Feature register
58  * @strict_mask         Bits which should match across all CPUs for sanity.
59  * @sys_val             Safe value across the CPUs (system view)
60  */
61 struct arm64_ftr_reg {
62         u32                     sys_id;
63         const char              *name;
64         u64                     strict_mask;
65         u64                     sys_val;
66         struct arm64_ftr_bits   *ftr_bits;
67 };
68
69 struct arm64_cpu_capabilities {
70         const char *desc;
71         u16 capability;
72         bool (*matches)(const struct arm64_cpu_capabilities *);
73         void (*enable)(void *);         /* Called on all active CPUs */
74         union {
75                 struct {        /* To be used for erratum handling only */
76                         u32 midr_model;
77                         u32 midr_range_min, midr_range_max;
78                 };
79
80                 struct {        /* Feature register checking */
81                         u32 sys_reg;
82                         int field_pos;
83                         int min_field_value;
84                         int hwcap_type;
85                         unsigned long hwcap;
86                 };
87         };
88 };
89
90 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
91
92 static inline bool cpu_have_feature(unsigned int num)
93 {
94         return elf_hwcap & (1UL << num);
95 }
96
97 static inline bool cpus_have_cap(unsigned int num)
98 {
99         if (num >= ARM64_NCAPS)
100                 return false;
101         return test_bit(num, cpu_hwcaps);
102 }
103
104 static inline void cpus_set_cap(unsigned int num)
105 {
106         if (num >= ARM64_NCAPS)
107                 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
108                         num, ARM64_NCAPS);
109         else
110                 __set_bit(num, cpu_hwcaps);
111 }
112
113 static inline int __attribute_const__
114 cpuid_feature_extract_field_width(u64 features, int field, int width)
115 {
116         return (s64)(features << (64 - width - field)) >> (64 - width);
117 }
118
119 static inline int __attribute_const__
120 cpuid_feature_extract_field(u64 features, int field)
121 {
122         return cpuid_feature_extract_field_width(features, field, 4);
123 }
124
125 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
126 {
127         return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
128 }
129
130 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
131 {
132         return cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width);
133 }
134
135 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
136 {
137         return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
138                 cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
139 }
140
141 void __init setup_cpu_features(void);
142
143 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
144                             const char *info);
145 void check_local_cpu_errata(void);
146
147 #ifdef CONFIG_HOTPLUG_CPU
148 void verify_local_cpu_capabilities(void);
149 #else
150 static inline void verify_local_cpu_capabilities(void)
151 {
152 }
153 #endif
154
155 u64 read_system_reg(u32 id);
156
157 static inline bool cpu_supports_mixed_endian_el0(void)
158 {
159         return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
160 }
161
162 static inline bool system_supports_mixed_endian_el0(void)
163 {
164         return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
165 }
166
167 #endif /* __ASSEMBLY__ */
168
169 #endif