2 * Copyright (C) 2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __ARM64_KVM_HYP_H__
19 #define __ARM64_KVM_HYP_H__
21 #include <linux/compiler.h>
22 #include <linux/kvm_host.h>
23 #include <asm/kvm_mmu.h>
24 #include <asm/sysreg.h>
26 #define __hyp_text __section(.hyp.text) notrace
28 static inline unsigned long __kern_hyp_va(unsigned long v)
30 asm volatile(ALTERNATIVE("and %0, %0, %1",
32 ARM64_HAS_VIRT_HOST_EXTN)
33 : "+r" (v) : "i" (HYP_PAGE_OFFSET_MASK));
37 #define kern_hyp_va(v) (typeof(v))(__kern_hyp_va((unsigned long)(v)))
39 #define read_sysreg_elx(r,nvh,vh) \
42 asm volatile(ALTERNATIVE("mrs %0, " __stringify(r##nvh),\
43 "mrs_s %0, " __stringify(r##vh),\
44 ARM64_HAS_VIRT_HOST_EXTN) \
49 #define write_sysreg_elx(v,r,nvh,vh) \
51 u64 __val = (u64)(v); \
52 asm volatile(ALTERNATIVE("msr " __stringify(r##nvh) ", %x0",\
53 "msr_s " __stringify(r##vh) ", %x0",\
54 ARM64_HAS_VIRT_HOST_EXTN) \
59 * Unified accessors for registers that have a different encoding
60 * between VHE and non-VHE. They must be specified without their "ELx"
63 #define read_sysreg_el2(r) \
66 asm volatile(ALTERNATIVE("mrs %0, " __stringify(r##_EL2),\
67 "mrs %0, " __stringify(r##_EL1),\
68 ARM64_HAS_VIRT_HOST_EXTN) \
73 #define write_sysreg_el2(v,r) \
75 u64 __val = (u64)(v); \
76 asm volatile(ALTERNATIVE("msr " __stringify(r##_EL2) ", %x0",\
77 "msr " __stringify(r##_EL1) ", %x0",\
78 ARM64_HAS_VIRT_HOST_EXTN) \
82 #define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02)
83 #define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02)
84 #define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12)
85 #define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12)
87 /* The VHE specific system registers and their encoding */
88 #define sctlr_EL12 sys_reg(3, 5, 1, 0, 0)
89 #define cpacr_EL12 sys_reg(3, 5, 1, 0, 2)
90 #define ttbr0_EL12 sys_reg(3, 5, 2, 0, 0)
91 #define ttbr1_EL12 sys_reg(3, 5, 2, 0, 1)
92 #define tcr_EL12 sys_reg(3, 5, 2, 0, 2)
93 #define afsr0_EL12 sys_reg(3, 5, 5, 1, 0)
94 #define afsr1_EL12 sys_reg(3, 5, 5, 1, 1)
95 #define esr_EL12 sys_reg(3, 5, 5, 2, 0)
96 #define far_EL12 sys_reg(3, 5, 6, 0, 0)
97 #define mair_EL12 sys_reg(3, 5, 10, 2, 0)
98 #define amair_EL12 sys_reg(3, 5, 10, 3, 0)
99 #define vbar_EL12 sys_reg(3, 5, 12, 0, 0)
100 #define contextidr_EL12 sys_reg(3, 5, 13, 0, 1)
101 #define cntkctl_EL12 sys_reg(3, 5, 14, 1, 0)
102 #define cntp_tval_EL02 sys_reg(3, 5, 14, 2, 0)
103 #define cntp_ctl_EL02 sys_reg(3, 5, 14, 2, 1)
104 #define cntp_cval_EL02 sys_reg(3, 5, 14, 2, 2)
105 #define cntv_tval_EL02 sys_reg(3, 5, 14, 3, 0)
106 #define cntv_ctl_EL02 sys_reg(3, 5, 14, 3, 1)
107 #define cntv_cval_EL02 sys_reg(3, 5, 14, 3, 2)
108 #define spsr_EL12 sys_reg(3, 5, 4, 0, 0)
109 #define elr_EL12 sys_reg(3, 5, 4, 0, 1)
112 * hyp_alternate_select - Generates patchable code sequences that are
113 * used to switch between two implementations of a function, depending
114 * on the availability of a feature.
116 * @fname: a symbol name that will be defined as a function returning a
117 * function pointer whose type will match @orig and @alt
118 * @orig: A pointer to the default function, as returned by @fname when
120 * @alt: A pointer to the alternate function, as returned by @fname
122 * @cond: a CPU feature (as described in asm/cpufeature.h)
124 #define hyp_alternate_select(fname, orig, alt, cond) \
125 typeof(orig) * __hyp_text fname(void) \
127 typeof(alt) *val = orig; \
128 asm volatile(ALTERNATIVE("nop \n", \
131 : "+r" (val) : "r" (alt)); \
135 void __vgic_v2_save_state(struct kvm_vcpu *vcpu);
136 void __vgic_v2_restore_state(struct kvm_vcpu *vcpu);
138 void __vgic_v3_save_state(struct kvm_vcpu *vcpu);
139 void __vgic_v3_restore_state(struct kvm_vcpu *vcpu);
141 void __timer_save_state(struct kvm_vcpu *vcpu);
142 void __timer_restore_state(struct kvm_vcpu *vcpu);
144 void __sysreg_save_host_state(struct kvm_cpu_context *ctxt);
145 void __sysreg_restore_host_state(struct kvm_cpu_context *ctxt);
146 void __sysreg_save_guest_state(struct kvm_cpu_context *ctxt);
147 void __sysreg_restore_guest_state(struct kvm_cpu_context *ctxt);
148 void __sysreg32_save_state(struct kvm_vcpu *vcpu);
149 void __sysreg32_restore_state(struct kvm_vcpu *vcpu);
151 void __debug_save_state(struct kvm_vcpu *vcpu,
152 struct kvm_guest_debug_arch *dbg,
153 struct kvm_cpu_context *ctxt);
154 void __debug_restore_state(struct kvm_vcpu *vcpu,
155 struct kvm_guest_debug_arch *dbg,
156 struct kvm_cpu_context *ctxt);
157 void __debug_cond_save_host_state(struct kvm_vcpu *vcpu);
158 void __debug_cond_restore_host_state(struct kvm_vcpu *vcpu);
160 void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
161 void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
162 bool __fpsimd_enabled(void);
164 u64 __guest_enter(struct kvm_vcpu *vcpu, struct kvm_cpu_context *host_ctxt);
165 void __noreturn __hyp_do_panic(unsigned long, ...);
167 #endif /* __ARM64_KVM_HYP_H__ */