2 * Low-level exception handling code
4 * Copyright (C) 2012 ARM Ltd.
5 * Authors: Catalin Marinas <catalin.marinas@arm.com>
6 * Will Deacon <will.deacon@arm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/init.h>
22 #include <linux/linkage.h>
24 #include <asm/alternative.h>
25 #include <asm/assembler.h>
26 #include <asm/asm-offsets.h>
27 #include <asm/cpufeature.h>
28 #include <asm/errno.h>
31 #include <asm/thread_info.h>
32 #include <asm/unistd.h>
35 * Context tracking subsystem. Used to instrument transitions
36 * between user and kernel mode.
38 .macro ct_user_exit, syscall = 0
39 #ifdef CONFIG_CONTEXT_TRACKING
40 bl context_tracking_user_exit
43 * Save/restore needed during syscalls. Restore syscall arguments from
44 * the values already saved on stack during kernel_entry.
47 ldp x2, x3, [sp, #S_X2]
48 ldp x4, x5, [sp, #S_X4]
49 ldp x6, x7, [sp, #S_X6]
55 #ifdef CONFIG_CONTEXT_TRACKING
56 bl context_tracking_user_enter
69 .macro kernel_entry, el, regsize = 64
70 sub sp, sp, #S_FRAME_SIZE
72 mov w0, w0 // zero upper 32 bits of x0
74 stp x0, x1, [sp, #16 * 0]
75 stp x2, x3, [sp, #16 * 1]
76 stp x4, x5, [sp, #16 * 2]
77 stp x6, x7, [sp, #16 * 3]
78 stp x8, x9, [sp, #16 * 4]
79 stp x10, x11, [sp, #16 * 5]
80 stp x12, x13, [sp, #16 * 6]
81 stp x14, x15, [sp, #16 * 7]
82 stp x16, x17, [sp, #16 * 8]
83 stp x18, x19, [sp, #16 * 9]
84 stp x20, x21, [sp, #16 * 10]
85 stp x22, x23, [sp, #16 * 11]
86 stp x24, x25, [sp, #16 * 12]
87 stp x26, x27, [sp, #16 * 13]
88 stp x28, x29, [sp, #16 * 14]
93 and tsk, tsk, #~(THREAD_SIZE - 1) // Ensure MDSCR_EL1.SS is clear,
94 ldr x19, [tsk, #TI_FLAGS] // since we can unmask debug
95 disable_step_tsk x19, x20 // exceptions when scheduling.
97 mov x29, xzr // fp pointed to user-space
99 add x21, sp, #S_FRAME_SIZE
103 stp lr, x21, [sp, #S_LR]
104 stp x22, x23, [sp, #S_PC]
107 * Set syscallno to -1 by default (overridden later if real syscall).
111 str x21, [sp, #S_SYSCALLNO]
115 * Set sp_el0 to current thread_info.
122 * Registers that may be useful after this macro is invoked:
126 * x23 - aborted PSTATE
130 .macro kernel_exit, el
131 ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
134 ldr x23, [sp, #S_SP] // load return stack pointer
136 #ifdef CONFIG_ARM64_ERRATUM_845719
137 alternative_if_not ARM64_WORKAROUND_845719
140 #ifdef CONFIG_PID_IN_CONTEXTIDR
145 #ifdef CONFIG_PID_IN_CONTEXTIDR
146 mrs x29, contextidr_el1
147 msr contextidr_el1, x29
149 msr contextidr_el1, xzr
155 msr elr_el1, x21 // set up the return data
157 ldp x0, x1, [sp, #16 * 0]
158 ldp x2, x3, [sp, #16 * 1]
159 ldp x4, x5, [sp, #16 * 2]
160 ldp x6, x7, [sp, #16 * 3]
161 ldp x8, x9, [sp, #16 * 4]
162 ldp x10, x11, [sp, #16 * 5]
163 ldp x12, x13, [sp, #16 * 6]
164 ldp x14, x15, [sp, #16 * 7]
165 ldp x16, x17, [sp, #16 * 8]
166 ldp x18, x19, [sp, #16 * 9]
167 ldp x20, x21, [sp, #16 * 10]
168 ldp x22, x23, [sp, #16 * 11]
169 ldp x24, x25, [sp, #16 * 12]
170 ldp x26, x27, [sp, #16 * 13]
171 ldp x28, x29, [sp, #16 * 14]
173 add sp, sp, #S_FRAME_SIZE // restore sp
174 eret // return to kernel
177 .macro get_thread_info, rd
181 .macro irq_stack_entry
182 mov x19, sp // preserve the original sp
185 * Compare sp with the current thread_info, if the top
186 * ~(THREAD_SIZE - 1) bits match, we are on a task stack, and
187 * should switch to the irq stack.
189 and x25, x19, #~(THREAD_SIZE - 1)
193 this_cpu_ptr irq_stack, x25, x26
194 mov x26, #IRQ_STACK_START_SP
197 /* switch to the irq stack */
201 * Add a dummy stack frame, this non-standard format is fixed up
204 stp x29, x19, [sp, #-16]!
211 * x19 should be preserved between irq_stack_entry and
214 .macro irq_stack_exit
219 * These are the registers used in the syscall handler, and allow us to
220 * have in theory up to 7 arguments to a function - x0 to x6.
222 * x7 is reserved for the system call number in 32-bit mode.
224 sc_nr .req x25 // number of system calls
225 scno .req x26 // syscall number
226 stbl .req x27 // syscall table pointer
227 tsk .req x28 // current thread_info
230 * Interrupt handling.
233 ldr_l x1, handle_arch_irq
248 ventry el1_sync_invalid // Synchronous EL1t
249 ventry el1_irq_invalid // IRQ EL1t
250 ventry el1_fiq_invalid // FIQ EL1t
251 ventry el1_error_invalid // Error EL1t
253 ventry el1_sync // Synchronous EL1h
254 ventry el1_irq // IRQ EL1h
255 ventry el1_fiq_invalid // FIQ EL1h
256 ventry el1_error_invalid // Error EL1h
258 ventry el0_sync // Synchronous 64-bit EL0
259 ventry el0_irq // IRQ 64-bit EL0
260 ventry el0_fiq_invalid // FIQ 64-bit EL0
261 ventry el0_error_invalid // Error 64-bit EL0
264 ventry el0_sync_compat // Synchronous 32-bit EL0
265 ventry el0_irq_compat // IRQ 32-bit EL0
266 ventry el0_fiq_invalid_compat // FIQ 32-bit EL0
267 ventry el0_error_invalid_compat // Error 32-bit EL0
269 ventry el0_sync_invalid // Synchronous 32-bit EL0
270 ventry el0_irq_invalid // IRQ 32-bit EL0
271 ventry el0_fiq_invalid // FIQ 32-bit EL0
272 ventry el0_error_invalid // Error 32-bit EL0
277 * Invalid mode handlers
279 .macro inv_entry, el, reason, regsize = 64
280 kernel_entry el, \regsize
288 inv_entry 0, BAD_SYNC
289 ENDPROC(el0_sync_invalid)
293 ENDPROC(el0_irq_invalid)
297 ENDPROC(el0_fiq_invalid)
300 inv_entry 0, BAD_ERROR
301 ENDPROC(el0_error_invalid)
304 el0_fiq_invalid_compat:
305 inv_entry 0, BAD_FIQ, 32
306 ENDPROC(el0_fiq_invalid_compat)
308 el0_error_invalid_compat:
309 inv_entry 0, BAD_ERROR, 32
310 ENDPROC(el0_error_invalid_compat)
314 inv_entry 1, BAD_SYNC
315 ENDPROC(el1_sync_invalid)
319 ENDPROC(el1_irq_invalid)
323 ENDPROC(el1_fiq_invalid)
326 inv_entry 1, BAD_ERROR
327 ENDPROC(el1_error_invalid)
335 mrs x1, esr_el1 // read the syndrome register
336 lsr x24, x1, #ESR_ELx_EC_SHIFT // exception class
337 cmp x24, #ESR_ELx_EC_DABT_CUR // data abort in EL1
339 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
341 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
343 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
345 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL1
347 cmp x24, #ESR_ELx_EC_BREAKPT_CUR // debug exception in EL1
352 * Data abort handling
356 // re-enable interrupts if they were enabled in the aborted context
357 tbnz x23, #7, 1f // PSR_I_BIT
360 mov x2, sp // struct pt_regs
363 // disable interrupts before pulling preserved data off the stack
368 * Stack or PC alignment exception handling
376 * Undefined instruction
383 * Debug exception handling
385 cmp x24, #ESR_ELx_EC_BRK64 // if BRK64
386 cinc x24, x24, eq // set bit '0'
387 tbz x24, #0, el1_inv // EL1 only
389 mov x2, sp // struct pt_regs
390 bl do_debug_exception
393 // TODO: add support for undefined instructions in kernel mode
405 #ifdef CONFIG_TRACE_IRQFLAGS
406 bl trace_hardirqs_off
412 #ifdef CONFIG_PREEMPT
413 ldr w24, [tsk, #TI_PREEMPT] // get preempt count
414 cbnz w24, 1f // preempt count != 0
415 ldr x0, [tsk, #TI_FLAGS] // get flags
416 tbz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling?
420 #ifdef CONFIG_TRACE_IRQFLAGS
426 #ifdef CONFIG_PREEMPT
429 1: bl preempt_schedule_irq // irq en/disable is done inside
430 ldr x0, [tsk, #TI_FLAGS] // get new tasks TI_FLAGS
431 tbnz x0, #TIF_NEED_RESCHED, 1b // needs rescheduling?
441 mrs x25, esr_el1 // read the syndrome register
442 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
443 cmp x24, #ESR_ELx_EC_SVC64 // SVC in 64-bit state
445 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
447 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
449 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
451 cmp x24, #ESR_ELx_EC_FP_EXC64 // FP/ASIMD exception
453 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
455 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
457 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
459 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
461 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
469 mrs x25, esr_el1 // read the syndrome register
470 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
471 cmp x24, #ESR_ELx_EC_SVC32 // SVC in 32-bit state
473 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
475 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
477 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
479 cmp x24, #ESR_ELx_EC_FP_EXC32 // FP/ASIMD exception
481 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
483 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
485 cmp x24, #ESR_ELx_EC_CP15_32 // CP15 MRC/MCR trap
487 cmp x24, #ESR_ELx_EC_CP15_64 // CP15 MRRC/MCRR trap
489 cmp x24, #ESR_ELx_EC_CP14_MR // CP14 MRC/MCR trap
491 cmp x24, #ESR_ELx_EC_CP14_LS // CP14 LDC/STC trap
493 cmp x24, #ESR_ELx_EC_CP14_64 // CP14 MRRC/MCRR trap
495 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
500 * AArch32 syscall handling
502 adrp stbl, compat_sys_call_table // load compat syscall table pointer
503 uxtw scno, w7 // syscall number in w7 (r7)
504 mov sc_nr, #__NR_compat_syscalls
515 * Data abort handling
518 // enable interrupts before calling the main handler
521 bic x0, x26, #(0xff << 56)
528 * Instruction abort handling
531 // enable interrupts before calling the main handler
535 orr x1, x25, #1 << 24 // use reserved ISS bit for instruction aborts
541 * Floating Point or Advanced SIMD access
551 * Floating Point or Advanced SIMD exception
561 * Stack or PC alignment exception handling
564 // enable interrupts before calling the main handler
574 * Undefined instruction
576 // enable interrupts before calling the main handler
584 * Debug exception handling
586 tbnz x24, #0, el0_inv // EL0 only
590 bl do_debug_exception
609 #ifdef CONFIG_TRACE_IRQFLAGS
610 bl trace_hardirqs_off
616 #ifdef CONFIG_TRACE_IRQFLAGS
623 * Register switch for AArch64. The callee-saved registers need to be saved
624 * and restored. On entry:
625 * x0 = previous task_struct (must be preserved across the switch)
626 * x1 = next task_struct
627 * Previous and next are guaranteed not to be the same.
631 mov x10, #THREAD_CPU_CONTEXT
634 stp x19, x20, [x8], #16 // store callee-saved registers
635 stp x21, x22, [x8], #16
636 stp x23, x24, [x8], #16
637 stp x25, x26, [x8], #16
638 stp x27, x28, [x8], #16
639 stp x29, x9, [x8], #16
642 ldp x19, x20, [x8], #16 // restore callee-saved registers
643 ldp x21, x22, [x8], #16
644 ldp x23, x24, [x8], #16
645 ldp x25, x26, [x8], #16
646 ldp x27, x28, [x8], #16
647 ldp x29, x9, [x8], #16
650 and x9, x9, #~(THREAD_SIZE - 1)
653 ENDPROC(cpu_switch_to)
656 * This is the fast syscall return path. We do as little as possible here,
657 * and this includes saving x0 back into the kernel stack.
660 disable_irq // disable interrupts
661 str x0, [sp, #S_X0] // returned x0
662 ldr x1, [tsk, #TI_FLAGS] // re-check for syscall tracing
663 and x2, x1, #_TIF_SYSCALL_WORK
664 cbnz x2, ret_fast_syscall_trace
665 and x2, x1, #_TIF_WORK_MASK
666 cbnz x2, work_pending
667 enable_step_tsk x1, x2
669 ret_fast_syscall_trace:
670 enable_irq // enable interrupts
671 b __sys_trace_return_skipped // we already saved x0
674 * Ok, we need to do extra processing, enter the slow path.
677 tbnz x1, #TIF_NEED_RESCHED, work_resched
678 /* TIF_SIGPENDING, TIF_NOTIFY_RESUME or TIF_FOREIGN_FPSTATE case */
680 enable_irq // enable interrupts for do_notify_resume()
684 #ifdef CONFIG_TRACE_IRQFLAGS
685 bl trace_hardirqs_off // the IRQs are off here, inform the tracing code
690 * "slow" syscall return path.
693 disable_irq // disable interrupts
694 ldr x1, [tsk, #TI_FLAGS]
695 and x2, x1, #_TIF_WORK_MASK
696 cbnz x2, work_pending
697 enable_step_tsk x1, x2
702 * This is how we return from a fork.
706 cbz x19, 1f // not a kernel thread
709 1: get_thread_info tsk
711 ENDPROC(ret_from_fork)
718 adrp stbl, sys_call_table // load syscall table pointer
719 uxtw scno, w8 // syscall number in w8
720 mov sc_nr, #__NR_syscalls
721 el0_svc_naked: // compat entry point
722 stp x0, scno, [sp, #S_ORIG_X0] // save the original x0 and syscall number
726 ldr x16, [tsk, #TI_FLAGS] // check for syscall hooks
727 tst x16, #_TIF_SYSCALL_WORK
729 cmp scno, sc_nr // check upper syscall limit
731 ldr x16, [stbl, scno, lsl #3] // address in the syscall table
732 blr x16 // call sys_* routine
741 * This is the really slow path. We're going to be doing context
742 * switches, and waiting for our parent to respond.
745 mov w0, #-1 // set default errno for
746 cmp scno, x0 // user-issued syscall(-1)
751 bl syscall_trace_enter
752 cmp w0, #-1 // skip the syscall?
753 b.eq __sys_trace_return_skipped
754 uxtw scno, w0 // syscall number (possibly new)
755 mov x1, sp // pointer to regs
756 cmp scno, sc_nr // check upper syscall limit
758 ldp x0, x1, [sp] // restore the syscall args
759 ldp x2, x3, [sp, #S_X2]
760 ldp x4, x5, [sp, #S_X4]
761 ldp x6, x7, [sp, #S_X6]
762 ldr x16, [stbl, scno, lsl #3] // address in the syscall table
763 blr x16 // call sys_* routine
766 str x0, [sp, #S_X0] // save returned x0
767 __sys_trace_return_skipped:
769 bl syscall_trace_exit
778 * Special system call wrappers.
780 ENTRY(sys_rt_sigreturn_wrapper)
783 ENDPROC(sys_rt_sigreturn_wrapper)