2 * Based on arch/arm/kernel/ptrace.c
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 * Copyright (C) 2012 ARM Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/audit.h>
23 #include <linux/compat.h>
24 #include <linux/kernel.h>
25 #include <linux/sched/signal.h>
26 #include <linux/sched/task_stack.h>
28 #include <linux/smp.h>
29 #include <linux/ptrace.h>
30 #include <linux/user.h>
31 #include <linux/seccomp.h>
32 #include <linux/security.h>
33 #include <linux/init.h>
34 #include <linux/signal.h>
35 #include <linux/uaccess.h>
36 #include <linux/perf_event.h>
37 #include <linux/hw_breakpoint.h>
38 #include <linux/regset.h>
39 #include <linux/tracehook.h>
40 #include <linux/elf.h>
42 #include <asm/compat.h>
43 #include <asm/debug-monitors.h>
44 #include <asm/pgtable.h>
45 #include <asm/syscall.h>
46 #include <asm/traps.h>
47 #include <asm/system_misc.h>
49 #define CREATE_TRACE_POINTS
50 #include <trace/events/syscalls.h>
52 struct pt_regs_offset {
57 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
58 #define REG_OFFSET_END {.name = NULL, .offset = 0}
59 #define GPR_OFFSET_NAME(r) \
60 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
62 static const struct pt_regs_offset regoffset_table[] = {
94 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
97 REG_OFFSET_NAME(pstate),
102 * regs_query_register_offset() - query register offset from its name
103 * @name: the name of a register
105 * regs_query_register_offset() returns the offset of a register in struct
106 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
108 int regs_query_register_offset(const char *name)
110 const struct pt_regs_offset *roff;
112 for (roff = regoffset_table; roff->name != NULL; roff++)
113 if (!strcmp(roff->name, name))
119 * regs_within_kernel_stack() - check the address in the stack
120 * @regs: pt_regs which contains kernel stack pointer.
121 * @addr: address which is checked.
123 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
124 * If @addr is within the kernel stack, it returns true. If not, returns false.
126 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
128 return ((addr & ~(THREAD_SIZE - 1)) ==
129 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
130 on_irq_stack(addr, raw_smp_processor_id());
134 * regs_get_kernel_stack_nth() - get Nth entry of the stack
135 * @regs: pt_regs which contains kernel stack pointer.
136 * @n: stack entry number.
138 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
139 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
142 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
144 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
147 if (regs_within_kernel_stack(regs, (unsigned long)addr))
154 * TODO: does not yet catch signals sent when the child dies.
155 * in exit.c or in signal.c.
159 * Called by kernel/ptrace.c when detaching..
161 void ptrace_disable(struct task_struct *child)
164 * This would be better off in core code, but PTRACE_DETACH has
165 * grown its fair share of arch-specific worts and changing it
166 * is likely to cause regressions on obscure architectures.
168 user_disable_single_step(child);
171 #ifdef CONFIG_HAVE_HW_BREAKPOINT
173 * Handle hitting a HW-breakpoint.
175 static void ptrace_hbptriggered(struct perf_event *bp,
176 struct perf_sample_data *data,
177 struct pt_regs *regs)
179 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
183 .si_code = TRAP_HWBKPT,
184 .si_addr = (void __user *)(bkpt->trigger),
190 if (!is_compat_task())
193 for (i = 0; i < ARM_MAX_BRP; ++i) {
194 if (current->thread.debug.hbp_break[i] == bp) {
195 info.si_errno = (i << 1) + 1;
200 for (i = 0; i < ARM_MAX_WRP; ++i) {
201 if (current->thread.debug.hbp_watch[i] == bp) {
202 info.si_errno = -((i << 1) + 1);
209 force_sig_info(SIGTRAP, &info, current);
213 * Unregister breakpoints from this task and reset the pointers in
216 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
219 struct thread_struct *t = &tsk->thread;
221 for (i = 0; i < ARM_MAX_BRP; i++) {
222 if (t->debug.hbp_break[i]) {
223 unregister_hw_breakpoint(t->debug.hbp_break[i]);
224 t->debug.hbp_break[i] = NULL;
228 for (i = 0; i < ARM_MAX_WRP; i++) {
229 if (t->debug.hbp_watch[i]) {
230 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
231 t->debug.hbp_watch[i] = NULL;
236 void ptrace_hw_copy_thread(struct task_struct *tsk)
238 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
241 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
242 struct task_struct *tsk,
245 struct perf_event *bp = ERR_PTR(-EINVAL);
248 case NT_ARM_HW_BREAK:
249 if (idx < ARM_MAX_BRP)
250 bp = tsk->thread.debug.hbp_break[idx];
252 case NT_ARM_HW_WATCH:
253 if (idx < ARM_MAX_WRP)
254 bp = tsk->thread.debug.hbp_watch[idx];
261 static int ptrace_hbp_set_event(unsigned int note_type,
262 struct task_struct *tsk,
264 struct perf_event *bp)
269 case NT_ARM_HW_BREAK:
270 if (idx < ARM_MAX_BRP) {
271 tsk->thread.debug.hbp_break[idx] = bp;
275 case NT_ARM_HW_WATCH:
276 if (idx < ARM_MAX_WRP) {
277 tsk->thread.debug.hbp_watch[idx] = bp;
286 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
287 struct task_struct *tsk,
290 struct perf_event *bp;
291 struct perf_event_attr attr;
295 case NT_ARM_HW_BREAK:
296 type = HW_BREAKPOINT_X;
298 case NT_ARM_HW_WATCH:
299 type = HW_BREAKPOINT_RW;
302 return ERR_PTR(-EINVAL);
305 ptrace_breakpoint_init(&attr);
308 * Initialise fields to sane defaults
309 * (i.e. values that will pass validation).
312 attr.bp_len = HW_BREAKPOINT_LEN_4;
316 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
320 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
327 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
328 struct arch_hw_breakpoint_ctrl ctrl,
329 struct perf_event_attr *attr)
331 int err, len, type, offset, disabled = !ctrl.enabled;
333 attr->disabled = disabled;
337 err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
342 case NT_ARM_HW_BREAK:
343 if ((type & HW_BREAKPOINT_X) != type)
346 case NT_ARM_HW_WATCH:
347 if ((type & HW_BREAKPOINT_RW) != type)
355 attr->bp_type = type;
356 attr->bp_addr += offset;
361 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
367 case NT_ARM_HW_BREAK:
368 num = hw_breakpoint_slots(TYPE_INST);
370 case NT_ARM_HW_WATCH:
371 num = hw_breakpoint_slots(TYPE_DATA);
377 reg |= debug_monitors_arch();
385 static int ptrace_hbp_get_ctrl(unsigned int note_type,
386 struct task_struct *tsk,
390 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
395 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
399 static int ptrace_hbp_get_addr(unsigned int note_type,
400 struct task_struct *tsk,
404 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
409 *addr = bp ? counter_arch_bp(bp)->address : 0;
413 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
414 struct task_struct *tsk,
417 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
420 bp = ptrace_hbp_create(note_type, tsk, idx);
425 static int ptrace_hbp_set_ctrl(unsigned int note_type,
426 struct task_struct *tsk,
431 struct perf_event *bp;
432 struct perf_event_attr attr;
433 struct arch_hw_breakpoint_ctrl ctrl;
435 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
442 decode_ctrl_reg(uctrl, &ctrl);
443 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
447 return modify_user_hw_breakpoint(bp, &attr);
450 static int ptrace_hbp_set_addr(unsigned int note_type,
451 struct task_struct *tsk,
456 struct perf_event *bp;
457 struct perf_event_attr attr;
459 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
467 err = modify_user_hw_breakpoint(bp, &attr);
471 #define PTRACE_HBP_ADDR_SZ sizeof(u64)
472 #define PTRACE_HBP_CTRL_SZ sizeof(u32)
473 #define PTRACE_HBP_PAD_SZ sizeof(u32)
475 static int hw_break_get(struct task_struct *target,
476 const struct user_regset *regset,
477 unsigned int pos, unsigned int count,
478 void *kbuf, void __user *ubuf)
480 unsigned int note_type = regset->core_note_type;
481 int ret, idx = 0, offset, limit;
486 ret = ptrace_hbp_get_resource_info(note_type, &info);
490 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
496 offset = offsetof(struct user_hwdebug_state, pad);
497 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
498 offset + PTRACE_HBP_PAD_SZ);
502 /* (address, ctrl) registers */
503 offset = offsetof(struct user_hwdebug_state, dbg_regs);
504 limit = regset->n * regset->size;
505 while (count && offset < limit) {
506 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
509 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
510 offset, offset + PTRACE_HBP_ADDR_SZ);
513 offset += PTRACE_HBP_ADDR_SZ;
515 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
518 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
519 offset, offset + PTRACE_HBP_CTRL_SZ);
522 offset += PTRACE_HBP_CTRL_SZ;
524 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
526 offset + PTRACE_HBP_PAD_SZ);
529 offset += PTRACE_HBP_PAD_SZ;
536 static int hw_break_set(struct task_struct *target,
537 const struct user_regset *regset,
538 unsigned int pos, unsigned int count,
539 const void *kbuf, const void __user *ubuf)
541 unsigned int note_type = regset->core_note_type;
542 int ret, idx = 0, offset, limit;
546 /* Resource info and pad */
547 offset = offsetof(struct user_hwdebug_state, dbg_regs);
548 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
552 /* (address, ctrl) registers */
553 limit = regset->n * regset->size;
554 while (count && offset < limit) {
555 if (count < PTRACE_HBP_ADDR_SZ)
557 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
558 offset, offset + PTRACE_HBP_ADDR_SZ);
561 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
564 offset += PTRACE_HBP_ADDR_SZ;
568 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
569 offset, offset + PTRACE_HBP_CTRL_SZ);
572 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
575 offset += PTRACE_HBP_CTRL_SZ;
577 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
579 offset + PTRACE_HBP_PAD_SZ);
582 offset += PTRACE_HBP_PAD_SZ;
588 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
590 static int gpr_get(struct task_struct *target,
591 const struct user_regset *regset,
592 unsigned int pos, unsigned int count,
593 void *kbuf, void __user *ubuf)
595 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
596 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
599 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
600 unsigned int pos, unsigned int count,
601 const void *kbuf, const void __user *ubuf)
604 struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
606 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
610 if (!valid_user_regs(&newregs, target))
613 task_pt_regs(target)->user_regs = newregs;
618 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
620 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
621 unsigned int pos, unsigned int count,
622 void *kbuf, void __user *ubuf)
624 struct user_fpsimd_state *uregs;
625 uregs = &target->thread.fpsimd_state.user_fpsimd;
626 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
629 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
630 unsigned int pos, unsigned int count,
631 const void *kbuf, const void __user *ubuf)
634 struct user_fpsimd_state newstate =
635 target->thread.fpsimd_state.user_fpsimd;
637 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
641 target->thread.fpsimd_state.user_fpsimd = newstate;
642 fpsimd_flush_task_state(target);
646 static int tls_get(struct task_struct *target, const struct user_regset *regset,
647 unsigned int pos, unsigned int count,
648 void *kbuf, void __user *ubuf)
650 unsigned long *tls = &target->thread.tp_value;
651 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
654 static int tls_set(struct task_struct *target, const struct user_regset *regset,
655 unsigned int pos, unsigned int count,
656 const void *kbuf, const void __user *ubuf)
659 unsigned long tls = target->thread.tp_value;
661 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
665 target->thread.tp_value = tls;
669 static int system_call_get(struct task_struct *target,
670 const struct user_regset *regset,
671 unsigned int pos, unsigned int count,
672 void *kbuf, void __user *ubuf)
674 int syscallno = task_pt_regs(target)->syscallno;
676 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
680 static int system_call_set(struct task_struct *target,
681 const struct user_regset *regset,
682 unsigned int pos, unsigned int count,
683 const void *kbuf, const void __user *ubuf)
685 int syscallno = task_pt_regs(target)->syscallno;
688 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
692 task_pt_regs(target)->syscallno = syscallno;
696 enum aarch64_regset {
700 #ifdef CONFIG_HAVE_HW_BREAKPOINT
707 static const struct user_regset aarch64_regsets[] = {
709 .core_note_type = NT_PRSTATUS,
710 .n = sizeof(struct user_pt_regs) / sizeof(u64),
712 .align = sizeof(u64),
717 .core_note_type = NT_PRFPREG,
718 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
720 * We pretend we have 32-bit registers because the fpsr and
721 * fpcr are 32-bits wide.
724 .align = sizeof(u32),
729 .core_note_type = NT_ARM_TLS,
731 .size = sizeof(void *),
732 .align = sizeof(void *),
736 #ifdef CONFIG_HAVE_HW_BREAKPOINT
737 [REGSET_HW_BREAK] = {
738 .core_note_type = NT_ARM_HW_BREAK,
739 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
741 .align = sizeof(u32),
745 [REGSET_HW_WATCH] = {
746 .core_note_type = NT_ARM_HW_WATCH,
747 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
749 .align = sizeof(u32),
754 [REGSET_SYSTEM_CALL] = {
755 .core_note_type = NT_ARM_SYSTEM_CALL,
758 .align = sizeof(int),
759 .get = system_call_get,
760 .set = system_call_set,
764 static const struct user_regset_view user_aarch64_view = {
765 .name = "aarch64", .e_machine = EM_AARCH64,
766 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
770 #include <linux/compat.h>
777 static int compat_gpr_get(struct task_struct *target,
778 const struct user_regset *regset,
779 unsigned int pos, unsigned int count,
780 void *kbuf, void __user *ubuf)
783 unsigned int i, start, num_regs;
785 /* Calculate the number of AArch32 registers contained in count */
786 num_regs = count / regset->size;
788 /* Convert pos into an register number */
789 start = pos / regset->size;
791 if (start + num_regs > regset->n)
794 for (i = 0; i < num_regs; ++i) {
795 unsigned int idx = start + i;
800 reg = task_pt_regs(target)->pc;
803 reg = task_pt_regs(target)->pstate;
806 reg = task_pt_regs(target)->orig_x0;
809 reg = task_pt_regs(target)->regs[idx];
813 memcpy(kbuf, ®, sizeof(reg));
816 ret = copy_to_user(ubuf, ®, sizeof(reg));
829 static int compat_gpr_set(struct task_struct *target,
830 const struct user_regset *regset,
831 unsigned int pos, unsigned int count,
832 const void *kbuf, const void __user *ubuf)
834 struct pt_regs newregs;
836 unsigned int i, start, num_regs;
838 /* Calculate the number of AArch32 registers contained in count */
839 num_regs = count / regset->size;
841 /* Convert pos into an register number */
842 start = pos / regset->size;
844 if (start + num_regs > regset->n)
847 newregs = *task_pt_regs(target);
849 for (i = 0; i < num_regs; ++i) {
850 unsigned int idx = start + i;
854 memcpy(®, kbuf, sizeof(reg));
857 ret = copy_from_user(®, ubuf, sizeof(reg));
871 newregs.pstate = reg;
874 newregs.orig_x0 = reg;
877 newregs.regs[idx] = reg;
882 if (valid_user_regs(&newregs.user_regs, target))
883 *task_pt_regs(target) = newregs;
890 static int compat_vfp_get(struct task_struct *target,
891 const struct user_regset *regset,
892 unsigned int pos, unsigned int count,
893 void *kbuf, void __user *ubuf)
895 struct user_fpsimd_state *uregs;
896 compat_ulong_t fpscr;
899 uregs = &target->thread.fpsimd_state.user_fpsimd;
902 * The VFP registers are packed into the fpsimd_state, so they all sit
903 * nicely together for us. We just need to create the fpscr separately.
905 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
906 VFP_STATE_SIZE - sizeof(compat_ulong_t));
909 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
910 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
911 ret = put_user(fpscr, (compat_ulong_t *)ubuf);
917 static int compat_vfp_set(struct task_struct *target,
918 const struct user_regset *regset,
919 unsigned int pos, unsigned int count,
920 const void *kbuf, const void __user *ubuf)
922 struct user_fpsimd_state *uregs;
923 compat_ulong_t fpscr;
926 if (pos + count > VFP_STATE_SIZE)
929 uregs = &target->thread.fpsimd_state.user_fpsimd;
931 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
932 VFP_STATE_SIZE - sizeof(compat_ulong_t));
935 ret = get_user(fpscr, (compat_ulong_t *)ubuf);
936 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
937 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
940 fpsimd_flush_task_state(target);
944 static int compat_tls_get(struct task_struct *target,
945 const struct user_regset *regset, unsigned int pos,
946 unsigned int count, void *kbuf, void __user *ubuf)
948 compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
949 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
952 static int compat_tls_set(struct task_struct *target,
953 const struct user_regset *regset, unsigned int pos,
954 unsigned int count, const void *kbuf,
955 const void __user *ubuf)
958 compat_ulong_t tls = target->thread.tp_value;
960 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
964 target->thread.tp_value = tls;
968 static const struct user_regset aarch32_regsets[] = {
969 [REGSET_COMPAT_GPR] = {
970 .core_note_type = NT_PRSTATUS,
971 .n = COMPAT_ELF_NGREG,
972 .size = sizeof(compat_elf_greg_t),
973 .align = sizeof(compat_elf_greg_t),
974 .get = compat_gpr_get,
975 .set = compat_gpr_set
977 [REGSET_COMPAT_VFP] = {
978 .core_note_type = NT_ARM_VFP,
979 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
980 .size = sizeof(compat_ulong_t),
981 .align = sizeof(compat_ulong_t),
982 .get = compat_vfp_get,
983 .set = compat_vfp_set
987 static const struct user_regset_view user_aarch32_view = {
988 .name = "aarch32", .e_machine = EM_ARM,
989 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
992 static const struct user_regset aarch32_ptrace_regsets[] = {
994 .core_note_type = NT_PRSTATUS,
995 .n = COMPAT_ELF_NGREG,
996 .size = sizeof(compat_elf_greg_t),
997 .align = sizeof(compat_elf_greg_t),
998 .get = compat_gpr_get,
999 .set = compat_gpr_set
1002 .core_note_type = NT_ARM_VFP,
1003 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1004 .size = sizeof(compat_ulong_t),
1005 .align = sizeof(compat_ulong_t),
1006 .get = compat_vfp_get,
1007 .set = compat_vfp_set
1010 .core_note_type = NT_ARM_TLS,
1012 .size = sizeof(compat_ulong_t),
1013 .align = sizeof(compat_ulong_t),
1014 .get = compat_tls_get,
1015 .set = compat_tls_set,
1017 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1018 [REGSET_HW_BREAK] = {
1019 .core_note_type = NT_ARM_HW_BREAK,
1020 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1021 .size = sizeof(u32),
1022 .align = sizeof(u32),
1023 .get = hw_break_get,
1024 .set = hw_break_set,
1026 [REGSET_HW_WATCH] = {
1027 .core_note_type = NT_ARM_HW_WATCH,
1028 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1029 .size = sizeof(u32),
1030 .align = sizeof(u32),
1031 .get = hw_break_get,
1032 .set = hw_break_set,
1035 [REGSET_SYSTEM_CALL] = {
1036 .core_note_type = NT_ARM_SYSTEM_CALL,
1038 .size = sizeof(int),
1039 .align = sizeof(int),
1040 .get = system_call_get,
1041 .set = system_call_set,
1045 static const struct user_regset_view user_aarch32_ptrace_view = {
1046 .name = "aarch32", .e_machine = EM_ARM,
1047 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1050 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1051 compat_ulong_t __user *ret)
1058 if (off == COMPAT_PT_TEXT_ADDR)
1059 tmp = tsk->mm->start_code;
1060 else if (off == COMPAT_PT_DATA_ADDR)
1061 tmp = tsk->mm->start_data;
1062 else if (off == COMPAT_PT_TEXT_END_ADDR)
1063 tmp = tsk->mm->end_code;
1064 else if (off < sizeof(compat_elf_gregset_t))
1065 return copy_regset_to_user(tsk, &user_aarch32_view,
1066 REGSET_COMPAT_GPR, off,
1067 sizeof(compat_ulong_t), ret);
1068 else if (off >= COMPAT_USER_SZ)
1073 return put_user(tmp, ret);
1076 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1080 mm_segment_t old_fs = get_fs();
1082 if (off & 3 || off >= COMPAT_USER_SZ)
1085 if (off >= sizeof(compat_elf_gregset_t))
1089 ret = copy_regset_from_user(tsk, &user_aarch32_view,
1090 REGSET_COMPAT_GPR, off,
1091 sizeof(compat_ulong_t),
1098 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1101 * Convert a virtual register number into an index for a thread_info
1102 * breakpoint array. Breakpoints are identified using positive numbers
1103 * whilst watchpoints are negative. The registers are laid out as pairs
1104 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1105 * Register 0 is reserved for describing resource information.
1107 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1109 return (abs(num) - 1) >> 1;
1112 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1114 u8 num_brps, num_wrps, debug_arch, wp_len;
1117 num_brps = hw_breakpoint_slots(TYPE_INST);
1118 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1120 debug_arch = debug_monitors_arch();
1134 static int compat_ptrace_hbp_get(unsigned int note_type,
1135 struct task_struct *tsk,
1142 int err, idx = compat_ptrace_hbp_num_to_idx(num);;
1145 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1148 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1155 static int compat_ptrace_hbp_set(unsigned int note_type,
1156 struct task_struct *tsk,
1163 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1167 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1170 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1176 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1177 compat_ulong_t __user *data)
1181 mm_segment_t old_fs = get_fs();
1186 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1188 } else if (num == 0) {
1189 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1192 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1197 ret = put_user(kdata, data);
1202 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1203 compat_ulong_t __user *data)
1207 mm_segment_t old_fs = get_fs();
1212 ret = get_user(kdata, data);
1218 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1220 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1225 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1227 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1228 compat_ulong_t caddr, compat_ulong_t cdata)
1230 unsigned long addr = caddr;
1231 unsigned long data = cdata;
1232 void __user *datap = compat_ptr(data);
1236 case PTRACE_PEEKUSR:
1237 ret = compat_ptrace_read_user(child, addr, datap);
1240 case PTRACE_POKEUSR:
1241 ret = compat_ptrace_write_user(child, addr, data);
1244 case COMPAT_PTRACE_GETREGS:
1245 ret = copy_regset_to_user(child,
1248 0, sizeof(compat_elf_gregset_t),
1252 case COMPAT_PTRACE_SETREGS:
1253 ret = copy_regset_from_user(child,
1256 0, sizeof(compat_elf_gregset_t),
1260 case COMPAT_PTRACE_GET_THREAD_AREA:
1261 ret = put_user((compat_ulong_t)child->thread.tp_value,
1262 (compat_ulong_t __user *)datap);
1265 case COMPAT_PTRACE_SET_SYSCALL:
1266 task_pt_regs(child)->syscallno = data;
1270 case COMPAT_PTRACE_GETVFPREGS:
1271 ret = copy_regset_to_user(child,
1278 case COMPAT_PTRACE_SETVFPREGS:
1279 ret = copy_regset_from_user(child,
1286 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1287 case COMPAT_PTRACE_GETHBPREGS:
1288 ret = compat_ptrace_gethbpregs(child, addr, datap);
1291 case COMPAT_PTRACE_SETHBPREGS:
1292 ret = compat_ptrace_sethbpregs(child, addr, datap);
1297 ret = compat_ptrace_request(child, request, addr,
1304 #endif /* CONFIG_COMPAT */
1306 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1308 #ifdef CONFIG_COMPAT
1310 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1311 * user_aarch32_view compatible with arm32. Native ptrace requests on
1312 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1313 * access to the TLS register.
1315 if (is_compat_task())
1316 return &user_aarch32_view;
1317 else if (is_compat_thread(task_thread_info(task)))
1318 return &user_aarch32_ptrace_view;
1320 return &user_aarch64_view;
1323 long arch_ptrace(struct task_struct *child, long request,
1324 unsigned long addr, unsigned long data)
1326 return ptrace_request(child, request, addr, data);
1329 enum ptrace_syscall_dir {
1330 PTRACE_SYSCALL_ENTER = 0,
1331 PTRACE_SYSCALL_EXIT,
1334 static void tracehook_report_syscall(struct pt_regs *regs,
1335 enum ptrace_syscall_dir dir)
1338 unsigned long saved_reg;
1341 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
1342 * used to denote syscall entry/exit:
1344 regno = (is_compat_task() ? 12 : 7);
1345 saved_reg = regs->regs[regno];
1346 regs->regs[regno] = dir;
1348 if (dir == PTRACE_SYSCALL_EXIT)
1349 tracehook_report_syscall_exit(regs, 0);
1350 else if (tracehook_report_syscall_entry(regs))
1351 regs->syscallno = ~0UL;
1353 regs->regs[regno] = saved_reg;
1356 asmlinkage int syscall_trace_enter(struct pt_regs *regs)
1358 if (test_thread_flag(TIF_SYSCALL_TRACE))
1359 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
1361 /* Do the secure computing after ptrace; failures should be fast. */
1362 if (secure_computing(NULL) == -1)
1365 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1366 trace_sys_enter(regs, regs->syscallno);
1368 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1369 regs->regs[2], regs->regs[3]);
1371 return regs->syscallno;
1374 asmlinkage void syscall_trace_exit(struct pt_regs *regs)
1376 audit_syscall_exit(regs);
1378 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1379 trace_sys_exit(regs, regs_return_value(regs));
1381 if (test_thread_flag(TIF_SYSCALL_TRACE))
1382 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1386 * Bits which are always architecturally RES0 per ARM DDI 0487A.h
1387 * Userspace cannot use these until they have an architectural meaning.
1388 * We also reserve IL for the kernel; SS is handled dynamically.
1390 #define SPSR_EL1_AARCH64_RES0_BITS \
1391 (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \
1393 #define SPSR_EL1_AARCH32_RES0_BITS \
1394 (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20))
1396 static int valid_compat_regs(struct user_pt_regs *regs)
1398 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1400 if (!system_supports_mixed_endian_el0()) {
1401 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1402 regs->pstate |= COMPAT_PSR_E_BIT;
1404 regs->pstate &= ~COMPAT_PSR_E_BIT;
1407 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1408 (regs->pstate & COMPAT_PSR_A_BIT) == 0 &&
1409 (regs->pstate & COMPAT_PSR_I_BIT) == 0 &&
1410 (regs->pstate & COMPAT_PSR_F_BIT) == 0) {
1415 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1418 regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT |
1419 COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT |
1420 COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK |
1421 COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT |
1423 regs->pstate |= PSR_MODE32_BIT;
1428 static int valid_native_regs(struct user_pt_regs *regs)
1430 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1432 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1433 (regs->pstate & PSR_D_BIT) == 0 &&
1434 (regs->pstate & PSR_A_BIT) == 0 &&
1435 (regs->pstate & PSR_I_BIT) == 0 &&
1436 (regs->pstate & PSR_F_BIT) == 0) {
1440 /* Force PSR to a valid 64-bit EL0t */
1441 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1447 * Are the current registers suitable for user mode? (used to maintain
1448 * security in signal handlers)
1450 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1452 if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
1453 regs->pstate &= ~DBG_SPSR_SS;
1455 if (is_compat_thread(task_thread_info(task)))
1456 return valid_compat_regs(regs);
1458 return valid_native_regs(regs);