2 * Based on arch/arm/kernel/setup.c
4 * Copyright (C) 1995-2001 Russell King
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/export.h>
21 #include <linux/kernel.h>
22 #include <linux/stddef.h>
23 #include <linux/ioport.h>
24 #include <linux/delay.h>
25 #include <linux/utsname.h>
26 #include <linux/initrd.h>
27 #include <linux/console.h>
28 #include <linux/bootmem.h>
29 #include <linux/seq_file.h>
30 #include <linux/screen_info.h>
31 #include <linux/init.h>
32 #include <linux/kexec.h>
33 #include <linux/crash_dump.h>
34 #include <linux/root_dev.h>
35 #include <linux/clk-provider.h>
36 #include <linux/cpu.h>
37 #include <linux/interrupt.h>
38 #include <linux/smp.h>
40 #include <linux/proc_fs.h>
41 #include <linux/memblock.h>
42 #include <linux/of_fdt.h>
43 #include <linux/of_platform.h>
45 #include <asm/cputype.h>
47 #include <asm/cputable.h>
48 #include <asm/sections.h>
49 #include <asm/setup.h>
50 #include <asm/smp_plat.h>
51 #include <asm/cacheflush.h>
52 #include <asm/tlbflush.h>
53 #include <asm/traps.h>
54 #include <asm/memblock.h>
57 unsigned int processor_id;
58 EXPORT_SYMBOL(processor_id);
60 unsigned int elf_hwcap __read_mostly;
61 EXPORT_SYMBOL_GPL(elf_hwcap);
63 static const char *cpu_name;
64 static const char *machine_name;
65 phys_addr_t __fdt_pointer __initdata;
68 * Standard memory resources
70 static struct resource mem_res[] = {
72 .name = "Kernel code",
75 .flags = IORESOURCE_MEM
78 .name = "Kernel data",
81 .flags = IORESOURCE_MEM
85 #define kernel_code mem_res[0]
86 #define kernel_data mem_res[1]
88 void __init early_print(const char *str, ...)
94 vsnprintf(buf, sizeof(buf), str, ap);
100 static void __init setup_processor(void)
102 struct cpu_info *cpu_info;
105 * locate processor in the list of supported processor
106 * types. The linker builds this table for us from the
107 * entries in arch/arm/mm/proc.S
109 cpu_info = lookup_processor_type(read_cpuid_id());
111 printk("CPU configuration botched (ID %08x), unable to continue.\n",
116 cpu_name = cpu_info->cpu_name;
118 printk("CPU: %s [%08x] revision %d\n",
119 cpu_name, read_cpuid_id(), read_cpuid_id() & 15);
121 sprintf(init_utsname()->machine, "aarch64");
125 static void __init setup_machine_fdt(phys_addr_t dt_phys)
127 struct boot_param_header *devtree;
128 unsigned long dt_root;
130 /* Check we have a non-NULL DT pointer */
133 "Error: NULL or invalid device tree blob\n"
134 "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
135 "\nPlease check your bootloader.\n");
142 devtree = phys_to_virt(dt_phys);
144 /* Check device tree validity */
145 if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) {
147 "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
148 "Expected 0x%x, found 0x%x\n"
149 "\nPlease check your bootloader.\n",
150 dt_phys, devtree, OF_DT_HEADER,
151 be32_to_cpu(devtree->magic));
157 initial_boot_params = devtree;
158 dt_root = of_get_flat_dt_root();
160 machine_name = of_get_flat_dt_prop(dt_root, "model", NULL);
162 machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL);
164 machine_name = "<unknown>";
165 pr_info("Machine: %s\n", machine_name);
167 /* Retrieve various information from the /chosen node */
168 of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
169 /* Initialize {size,address}-cells info */
170 of_scan_flat_dt(early_init_dt_scan_root, NULL);
171 /* Setup memory, calling early_init_dt_add_memory_arch */
172 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
175 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
179 if (base + size < PHYS_OFFSET) {
180 pr_warning("Ignoring memory block 0x%llx - 0x%llx\n",
184 if (base < PHYS_OFFSET) {
185 pr_warning("Ignoring memory range 0x%llx - 0x%llx\n",
187 size -= PHYS_OFFSET - base;
190 memblock_add(base, size);
193 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
195 return __va(memblock_alloc(size, align));
199 * Limit the memory size that was specified via FDT.
201 static int __init early_mem(char *p)
208 limit = memparse(p, &p) & PAGE_MASK;
209 pr_notice("Memory limited to %lldMB\n", limit >> 20);
211 memblock_enforce_memory_limit(limit);
215 early_param("mem", early_mem);
217 static void __init request_standard_resources(void)
219 struct memblock_region *region;
220 struct resource *res;
222 kernel_code.start = virt_to_phys(_text);
223 kernel_code.end = virt_to_phys(_etext - 1);
224 kernel_data.start = virt_to_phys(_sdata);
225 kernel_data.end = virt_to_phys(_end - 1);
227 for_each_memblock(memory, region) {
228 res = alloc_bootmem_low(sizeof(*res));
229 res->name = "System RAM";
230 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
231 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
232 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
234 request_resource(&iomem_resource, res);
236 if (kernel_code.start >= res->start &&
237 kernel_code.end <= res->end)
238 request_resource(res, &kernel_code);
239 if (kernel_data.start >= res->start &&
240 kernel_data.end <= res->end)
241 request_resource(res, &kernel_data);
245 u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
247 void __init setup_arch(char **cmdline_p)
251 setup_machine_fdt(__fdt_pointer);
253 init_mm.start_code = (unsigned long) _text;
254 init_mm.end_code = (unsigned long) _etext;
255 init_mm.end_data = (unsigned long) _edata;
256 init_mm.brk = (unsigned long) _end;
258 *cmdline_p = boot_command_line;
262 arm64_memblock_init();
265 request_standard_resources();
267 unflatten_device_tree();
271 cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
277 #if defined(CONFIG_VGA_CONSOLE)
278 conswitchp = &vga_con;
279 #elif defined(CONFIG_DUMMY_CONSOLE)
280 conswitchp = &dummy_con;
285 static int __init arm64_of_clk_init(void)
290 arch_initcall(arm64_of_clk_init);
292 static DEFINE_PER_CPU(struct cpu, cpu_data);
294 static int __init topology_init(void)
298 for_each_possible_cpu(i) {
299 struct cpu *cpu = &per_cpu(cpu_data, i);
300 cpu->hotpluggable = 1;
301 register_cpu(cpu, i);
306 subsys_initcall(topology_init);
308 static int __init arm64_device_probe(void)
310 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
313 device_initcall(arm64_device_probe);
315 static const char *hwcap_str[] = {
321 static int c_show(struct seq_file *m, void *v)
325 seq_printf(m, "Processor\t: %s rev %d (%s)\n",
326 cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);
328 for_each_online_cpu(i) {
330 * glibc reads /proc/cpuinfo to determine the number of
331 * online processors, looking for lines beginning with
332 * "processor". Give glibc what it expects.
335 seq_printf(m, "processor\t: %d\n", i);
337 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
338 loops_per_jiffy / (500000UL/HZ),
339 loops_per_jiffy / (5000UL/HZ) % 100);
342 /* dump out the processor features */
343 seq_puts(m, "Features\t: ");
345 for (i = 0; hwcap_str[i]; i++)
346 if (elf_hwcap & (1 << i))
347 seq_printf(m, "%s ", hwcap_str[i]);
349 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
350 seq_printf(m, "CPU architecture: AArch64\n");
351 seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
352 seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
353 seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
357 seq_printf(m, "Hardware\t: %s\n", machine_name);
362 static void *c_start(struct seq_file *m, loff_t *pos)
364 return *pos < 1 ? (void *)1 : NULL;
367 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
373 static void c_stop(struct seq_file *m, void *v)
377 const struct seq_operations cpuinfo_op = {