2 * SMP initialisation and IPI support
3 * Based on arch/arm/kernel/smp.c
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/acpi.h>
21 #include <linux/delay.h>
22 #include <linux/init.h>
23 #include <linux/spinlock.h>
24 #include <linux/sched/mm.h>
25 #include <linux/sched/hotplug.h>
26 #include <linux/sched/task_stack.h>
27 #include <linux/interrupt.h>
28 #include <linux/cache.h>
29 #include <linux/profile.h>
30 #include <linux/errno.h>
32 #include <linux/err.h>
33 #include <linux/cpu.h>
34 #include <linux/smp.h>
35 #include <linux/seq_file.h>
36 #include <linux/irq.h>
37 #include <linux/percpu.h>
38 #include <linux/clockchips.h>
39 #include <linux/completion.h>
41 #include <linux/irq_work.h>
42 #include <linux/kexec.h>
44 #include <asm/alternative.h>
45 #include <asm/atomic.h>
46 #include <asm/cacheflush.h>
48 #include <asm/cputype.h>
49 #include <asm/cpu_ops.h>
50 #include <asm/mmu_context.h>
52 #include <asm/pgtable.h>
53 #include <asm/pgalloc.h>
54 #include <asm/processor.h>
55 #include <asm/smp_plat.h>
56 #include <asm/sections.h>
57 #include <asm/tlbflush.h>
58 #include <asm/ptrace.h>
61 #define CREATE_TRACE_POINTS
62 #include <trace/events/ipi.h>
64 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
65 EXPORT_PER_CPU_SYMBOL(cpu_number);
68 * as from 2.5, kernels no longer have an init_tasks structure
69 * so we need some other way of telling a new secondary core
70 * where to place its SVC stack
72 struct secondary_data secondary_data;
73 /* Number of CPUs which aren't online, but looping in kernel text. */
74 int cpus_stuck_in_kernel;
86 #ifdef CONFIG_ARM64_VHE
88 /* Whether the boot CPU is running in HYP mode or not*/
89 static bool boot_cpu_hyp_mode;
91 static inline void save_boot_cpu_run_el(void)
93 boot_cpu_hyp_mode = is_kernel_in_hyp_mode();
96 static inline bool is_boot_cpu_in_hyp_mode(void)
98 return boot_cpu_hyp_mode;
102 * Verify that a secondary CPU is running the kernel at the same
103 * EL as that of the boot CPU.
105 void verify_cpu_run_el(void)
107 bool in_el2 = is_kernel_in_hyp_mode();
108 bool boot_cpu_el2 = is_boot_cpu_in_hyp_mode();
110 if (in_el2 ^ boot_cpu_el2) {
111 pr_crit("CPU%d: mismatched Exception Level(EL%d) with boot CPU(EL%d)\n",
114 boot_cpu_el2 ? 2 : 1);
120 static inline void save_boot_cpu_run_el(void) {}
123 #ifdef CONFIG_HOTPLUG_CPU
124 static int op_cpu_kill(unsigned int cpu);
126 static inline int op_cpu_kill(unsigned int cpu)
134 * Boot a secondary CPU, and assign it the specified idle task.
135 * This also gives us the initial stack to use for this CPU.
137 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
139 if (cpu_ops[cpu]->cpu_boot)
140 return cpu_ops[cpu]->cpu_boot(cpu);
145 static DECLARE_COMPLETION(cpu_running);
147 int __cpu_up(unsigned int cpu, struct task_struct *idle)
153 * We need to tell the secondary core where to find its stack and the
156 secondary_data.task = idle;
157 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
158 update_cpu_boot_status(CPU_MMU_OFF);
159 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
162 * Now bring the CPU into our world.
164 ret = boot_secondary(cpu, idle);
167 * CPU was successfully started, wait for it to come online or
170 wait_for_completion_timeout(&cpu_running,
171 msecs_to_jiffies(1000));
173 if (!cpu_online(cpu)) {
174 pr_crit("CPU%u: failed to come online\n", cpu);
178 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
181 secondary_data.task = NULL;
182 secondary_data.stack = NULL;
183 status = READ_ONCE(secondary_data.status);
186 if (status == CPU_MMU_OFF)
187 status = READ_ONCE(__early_cpu_boot_status);
191 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
195 if (!op_cpu_kill(cpu)) {
196 pr_crit("CPU%u: died during early boot\n", cpu);
200 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
201 case CPU_STUCK_IN_KERNEL:
202 pr_crit("CPU%u: is stuck in kernel\n", cpu);
203 cpus_stuck_in_kernel++;
205 case CPU_PANIC_KERNEL:
206 panic("CPU%u detected unsupported configuration\n", cpu);
214 * This is the secondary CPU boot entry. We're using this CPUs
215 * idle thread stack, but a set of temporary page tables.
217 asmlinkage void secondary_start_kernel(void)
219 struct mm_struct *mm = &init_mm;
222 cpu = task_cpu(current);
223 set_my_cpu_offset(per_cpu_offset(cpu));
226 * All kernel threads share the same mm context; grab a
227 * reference and switch to it.
230 current->active_mm = mm;
233 * TTBR0 is only used for the identity mapping at this stage. Make it
234 * point to zero page to avoid speculatively fetching new entries.
236 cpu_uninstall_idmap();
239 trace_hardirqs_off();
242 * If the system has established the capabilities, make sure
243 * this CPU ticks all of those. If it doesn't, the CPU will
244 * fail to come online.
246 check_local_cpu_capabilities();
248 if (cpu_ops[cpu]->cpu_postboot)
249 cpu_ops[cpu]->cpu_postboot();
252 * Log the CPU info before it is marked online and might get read.
257 * Enable GIC and timers.
259 notify_cpu_starting(cpu);
261 store_cpu_topology(cpu);
264 * OK, now it's safe to let the boot CPU continue. Wait for
265 * the CPU migration code to notice that the CPU is online
266 * before we continue.
268 pr_info("CPU%u: Booted secondary processor [%08x]\n",
269 cpu, read_cpuid_id());
270 update_cpu_boot_status(CPU_BOOT_SUCCESS);
271 set_cpu_online(cpu, true);
272 complete(&cpu_running);
275 local_async_enable();
278 * OK, it's off to the idle thread for us
280 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
283 #ifdef CONFIG_HOTPLUG_CPU
284 static int op_cpu_disable(unsigned int cpu)
287 * If we don't have a cpu_die method, abort before we reach the point
288 * of no return. CPU0 may not have an cpu_ops, so test for it.
290 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
294 * We may need to abort a hot unplug for some other mechanism-specific
297 if (cpu_ops[cpu]->cpu_disable)
298 return cpu_ops[cpu]->cpu_disable(cpu);
304 * __cpu_disable runs on the processor to be shutdown.
306 int __cpu_disable(void)
308 unsigned int cpu = smp_processor_id();
311 ret = op_cpu_disable(cpu);
316 * Take this CPU offline. Once we clear this, we can't return,
317 * and we must not schedule until we're ready to give up the cpu.
319 set_cpu_online(cpu, false);
322 * OK - migrate IRQs away from this CPU
324 irq_migrate_all_off_this_cpu();
329 static int op_cpu_kill(unsigned int cpu)
332 * If we have no means of synchronising with the dying CPU, then assume
333 * that it is really dead. We can only wait for an arbitrary length of
334 * time and hope that it's dead, so let's skip the wait and just hope.
336 if (!cpu_ops[cpu]->cpu_kill)
339 return cpu_ops[cpu]->cpu_kill(cpu);
343 * called on the thread which is asking for a CPU to be shutdown -
344 * waits until shutdown has completed, or it is timed out.
346 void __cpu_die(unsigned int cpu)
350 if (!cpu_wait_death(cpu, 5)) {
351 pr_crit("CPU%u: cpu didn't die\n", cpu);
354 pr_notice("CPU%u: shutdown\n", cpu);
357 * Now that the dying CPU is beyond the point of no return w.r.t.
358 * in-kernel synchronisation, try to get the firwmare to help us to
359 * verify that it has really left the kernel before we consider
360 * clobbering anything it might still be using.
362 err = op_cpu_kill(cpu);
364 pr_warn("CPU%d may not have shut down cleanly: %d\n",
369 * Called from the idle thread for the CPU which has been shutdown.
371 * Note that we disable IRQs here, but do not re-enable them
372 * before returning to the caller. This is also the behaviour
373 * of the other hotplug-cpu capable cores, so presumably coming
374 * out of idle fixes this.
378 unsigned int cpu = smp_processor_id();
384 /* Tell __cpu_die() that this CPU is now safe to dispose of */
385 (void)cpu_report_death();
388 * Actually shutdown the CPU. This must never fail. The specific hotplug
389 * mechanism must perform all required cache maintenance to ensure that
390 * no dirty lines are lost in the process of shutting down the CPU.
392 cpu_ops[cpu]->cpu_die(cpu);
399 * Kill the calling secondary CPU, early in bringup before it is turned
402 void cpu_die_early(void)
404 int cpu = smp_processor_id();
406 pr_crit("CPU%d: will not boot\n", cpu);
408 /* Mark this CPU absent */
409 set_cpu_present(cpu, 0);
411 #ifdef CONFIG_HOTPLUG_CPU
412 update_cpu_boot_status(CPU_KILL_ME);
413 /* Check if we can park ourselves */
414 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
415 cpu_ops[cpu]->cpu_die(cpu);
417 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
422 static void __init hyp_mode_check(void)
424 if (is_hyp_mode_available())
425 pr_info("CPU: All CPU(s) started at EL2\n");
426 else if (is_hyp_mode_mismatched())
427 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
428 "CPU: CPUs started in inconsistent modes");
430 pr_info("CPU: All CPU(s) started at EL1\n");
433 void __init smp_cpus_done(unsigned int max_cpus)
435 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
436 setup_cpu_features();
438 apply_alternatives_all();
439 mark_linear_text_alias_ro();
442 void __init smp_prepare_boot_cpu(void)
444 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
446 * Initialise the static keys early as they may be enabled by the
450 cpuinfo_store_boot_cpu();
451 save_boot_cpu_run_el();
453 * Run the errata work around checks on the boot CPU, once we have
454 * initialised the cpu feature infrastructure from
455 * cpuinfo_store_boot_cpu() above.
457 update_cpu_errata_workarounds();
460 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
466 * A cpu node with missing "reg" property is
467 * considered invalid to build a cpu_logical_map
470 cell = of_get_property(dn, "reg", NULL);
472 pr_err("%s: missing reg property\n", dn->full_name);
476 hwid = of_read_number(cell, of_n_addr_cells(dn));
478 * Non affinity bits must be set to 0 in the DT
480 if (hwid & ~MPIDR_HWID_BITMASK) {
481 pr_err("%s: invalid reg property\n", dn->full_name);
488 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
489 * entries and check for duplicates. If any is found just ignore the
490 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
491 * matching valid MPIDR values.
493 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
497 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
498 if (cpu_logical_map(i) == hwid)
504 * Initialize cpu operations for a logical cpu and
505 * set it in the possible mask on success
507 static int __init smp_cpu_setup(int cpu)
509 if (cpu_read_ops(cpu))
512 if (cpu_ops[cpu]->cpu_init(cpu))
515 set_cpu_possible(cpu, true);
520 static bool bootcpu_valid __initdata;
521 static unsigned int cpu_count = 1;
524 static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
526 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
528 return &cpu_madt_gicc[cpu];
532 * acpi_map_gic_cpu_interface - parse processor MADT entry
534 * Carry out sanity checks on MADT processor entry and initialize
535 * cpu_logical_map on success
538 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
540 u64 hwid = processor->arm_mpidr;
542 if (!(processor->flags & ACPI_MADT_ENABLED)) {
543 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
547 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
548 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
552 if (is_mpidr_duplicate(cpu_count, hwid)) {
553 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
557 /* Check if GICC structure of boot CPU is available in the MADT */
558 if (cpu_logical_map(0) == hwid) {
560 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
564 bootcpu_valid = true;
565 cpu_madt_gicc[0] = *processor;
566 early_map_cpu_to_node(0, acpi_numa_get_nid(0, hwid));
570 if (cpu_count >= NR_CPUS)
573 /* map the logical cpu id to cpu MPIDR */
574 cpu_logical_map(cpu_count) = hwid;
576 cpu_madt_gicc[cpu_count] = *processor;
579 * Set-up the ACPI parking protocol cpu entries
580 * while initializing the cpu_logical_map to
581 * avoid parsing MADT entries multiple times for
582 * nothing (ie a valid cpu_logical_map entry should
583 * contain a valid parking protocol data set to
584 * initialize the cpu if the parking protocol is
585 * the only available enable method).
587 acpi_set_mailbox_entry(cpu_count, processor);
589 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid));
595 acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
596 const unsigned long end)
598 struct acpi_madt_generic_interrupt *processor;
600 processor = (struct acpi_madt_generic_interrupt *)header;
601 if (BAD_MADT_GICC_ENTRY(processor, end))
604 acpi_table_print_madt_entry(header);
606 acpi_map_gic_cpu_interface(processor);
611 #define acpi_table_parse_madt(...) do { } while (0)
615 * Enumerate the possible CPU set from the device tree and build the
616 * cpu logical map array containing MPIDR values related to logical
617 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
619 static void __init of_parse_and_init_cpus(void)
621 struct device_node *dn;
623 for_each_node_by_type(dn, "cpu") {
624 u64 hwid = of_get_cpu_mpidr(dn);
626 if (hwid == INVALID_HWID)
629 if (is_mpidr_duplicate(cpu_count, hwid)) {
630 pr_err("%s: duplicate cpu reg properties in the DT\n",
636 * The numbering scheme requires that the boot CPU
637 * must be assigned logical id 0. Record it so that
638 * the logical map built from DT is validated and can
641 if (hwid == cpu_logical_map(0)) {
643 pr_err("%s: duplicate boot cpu reg property in DT\n",
648 bootcpu_valid = true;
649 early_map_cpu_to_node(0, of_node_to_nid(dn));
652 * cpu_logical_map has already been
653 * initialized and the boot cpu doesn't need
654 * the enable-method so continue without
660 if (cpu_count >= NR_CPUS)
663 pr_debug("cpu logical map 0x%llx\n", hwid);
664 cpu_logical_map(cpu_count) = hwid;
666 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
673 * Enumerate the possible CPU set from the device tree or ACPI and build the
674 * cpu logical map array containing MPIDR values related to logical
675 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
677 void __init smp_init_cpus(void)
682 of_parse_and_init_cpus();
685 * do a walk of MADT to determine how many CPUs
686 * we have including disabled CPUs, and get information
687 * we need for SMP init
689 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
690 acpi_parse_gic_cpu_interface, 0);
692 if (cpu_count > nr_cpu_ids)
693 pr_warn("Number of cores (%d) exceeds configured maximum of %d - clipping\n",
694 cpu_count, nr_cpu_ids);
696 if (!bootcpu_valid) {
697 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
702 * We need to set the cpu_logical_map entries before enabling
703 * the cpus so that cpu processor description entries (DT cpu nodes
704 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
705 * with entries in cpu_logical_map while initializing the cpus.
706 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
708 for (i = 1; i < nr_cpu_ids; i++) {
709 if (cpu_logical_map(i) != INVALID_HWID) {
710 if (smp_cpu_setup(i))
711 cpu_logical_map(i) = INVALID_HWID;
716 void __init smp_prepare_cpus(unsigned int max_cpus)
720 unsigned int this_cpu;
724 this_cpu = smp_processor_id();
725 store_cpu_topology(this_cpu);
726 numa_store_cpu_info(this_cpu);
729 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
730 * secondary CPUs present.
736 * Initialise the present map (which describes the set of CPUs
737 * actually populated at the present time) and release the
738 * secondaries from the bootloader.
740 for_each_possible_cpu(cpu) {
742 per_cpu(cpu_number, cpu) = cpu;
744 if (cpu == smp_processor_id())
750 err = cpu_ops[cpu]->cpu_prepare(cpu);
754 set_cpu_present(cpu, true);
755 numa_store_cpu_info(cpu);
759 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
761 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
763 __smp_cross_call = fn;
766 static const char *ipi_types[NR_IPI] __tracepoint_string = {
767 #define S(x,s) [x] = s
768 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
769 S(IPI_CALL_FUNC, "Function call interrupts"),
770 S(IPI_CPU_STOP, "CPU stop interrupts"),
771 S(IPI_CPU_CRASH_STOP, "CPU stop (for crash dump) interrupts"),
772 S(IPI_TIMER, "Timer broadcast interrupts"),
773 S(IPI_IRQ_WORK, "IRQ work interrupts"),
774 S(IPI_WAKEUP, "CPU wake-up interrupts"),
777 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
779 trace_ipi_raise(target, ipi_types[ipinr]);
780 __smp_cross_call(target, ipinr);
783 void show_ipi_list(struct seq_file *p, int prec)
787 for (i = 0; i < NR_IPI; i++) {
788 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
789 prec >= 4 ? " " : "");
790 for_each_online_cpu(cpu)
791 seq_printf(p, "%10u ",
792 __get_irq_stat(cpu, ipi_irqs[i]));
793 seq_printf(p, " %s\n", ipi_types[i]);
797 u64 smp_irq_stat_cpu(unsigned int cpu)
802 for (i = 0; i < NR_IPI; i++)
803 sum += __get_irq_stat(cpu, ipi_irqs[i]);
808 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
810 smp_cross_call(mask, IPI_CALL_FUNC);
813 void arch_send_call_function_single_ipi(int cpu)
815 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
818 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
819 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
821 smp_cross_call(mask, IPI_WAKEUP);
825 #ifdef CONFIG_IRQ_WORK
826 void arch_irq_work_raise(void)
828 if (__smp_cross_call)
829 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
834 * ipi_cpu_stop - handle IPI from smp_send_stop()
836 static void ipi_cpu_stop(unsigned int cpu)
838 set_cpu_online(cpu, false);
846 #ifdef CONFIG_KEXEC_CORE
847 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
850 static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
852 #ifdef CONFIG_KEXEC_CORE
853 crash_save_cpu(regs, cpu);
855 atomic_dec(&waiting_for_crash_ipi);
859 #ifdef CONFIG_HOTPLUG_CPU
860 if (cpu_ops[cpu]->cpu_die)
861 cpu_ops[cpu]->cpu_die(cpu);
870 * Main handler for inter-processor interrupts
872 void handle_IPI(int ipinr, struct pt_regs *regs)
874 unsigned int cpu = smp_processor_id();
875 struct pt_regs *old_regs = set_irq_regs(regs);
877 if ((unsigned)ipinr < NR_IPI) {
878 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
879 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
889 generic_smp_call_function_interrupt();
899 case IPI_CPU_CRASH_STOP:
900 if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
902 ipi_cpu_crash_stop(cpu, regs);
908 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
911 tick_receive_broadcast();
916 #ifdef CONFIG_IRQ_WORK
924 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
926 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
927 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
933 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
937 if ((unsigned)ipinr < NR_IPI)
938 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
939 set_irq_regs(old_regs);
942 void smp_send_reschedule(int cpu)
944 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
947 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
948 void tick_broadcast(const struct cpumask *mask)
950 smp_cross_call(mask, IPI_TIMER);
954 void smp_send_stop(void)
956 unsigned long timeout;
958 if (num_online_cpus() > 1) {
961 cpumask_copy(&mask, cpu_online_mask);
962 cpumask_clear_cpu(smp_processor_id(), &mask);
964 if (system_state <= SYSTEM_RUNNING)
965 pr_crit("SMP: stopping secondary CPUs\n");
966 smp_cross_call(&mask, IPI_CPU_STOP);
969 /* Wait up to one second for other CPUs to stop */
970 timeout = USEC_PER_SEC;
971 while (num_online_cpus() > 1 && timeout--)
974 if (num_online_cpus() > 1)
975 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
976 cpumask_pr_args(cpu_online_mask));
979 #ifdef CONFIG_KEXEC_CORE
980 void smp_send_crash_stop(void)
983 unsigned long timeout;
985 if (num_online_cpus() == 1)
988 cpumask_copy(&mask, cpu_online_mask);
989 cpumask_clear_cpu(smp_processor_id(), &mask);
991 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
993 pr_crit("SMP: stopping secondary CPUs\n");
994 smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
996 /* Wait up to one second for other CPUs to stop */
997 timeout = USEC_PER_SEC;
998 while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
1001 if (atomic_read(&waiting_for_crash_ipi) > 0)
1002 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
1003 cpumask_pr_args(&mask));
1006 bool smp_crash_stop_failed(void)
1008 return (atomic_read(&waiting_for_crash_ipi) > 0);
1013 * not supported here
1015 int setup_profiling_timer(unsigned int multiplier)
1020 static bool have_cpu_die(void)
1022 #ifdef CONFIG_HOTPLUG_CPU
1023 int any_cpu = raw_smp_processor_id();
1025 if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
1031 bool cpus_are_stuck_in_kernel(void)
1033 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1035 return !!cpus_stuck_in_kernel || smp_spin_tables;