arch/arm64/kernel/traps.c

   1 /*
   2  * Based on arch/arm/kernel/traps.c
   3  *
   4  * Copyright (C) 1995-2009 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/bug.h>
  21 #include <linux/signal.h>
  22 #include <linux/personality.h>
  23 #include <linux/kallsyms.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/uaccess.h>
  26 #include <linux/hardirq.h>
  27 #include <linux/kdebug.h>
  28 #include <linux/module.h>
  29 #include <linux/kexec.h>
  30 #include <linux/delay.h>
  31 #include <linux/init.h>
  32 #include <linux/sched.h>
  33 #include <linux/syscalls.h>
  34
  35 #include <asm/atomic.h>
  36 #include <asm/bug.h>
  37 #include <asm/debug-monitors.h>
  38 #include <asm/esr.h>
  39 #include <asm/insn.h>
  40 #include <asm/traps.h>
  41 #include <asm/stack_pointer.h>
  42 #include <asm/stacktrace.h>
  43 #include <asm/exception.h>
  44 #include <asm/system_misc.h>
  45 #include <asm/sysreg.h>
  46
  47 static const char *handler[]= {
  48         "Synchronous Abort",
  49         "IRQ",
  50         "FIQ",
  51         "Error"
  52 };
  53
  54 int show_unhandled_signals = 1;
  55
  56 /*
  57  * Dump out the contents of some kernel memory nicely...
  58  */
  59 static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
  60                      unsigned long top)
  61 {
  62         unsigned long first;
  63         mm_segment_t fs;
  64         int i;
  65
  66         /*
  67          * We need to switch to kernel mode so that we can use __get_user
  68          * to safely read from kernel space.
  69          */
  70         fs = get_fs();
  71         set_fs(KERNEL_DS);
  72
  73         printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
  74
  75         for (first = bottom & ~31; first < top; first += 32) {
  76                 unsigned long p;
  77                 char str[sizeof(" 12345678") * 8 + 1];
  78
  79                 memset(str, ' ', sizeof(str));
  80                 str[sizeof(str) - 1] = '\0';
  81
  82                 for (p = first, i = 0; i < (32 / 8)
  83                                         && p < top; i++, p += 8) {
  84                         if (p >= bottom && p < top) {
  85                                 unsigned long val;
  86
  87                                 if (__get_user(val, (unsigned long *)p) == 0)
  88                                         sprintf(str + i * 17, " %016lx", val);
  89                                 else
  90                                         sprintf(str + i * 17, " ????????????????");
  91                         }
  92                 }
  93                 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
  94         }
  95
  96         set_fs(fs);
  97 }
  98
  99 static void dump_backtrace_entry(unsigned long where)
 100 {
 101         /*
 102          * Note that 'where' can have a physical address, but it's not handled.
 103          */
 104         print_ip_sym(where);
 105 }
 106
 107 static void __dump_instr(const char *lvl, struct pt_regs *regs)
 108 {
 109         unsigned long addr = instruction_pointer(regs);
 110         char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
 111         int i;
 112
 113         for (i = -4; i < 1; i++) {
 114                 unsigned int val, bad;
 115
 116                 bad = __get_user(val, &((u32 *)addr)[i]);
 117
 118                 if (!bad)
 119                         p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
 120                 else {
 121                         p += sprintf(p, "bad PC value");
 122                         break;
 123                 }
 124         }
 125         printk("%sCode: %s\n", lvl, str);
 126 }
 127
 128 static void dump_instr(const char *lvl, struct pt_regs *regs)
 129 {
 130         if (!user_mode(regs)) {
 131                 mm_segment_t fs = get_fs();
 132                 set_fs(KERNEL_DS);
 133                 __dump_instr(lvl, regs);
 134                 set_fs(fs);
 135         } else {
 136                 __dump_instr(lvl, regs);
 137         }
 138 }
 139
 140 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
 141 {
 142         struct stackframe frame;
 143         unsigned long irq_stack_ptr;
 144         int skip;
 145
 146         pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
 147
 148         if (!tsk)
 149                 tsk = current;
 150
 151         /*
 152          * Switching between stacks is valid when tracing current and in
 153          * non-preemptible context.
 154          */
 155         if (tsk == current && !preemptible())
 156                 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
 157         else
 158                 irq_stack_ptr = 0;
 159
 160         if (tsk == current) {
 161                 frame.fp = (unsigned long)__builtin_frame_address(0);
 162                 frame.sp = current_stack_pointer;
 163                 frame.pc = (unsigned long)dump_backtrace;
 164         } else {
 165                 /*
 166                  * task blocked in __switch_to
 167                  */
 168                 frame.fp = thread_saved_fp(tsk);
 169                 frame.sp = thread_saved_sp(tsk);
 170                 frame.pc = thread_saved_pc(tsk);
 171         }
 172 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 173         frame.graph = tsk->curr_ret_stack;
 174 #endif
 175
 176         skip = !!regs;
 177         printk("Call trace:\n");
 178         while (1) {
 179                 unsigned long where = frame.pc;
 180                 unsigned long stack;
 181                 int ret;
 182
 183                 /* skip until specified stack frame */
 184                 if (!skip) {
 185                         dump_backtrace_entry(where);
 186                 } else if (frame.fp == regs->regs[29]) {
 187                         skip = 0;
 188                         /*
 189                          * Mostly, this is the case where this function is
 190                          * called in panic/abort. As exception handler's
 191                          * stack frame does not contain the corresponding pc
 192                          * at which an exception has taken place, use regs->pc
 193                          * instead.
 194                          */
 195                         dump_backtrace_entry(regs->pc);
 196                 }
 197                 ret = unwind_frame(tsk, &frame);
 198                 if (ret < 0)
 199                         break;
 200                 stack = frame.sp;
 201                 if (in_exception_text(where)) {
 202                         /*
 203                          * If we switched to the irq_stack before calling this
 204                          * exception handler, then the pt_regs will be on the
 205                          * task stack. The easiest way to tell is if the large
 206                          * pt_regs would overlap with the end of the irq_stack.
 207                          */
 208                         if (stack < irq_stack_ptr &&
 209                             (stack + sizeof(struct pt_regs)) > irq_stack_ptr)
 210                                 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr);
 211
 212                         dump_mem("", "Exception stack", stack,
 213                                  stack + sizeof(struct pt_regs));
 214                 }
 215         }
 216 }
 217
 218 void show_stack(struct task_struct *tsk, unsigned long *sp)
 219 {
 220         dump_backtrace(NULL, tsk);
 221         barrier();
 222 }
 223
 224 #ifdef CONFIG_PREEMPT
 225 #define S_PREEMPT " PREEMPT"
 226 #else
 227 #define S_PREEMPT ""
 228 #endif
 229 #define S_SMP " SMP"
 230
 231 static int __die(const char *str, int err, struct thread_info *thread,
 232                  struct pt_regs *regs)
 233 {
 234         struct task_struct *tsk = thread->task;
 235         static int die_counter;
 236         int ret;
 237
 238         pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
 239                  str, err, ++die_counter);
 240
 241         /* trap and error numbers are mostly meaningless on ARM */
 242         ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
 243         if (ret == NOTIFY_STOP)
 244                 return ret;
 245
 246         print_modules();
 247         __show_regs(regs);
 248         pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
 249                  TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1);
 250
 251         if (!user_mode(regs)) {
 252                 dump_mem(KERN_EMERG, "Stack: ", regs->sp,
 253                          THREAD_SIZE + (unsigned long)task_stack_page(tsk));
 254                 dump_backtrace(regs, tsk);
 255                 dump_instr(KERN_EMERG, regs);
 256         }
 257
 258         return ret;
 259 }
 260
 261 static DEFINE_RAW_SPINLOCK(die_lock);
 262
 263 /*
 264  * This function is protected against re-entrancy.
 265  */
 266 void die(const char *str, struct pt_regs *regs, int err)
 267 {
 268         struct thread_info *thread = current_thread_info();
 269         int ret;
 270
 271         oops_enter();
 272
 273         raw_spin_lock_irq(&die_lock);
 274         console_verbose();
 275         bust_spinlocks(1);
 276         ret = __die(str, err, thread, regs);
 277
 278         if (regs && kexec_should_crash(thread->task))
 279                 crash_kexec(regs);
 280
 281         bust_spinlocks(0);
 282         add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
 283         raw_spin_unlock_irq(&die_lock);
 284         oops_exit();
 285
 286         if (in_interrupt())
 287                 panic("Fatal exception in interrupt");
 288         if (panic_on_oops)
 289                 panic("Fatal exception");
 290         if (ret != NOTIFY_STOP)
 291                 do_exit(SIGSEGV);
 292 }
 293
 294 void arm64_notify_die(const char *str, struct pt_regs *regs,
 295                       struct siginfo *info, int err)
 296 {
 297         if (user_mode(regs)) {
 298                 current->thread.fault_address = 0;
 299                 current->thread.fault_code = err;
 300                 force_sig_info(info->si_signo, info, current);
 301         } else {
 302                 die(str, regs, err);
 303         }
 304 }
 305
 306 static LIST_HEAD(undef_hook);
 307 static DEFINE_RAW_SPINLOCK(undef_lock);
 308
 309 void register_undef_hook(struct undef_hook *hook)
 310 {
 311         unsigned long flags;
 312
 313         raw_spin_lock_irqsave(&undef_lock, flags);
 314         list_add(&hook->node, &undef_hook);
 315         raw_spin_unlock_irqrestore(&undef_lock, flags);
 316 }
 317
 318 void unregister_undef_hook(struct undef_hook *hook)
 319 {
 320         unsigned long flags;
 321
 322         raw_spin_lock_irqsave(&undef_lock, flags);
 323         list_del(&hook->node);
 324         raw_spin_unlock_irqrestore(&undef_lock, flags);
 325 }
 326
 327 static int call_undef_hook(struct pt_regs *regs)
 328 {
 329         struct undef_hook *hook;
 330         unsigned long flags;
 331         u32 instr;
 332         int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
 333         void __user *pc = (void __user *)instruction_pointer(regs);
 334
 335         if (!user_mode(regs))
 336                 return 1;
 337
 338         if (compat_thumb_mode(regs)) {
 339                 /* 16-bit Thumb instruction */
 340                 if (get_user(instr, (u16 __user *)pc))
 341                         goto exit;
 342                 instr = le16_to_cpu(instr);
 343                 if (aarch32_insn_is_wide(instr)) {
 344                         u32 instr2;
 345
 346                         if (get_user(instr2, (u16 __user *)(pc + 2)))
 347                                 goto exit;
 348                         instr2 = le16_to_cpu(instr2);
 349                         instr = (instr << 16) | instr2;
 350                 }
 351         } else {
 352                 /* 32-bit ARM instruction */
 353                 if (get_user(instr, (u32 __user *)pc))
 354                         goto exit;
 355                 instr = le32_to_cpu(instr);
 356         }
 357
 358         raw_spin_lock_irqsave(&undef_lock, flags);
 359         list_for_each_entry(hook, &undef_hook, node)
 360                 if ((instr & hook->instr_mask) == hook->instr_val &&
 361                         (regs->pstate & hook->pstate_mask) == hook->pstate_val)
 362                         fn = hook->fn;
 363
 364         raw_spin_unlock_irqrestore(&undef_lock, flags);
 365 exit:
 366         return fn ? fn(regs, instr) : 1;
 367 }
 368
 369 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
 370                                 unsigned long address)
 371 {
 372         siginfo_t info;
 373         void __user *pc = (void __user *)instruction_pointer(regs);
 374         const char *desc;
 375
 376         switch (signal) {
 377         case SIGILL:
 378                 desc = "undefined instruction";
 379                 break;
 380         case SIGSEGV:
 381                 desc = "illegal memory access";
 382                 break;
 383         default:
 384                 desc = "bad mode";
 385                 break;
 386         }
 387
 388         if (unhandled_signal(current, signal) &&
 389             show_unhandled_signals_ratelimited()) {
 390                 pr_info("%s[%d]: %s: pc=%p\n",
 391                         current->comm, task_pid_nr(current), desc, pc);
 392                 dump_instr(KERN_INFO, regs);
 393         }
 394
 395         info.si_signo = signal;
 396         info.si_errno = 0;
 397         info.si_code  = code;
 398         info.si_addr  = pc;
 399
 400         arm64_notify_die(desc, regs, &info, 0);
 401 }
 402
 403 /*
 404  * Set up process info to signal segmentation fault - called on access error.
 405  */
 406 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
 407 {
 408         int code;
 409
 410         down_read(&current->mm->mmap_sem);
 411         if (find_vma(current->mm, addr) == NULL)
 412                 code = SEGV_MAPERR;
 413         else
 414                 code = SEGV_ACCERR;
 415         up_read(&current->mm->mmap_sem);
 416
 417         force_signal_inject(SIGSEGV, code, regs, addr);
 418 }
 419
 420 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
 421 {
 422         /* check for AArch32 breakpoint instructions */
 423         if (!aarch32_break_handler(regs))
 424                 return;
 425
 426         if (call_undef_hook(regs) == 0)
 427                 return;
 428
 429         force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 430 }
 431
 432 int cpu_enable_cache_maint_trap(void *__unused)
 433 {
 434         config_sctlr_el1(SCTLR_EL1_UCI, 0);
 435         return 0;
 436 }
 437
 438 #define __user_cache_maint(insn, address, res)                  \
 439         if (untagged_addr(address) >= user_addr_max())          \
 440                 res = -EFAULT;                                  \
 441         else                                                    \
 442                 asm volatile (                                  \
 443                         "1:     " insn ", %1\n"                 \
 444                         "       mov     %w0, #0\n"              \
 445                         "2:\n"                                  \
 446                         "       .pushsection .fixup,\"ax\"\n"   \
 447                         "       .align  2\n"                    \
 448                         "3:     mov     %w0, %w2\n"             \
 449                         "       b       2b\n"                   \
 450                         "       .popsection\n"                  \
 451                         _ASM_EXTABLE(1b, 3b)                    \
 452                         : "=r" (res)                            \
 453                         : "r" (address), "i" (-EFAULT) )
 454
 455 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
 456 {
 457         unsigned long address;
 458         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 459         int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
 460         int ret = 0;
 461
 462         address = (rt == 31) ? 0 : regs->regs[rt];
 463
 464         switch (crm) {
 465         case ESR_ELx_SYS64_ISS_CRM_DC_CVAU:     /* DC CVAU, gets promoted */
 466                 __user_cache_maint("dc civac", address, ret);
 467                 break;
 468         case ESR_ELx_SYS64_ISS_CRM_DC_CVAC:     /* DC CVAC, gets promoted */
 469                 __user_cache_maint("dc civac", address, ret);
 470                 break;
 471         case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC:    /* DC CIVAC */
 472                 __user_cache_maint("dc civac", address, ret);
 473                 break;
 474         case ESR_ELx_SYS64_ISS_CRM_IC_IVAU:     /* IC IVAU */
 475                 __user_cache_maint("ic ivau", address, ret);
 476                 break;
 477         default:
 478                 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 479                 return;
 480         }
 481
 482         if (ret)
 483                 arm64_notify_segfault(regs, address);
 484         else
 485                 regs->pc += 4;
 486 }
 487
 488 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
 489 {
 490         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 491
 492         regs->regs[rt] = arm64_ftr_reg_ctrel0.sys_val;
 493         regs->pc += 4;
 494 }
 495
 496 struct sys64_hook {
 497         unsigned int esr_mask;
 498         unsigned int esr_val;
 499         void (*handler)(unsigned int esr, struct pt_regs *regs);
 500 };
 501
 502 static struct sys64_hook sys64_hooks[] = {
 503         {
 504                 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
 505                 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
 506                 .handler = user_cache_maint_handler,
 507         },
 508         {
 509                 /* Trap read access to CTR_EL0 */
 510                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 511                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
 512                 .handler = ctr_read_handler,
 513         },
 514         {},
 515 };
 516
 517 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
 518 {
 519         struct sys64_hook *hook;
 520
 521         for (hook = sys64_hooks; hook->handler; hook++)
 522                 if ((hook->esr_mask & esr) == hook->esr_val) {
 523                         hook->handler(esr, regs);
 524                         return;
 525                 }
 526
 527         force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 528 }
 529
 530 long compat_arm_syscall(struct pt_regs *regs);
 531
 532 asmlinkage long do_ni_syscall(struct pt_regs *regs)
 533 {
 534 #ifdef CONFIG_COMPAT
 535         long ret;
 536         if (is_compat_task()) {
 537                 ret = compat_arm_syscall(regs);
 538                 if (ret != -ENOSYS)
 539                         return ret;
 540         }
 541 #endif
 542
 543         if (show_unhandled_signals_ratelimited()) {
 544                 pr_info("%s[%d]: syscall %d\n", current->comm,
 545                         task_pid_nr(current), (int)regs->syscallno);
 546                 dump_instr("", regs);
 547                 if (user_mode(regs))
 548                         __show_regs(regs);
 549         }
 550
 551         return sys_ni_syscall();
 552 }
 553
 554 static const char *esr_class_str[] = {
 555         [0 ... ESR_ELx_EC_MAX]          = "UNRECOGNIZED EC",
 556         [ESR_ELx_EC_UNKNOWN]            = "Unknown/Uncategorized",
 557         [ESR_ELx_EC_WFx]                = "WFI/WFE",
 558         [ESR_ELx_EC_CP15_32]            = "CP15 MCR/MRC",
 559         [ESR_ELx_EC_CP15_64]            = "CP15 MCRR/MRRC",
 560         [ESR_ELx_EC_CP14_MR]            = "CP14 MCR/MRC",
 561         [ESR_ELx_EC_CP14_LS]            = "CP14 LDC/STC",
 562         [ESR_ELx_EC_FP_ASIMD]           = "ASIMD",
 563         [ESR_ELx_EC_CP10_ID]            = "CP10 MRC/VMRS",
 564         [ESR_ELx_EC_CP14_64]            = "CP14 MCRR/MRRC",
 565         [ESR_ELx_EC_ILL]                = "PSTATE.IL",
 566         [ESR_ELx_EC_SVC32]              = "SVC (AArch32)",
 567         [ESR_ELx_EC_HVC32]              = "HVC (AArch32)",
 568         [ESR_ELx_EC_SMC32]              = "SMC (AArch32)",
 569         [ESR_ELx_EC_SVC64]              = "SVC (AArch64)",
 570         [ESR_ELx_EC_HVC64]              = "HVC (AArch64)",
 571         [ESR_ELx_EC_SMC64]              = "SMC (AArch64)",
 572         [ESR_ELx_EC_SYS64]              = "MSR/MRS (AArch64)",
 573         [ESR_ELx_EC_IMP_DEF]            = "EL3 IMP DEF",
 574         [ESR_ELx_EC_IABT_LOW]           = "IABT (lower EL)",
 575         [ESR_ELx_EC_IABT_CUR]           = "IABT (current EL)",
 576         [ESR_ELx_EC_PC_ALIGN]           = "PC Alignment",
 577         [ESR_ELx_EC_DABT_LOW]           = "DABT (lower EL)",
 578         [ESR_ELx_EC_DABT_CUR]           = "DABT (current EL)",
 579         [ESR_ELx_EC_SP_ALIGN]           = "SP Alignment",
 580         [ESR_ELx_EC_FP_EXC32]           = "FP (AArch32)",
 581         [ESR_ELx_EC_FP_EXC64]           = "FP (AArch64)",
 582         [ESR_ELx_EC_SERROR]             = "SError",
 583         [ESR_ELx_EC_BREAKPT_LOW]        = "Breakpoint (lower EL)",
 584         [ESR_ELx_EC_BREAKPT_CUR]        = "Breakpoint (current EL)",
 585         [ESR_ELx_EC_SOFTSTP_LOW]        = "Software Step (lower EL)",
 586         [ESR_ELx_EC_SOFTSTP_CUR]        = "Software Step (current EL)",
 587         [ESR_ELx_EC_WATCHPT_LOW]        = "Watchpoint (lower EL)",
 588         [ESR_ELx_EC_WATCHPT_CUR]        = "Watchpoint (current EL)",
 589         [ESR_ELx_EC_BKPT32]             = "BKPT (AArch32)",
 590         [ESR_ELx_EC_VECTOR32]           = "Vector catch (AArch32)",
 591         [ESR_ELx_EC_BRK64]              = "BRK (AArch64)",
 592 };
 593
 594 const char *esr_get_class_string(u32 esr)
 595 {
 596         return esr_class_str[ESR_ELx_EC(esr)];
 597 }
 598
 599 /*
 600  * bad_mode handles the impossible case in the exception vector.
 601  */
 602 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
 603 {
 604         siginfo_t info;
 605         void __user *pc = (void __user *)instruction_pointer(regs);
 606         console_verbose();
 607
 608         pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
 609                 handler[reason], smp_processor_id(), esr,
 610                 esr_get_class_string(esr));
 611         __show_regs(regs);
 612
 613         info.si_signo = SIGILL;
 614         info.si_errno = 0;
 615         info.si_code  = ILL_ILLOPC;
 616         info.si_addr  = pc;
 617
 618         arm64_notify_die("Oops - bad mode", regs, &info, 0);
 619 }
 620
 621 void __pte_error(const char *file, int line, unsigned long val)
 622 {
 623         pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
 624 }
 625
 626 void __pmd_error(const char *file, int line, unsigned long val)
 627 {
 628         pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
 629 }
 630
 631 void __pud_error(const char *file, int line, unsigned long val)
 632 {
 633         pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
 634 }
 635
 636 void __pgd_error(const char *file, int line, unsigned long val)
 637 {
 638         pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
 639 }
 640
 641 /* GENERIC_BUG traps */
 642
 643 int is_valid_bugaddr(unsigned long addr)
 644 {
 645         /*
 646          * bug_handler() only called for BRK #BUG_BRK_IMM.
 647          * So the answer is trivial -- any spurious instances with no
 648          * bug table entry will be rejected by report_bug() and passed
 649          * back to the debug-monitors code and handled as a fatal
 650          * unexpected debug exception.
 651          */
 652         return 1;
 653 }
 654
 655 static int bug_handler(struct pt_regs *regs, unsigned int esr)
 656 {
 657         if (user_mode(regs))
 658                 return DBG_HOOK_ERROR;
 659
 660         switch (report_bug(regs->pc, regs)) {
 661         case BUG_TRAP_TYPE_BUG:
 662                 die("Oops - BUG", regs, 0);
 663                 break;
 664
 665         case BUG_TRAP_TYPE_WARN:
 666                 /* Ideally, report_bug() should backtrace for us... but no. */
 667                 dump_backtrace(regs, NULL);
 668                 break;
 669
 670         default:
 671                 /* unknown/unrecognised bug trap type */
 672                 return DBG_HOOK_ERROR;
 673         }
 674
 675         /* If thread survives, skip over the BUG instruction and continue: */
 676         regs->pc += AARCH64_INSN_SIZE;  /* skip BRK and resume */
 677         return DBG_HOOK_HANDLED;
 678 }
 679
 680 static struct break_hook bug_break_hook = {
 681         .esr_val = 0xf2000000 | BUG_BRK_IMM,
 682         .esr_mask = 0xffffffff,
 683         .fn = bug_handler,
 684 };
 685
 686 /*
 687  * Initial handler for AArch64 BRK exceptions
 688  * This handler only used until debug_traps_init().
 689  */
 690 int __init early_brk64(unsigned long addr, unsigned int esr,
 691                 struct pt_regs *regs)
 692 {
 693         return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
 694 }
 695
 696 /* This registration must happen early, before debug_traps_init(). */
 697 void __init trap_init(void)
 698 {
 699         register_break_hook(&bug_break_hook);
 700 }