arch/arm64/kernel/traps.c

   1 /*
   2  * Based on arch/arm/kernel/traps.c
   3  *
   4  * Copyright (C) 1995-2009 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/bug.h>
  21 #include <linux/signal.h>
  22 #include <linux/personality.h>
  23 #include <linux/kallsyms.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/uaccess.h>
  26 #include <linux/hardirq.h>
  27 #include <linux/kdebug.h>
  28 #include <linux/module.h>
  29 #include <linux/kexec.h>
  30 #include <linux/delay.h>
  31 #include <linux/init.h>
  32 #include <linux/sched/signal.h>
  33 #include <linux/sched/debug.h>
  34 #include <linux/sched/task_stack.h>
  35 #include <linux/syscalls.h>
  36 #include <linux/mm_types.h>
  37
  38 #include <asm/atomic.h>
  39 #include <asm/bug.h>
  40 #include <asm/debug-monitors.h>
  41 #include <asm/esr.h>
  42 #include <asm/insn.h>
  43 #include <asm/traps.h>
  44 #include <asm/stack_pointer.h>
  45 #include <asm/stacktrace.h>
  46 #include <asm/exception.h>
  47 #include <asm/system_misc.h>
  48 #include <asm/sysreg.h>
  49
  50 static const char *handler[]= {
  51         "Synchronous Abort",
  52         "IRQ",
  53         "FIQ",
  54         "Error"
  55 };
  56
  57 int show_unhandled_signals = 1;
  58
  59 /*
  60  * Dump out the contents of some kernel memory nicely...
  61  */
  62 static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
  63                      unsigned long top)
  64 {
  65         unsigned long first;
  66         mm_segment_t fs;
  67         int i;
  68
  69         /*
  70          * We need to switch to kernel mode so that we can use __get_user
  71          * to safely read from kernel space.
  72          */
  73         fs = get_fs();
  74         set_fs(KERNEL_DS);
  75
  76         printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
  77
  78         for (first = bottom & ~31; first < top; first += 32) {
  79                 unsigned long p;
  80                 char str[sizeof(" 12345678") * 8 + 1];
  81
  82                 memset(str, ' ', sizeof(str));
  83                 str[sizeof(str) - 1] = '\0';
  84
  85                 for (p = first, i = 0; i < (32 / 8)
  86                                         && p < top; i++, p += 8) {
  87                         if (p >= bottom && p < top) {
  88                                 unsigned long val;
  89
  90                                 if (__get_user(val, (unsigned long *)p) == 0)
  91                                         sprintf(str + i * 17, " %016lx", val);
  92                                 else
  93                                         sprintf(str + i * 17, " ????????????????");
  94                         }
  95                 }
  96                 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
  97         }
  98
  99         set_fs(fs);
 100 }
 101
 102 static void dump_backtrace_entry(unsigned long where)
 103 {
 104         /*
 105          * Note that 'where' can have a physical address, but it's not handled.
 106          */
 107         print_ip_sym(where);
 108 }
 109
 110 static void __dump_instr(const char *lvl, struct pt_regs *regs)
 111 {
 112         unsigned long addr = instruction_pointer(regs);
 113         char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
 114         int i;
 115
 116         for (i = -4; i < 1; i++) {
 117                 unsigned int val, bad;
 118
 119                 bad = __get_user(val, &((u32 *)addr)[i]);
 120
 121                 if (!bad)
 122                         p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
 123                 else {
 124                         p += sprintf(p, "bad PC value");
 125                         break;
 126                 }
 127         }
 128         printk("%sCode: %s\n", lvl, str);
 129 }
 130
 131 static void dump_instr(const char *lvl, struct pt_regs *regs)
 132 {
 133         if (!user_mode(regs)) {
 134                 mm_segment_t fs = get_fs();
 135                 set_fs(KERNEL_DS);
 136                 __dump_instr(lvl, regs);
 137                 set_fs(fs);
 138         } else {
 139                 __dump_instr(lvl, regs);
 140         }
 141 }
 142
 143 void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
 144 {
 145         struct stackframe frame;
 146         unsigned long irq_stack_ptr;
 147         int skip;
 148
 149         pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
 150
 151         if (!tsk)
 152                 tsk = current;
 153
 154         if (!try_get_task_stack(tsk))
 155                 return;
 156
 157         /*
 158          * Switching between stacks is valid when tracing current and in
 159          * non-preemptible context.
 160          */
 161         if (tsk == current && !preemptible())
 162                 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
 163         else
 164                 irq_stack_ptr = 0;
 165
 166         if (tsk == current) {
 167                 frame.fp = (unsigned long)__builtin_frame_address(0);
 168                 frame.sp = current_stack_pointer;
 169                 frame.pc = (unsigned long)dump_backtrace;
 170         } else {
 171                 /*
 172                  * task blocked in __switch_to
 173                  */
 174                 frame.fp = thread_saved_fp(tsk);
 175                 frame.sp = thread_saved_sp(tsk);
 176                 frame.pc = thread_saved_pc(tsk);
 177         }
 178 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 179         frame.graph = tsk->curr_ret_stack;
 180 #endif
 181
 182         skip = !!regs;
 183         printk("Call trace:\n");
 184         while (1) {
 185                 unsigned long where = frame.pc;
 186                 unsigned long stack;
 187                 int ret;
 188
 189                 /* skip until specified stack frame */
 190                 if (!skip) {
 191                         dump_backtrace_entry(where);
 192                 } else if (frame.fp == regs->regs[29]) {
 193                         skip = 0;
 194                         /*
 195                          * Mostly, this is the case where this function is
 196                          * called in panic/abort. As exception handler's
 197                          * stack frame does not contain the corresponding pc
 198                          * at which an exception has taken place, use regs->pc
 199                          * instead.
 200                          */
 201                         dump_backtrace_entry(regs->pc);
 202                 }
 203                 ret = unwind_frame(tsk, &frame);
 204                 if (ret < 0)
 205                         break;
 206                 stack = frame.sp;
 207                 if (in_exception_text(where)) {
 208                         /*
 209                          * If we switched to the irq_stack before calling this
 210                          * exception handler, then the pt_regs will be on the
 211                          * task stack. The easiest way to tell is if the large
 212                          * pt_regs would overlap with the end of the irq_stack.
 213                          */
 214                         if (stack < irq_stack_ptr &&
 215                             (stack + sizeof(struct pt_regs)) > irq_stack_ptr)
 216                                 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr);
 217
 218                         dump_mem("", "Exception stack", stack,
 219                                  stack + sizeof(struct pt_regs));
 220                 }
 221         }
 222
 223         put_task_stack(tsk);
 224 }
 225
 226 void show_stack(struct task_struct *tsk, unsigned long *sp)
 227 {
 228         dump_backtrace(NULL, tsk);
 229         barrier();
 230 }
 231
 232 #ifdef CONFIG_PREEMPT
 233 #define S_PREEMPT " PREEMPT"
 234 #else
 235 #define S_PREEMPT ""
 236 #endif
 237 #define S_SMP " SMP"
 238
 239 static int __die(const char *str, int err, struct pt_regs *regs)
 240 {
 241         struct task_struct *tsk = current;
 242         static int die_counter;
 243         int ret;
 244
 245         pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
 246                  str, err, ++die_counter);
 247
 248         /* trap and error numbers are mostly meaningless on ARM */
 249         ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
 250         if (ret == NOTIFY_STOP)
 251                 return ret;
 252
 253         print_modules();
 254         __show_regs(regs);
 255         pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
 256                  TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
 257                  end_of_stack(tsk));
 258
 259         if (!user_mode(regs)) {
 260                 dump_mem(KERN_EMERG, "Stack: ", regs->sp,
 261                          THREAD_SIZE + (unsigned long)task_stack_page(tsk));
 262                 dump_backtrace(regs, tsk);
 263                 dump_instr(KERN_EMERG, regs);
 264         }
 265
 266         return ret;
 267 }
 268
 269 static DEFINE_RAW_SPINLOCK(die_lock);
 270
 271 /*
 272  * This function is protected against re-entrancy.
 273  */
 274 void die(const char *str, struct pt_regs *regs, int err)
 275 {
 276         int ret;
 277
 278         oops_enter();
 279
 280         raw_spin_lock_irq(&die_lock);
 281         console_verbose();
 282         bust_spinlocks(1);
 283         ret = __die(str, err, regs);
 284
 285         if (regs && kexec_should_crash(current))
 286                 crash_kexec(regs);
 287
 288         bust_spinlocks(0);
 289         add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
 290         raw_spin_unlock_irq(&die_lock);
 291         oops_exit();
 292
 293         if (in_interrupt())
 294                 panic("Fatal exception in interrupt");
 295         if (panic_on_oops)
 296                 panic("Fatal exception");
 297         if (ret != NOTIFY_STOP)
 298                 do_exit(SIGSEGV);
 299 }
 300
 301 void arm64_notify_die(const char *str, struct pt_regs *regs,
 302                       struct siginfo *info, int err)
 303 {
 304         if (user_mode(regs)) {
 305                 current->thread.fault_address = 0;
 306                 current->thread.fault_code = err;
 307                 force_sig_info(info->si_signo, info, current);
 308         } else {
 309                 die(str, regs, err);
 310         }
 311 }
 312
 313 static LIST_HEAD(undef_hook);
 314 static DEFINE_RAW_SPINLOCK(undef_lock);
 315
 316 void register_undef_hook(struct undef_hook *hook)
 317 {
 318         unsigned long flags;
 319
 320         raw_spin_lock_irqsave(&undef_lock, flags);
 321         list_add(&hook->node, &undef_hook);
 322         raw_spin_unlock_irqrestore(&undef_lock, flags);
 323 }
 324
 325 void unregister_undef_hook(struct undef_hook *hook)
 326 {
 327         unsigned long flags;
 328
 329         raw_spin_lock_irqsave(&undef_lock, flags);
 330         list_del(&hook->node);
 331         raw_spin_unlock_irqrestore(&undef_lock, flags);
 332 }
 333
 334 static int call_undef_hook(struct pt_regs *regs)
 335 {
 336         struct undef_hook *hook;
 337         unsigned long flags;
 338         u32 instr;
 339         int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
 340         void __user *pc = (void __user *)instruction_pointer(regs);
 341
 342         if (!user_mode(regs))
 343                 return 1;
 344
 345         if (compat_thumb_mode(regs)) {
 346                 /* 16-bit Thumb instruction */
 347                 __le16 instr_le;
 348                 if (get_user(instr_le, (__le16 __user *)pc))
 349                         goto exit;
 350                 instr = le16_to_cpu(instr_le);
 351                 if (aarch32_insn_is_wide(instr)) {
 352                         u32 instr2;
 353
 354                         if (get_user(instr_le, (__le16 __user *)(pc + 2)))
 355                                 goto exit;
 356                         instr2 = le16_to_cpu(instr_le);
 357                         instr = (instr << 16) | instr2;
 358                 }
 359         } else {
 360                 /* 32-bit ARM instruction */
 361                 __le32 instr_le;
 362                 if (get_user(instr_le, (__le32 __user *)pc))
 363                         goto exit;
 364                 instr = le32_to_cpu(instr_le);
 365         }
 366
 367         raw_spin_lock_irqsave(&undef_lock, flags);
 368         list_for_each_entry(hook, &undef_hook, node)
 369                 if ((instr & hook->instr_mask) == hook->instr_val &&
 370                         (regs->pstate & hook->pstate_mask) == hook->pstate_val)
 371                         fn = hook->fn;
 372
 373         raw_spin_unlock_irqrestore(&undef_lock, flags);
 374 exit:
 375         return fn ? fn(regs, instr) : 1;
 376 }
 377
 378 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
 379                                 unsigned long address)
 380 {
 381         siginfo_t info;
 382         void __user *pc = (void __user *)instruction_pointer(regs);
 383         const char *desc;
 384
 385         switch (signal) {
 386         case SIGILL:
 387                 desc = "undefined instruction";
 388                 break;
 389         case SIGSEGV:
 390                 desc = "illegal memory access";
 391                 break;
 392         default:
 393                 desc = "bad mode";
 394                 break;
 395         }
 396
 397         if (unhandled_signal(current, signal) &&
 398             show_unhandled_signals_ratelimited()) {
 399                 pr_info("%s[%d]: %s: pc=%p\n",
 400                         current->comm, task_pid_nr(current), desc, pc);
 401                 dump_instr(KERN_INFO, regs);
 402         }
 403
 404         info.si_signo = signal;
 405         info.si_errno = 0;
 406         info.si_code  = code;
 407         info.si_addr  = pc;
 408
 409         arm64_notify_die(desc, regs, &info, 0);
 410 }
 411
 412 /*
 413  * Set up process info to signal segmentation fault - called on access error.
 414  */
 415 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
 416 {
 417         int code;
 418
 419         down_read(&current->mm->mmap_sem);
 420         if (find_vma(current->mm, addr) == NULL)
 421                 code = SEGV_MAPERR;
 422         else
 423                 code = SEGV_ACCERR;
 424         up_read(&current->mm->mmap_sem);
 425
 426         force_signal_inject(SIGSEGV, code, regs, addr);
 427 }
 428
 429 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
 430 {
 431         /* check for AArch32 breakpoint instructions */
 432         if (!aarch32_break_handler(regs))
 433                 return;
 434
 435         if (call_undef_hook(regs) == 0)
 436                 return;
 437
 438         force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 439 }
 440
 441 int cpu_enable_cache_maint_trap(void *__unused)
 442 {
 443         config_sctlr_el1(SCTLR_EL1_UCI, 0);
 444         return 0;
 445 }
 446
 447 #define __user_cache_maint(insn, address, res)                  \
 448         if (address >= user_addr_max()) {                       \
 449                 res = -EFAULT;                                  \
 450         } else {                                                \
 451                 uaccess_ttbr0_enable();                         \
 452                 asm volatile (                                  \
 453                         "1:     " insn ", %1\n"                 \
 454                         "       mov     %w0, #0\n"              \
 455                         "2:\n"                                  \
 456                         "       .pushsection .fixup,\"ax\"\n"   \
 457                         "       .align  2\n"                    \
 458                         "3:     mov     %w0, %w2\n"             \
 459                         "       b       2b\n"                   \
 460                         "       .popsection\n"                  \
 461                         _ASM_EXTABLE(1b, 3b)                    \
 462                         : "=r" (res)                            \
 463                         : "r" (address), "i" (-EFAULT));        \
 464                 uaccess_ttbr0_disable();                        \
 465         }
 466
 467 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
 468 {
 469         unsigned long address;
 470         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 471         int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
 472         int ret = 0;
 473
 474         address = untagged_addr(pt_regs_read_reg(regs, rt));
 475
 476         switch (crm) {
 477         case ESR_ELx_SYS64_ISS_CRM_DC_CVAU:     /* DC CVAU, gets promoted */
 478                 __user_cache_maint("dc civac", address, ret);
 479                 break;
 480         case ESR_ELx_SYS64_ISS_CRM_DC_CVAC:     /* DC CVAC, gets promoted */
 481                 __user_cache_maint("dc civac", address, ret);
 482                 break;
 483         case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC:    /* DC CIVAC */
 484                 __user_cache_maint("dc civac", address, ret);
 485                 break;
 486         case ESR_ELx_SYS64_ISS_CRM_IC_IVAU:     /* IC IVAU */
 487                 __user_cache_maint("ic ivau", address, ret);
 488                 break;
 489         default:
 490                 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 491                 return;
 492         }
 493
 494         if (ret)
 495                 arm64_notify_segfault(regs, address);
 496         else
 497                 regs->pc += 4;
 498 }
 499
 500 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
 501 {
 502         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 503         unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
 504
 505         pt_regs_write_reg(regs, rt, val);
 506
 507         regs->pc += 4;
 508 }
 509
 510 static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
 511 {
 512         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 513
 514         pt_regs_write_reg(regs, rt, arch_counter_get_cntvct());
 515         regs->pc += 4;
 516 }
 517
 518 static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
 519 {
 520         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 521
 522         pt_regs_write_reg(regs, rt, read_sysreg(cntfrq_el0));
 523         regs->pc += 4;
 524 }
 525
 526 struct sys64_hook {
 527         unsigned int esr_mask;
 528         unsigned int esr_val;
 529         void (*handler)(unsigned int esr, struct pt_regs *regs);
 530 };
 531
 532 static struct sys64_hook sys64_hooks[] = {
 533         {
 534                 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
 535                 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
 536                 .handler = user_cache_maint_handler,
 537         },
 538         {
 539                 /* Trap read access to CTR_EL0 */
 540                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 541                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
 542                 .handler = ctr_read_handler,
 543         },
 544         {
 545                 /* Trap read access to CNTVCT_EL0 */
 546                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 547                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
 548                 .handler = cntvct_read_handler,
 549         },
 550         {
 551                 /* Trap read access to CNTFRQ_EL0 */
 552                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 553                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
 554                 .handler = cntfrq_read_handler,
 555         },
 556         {},
 557 };
 558
 559 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
 560 {
 561         struct sys64_hook *hook;
 562
 563         for (hook = sys64_hooks; hook->handler; hook++)
 564                 if ((hook->esr_mask & esr) == hook->esr_val) {
 565                         hook->handler(esr, regs);
 566                         return;
 567                 }
 568
 569         /*
 570          * New SYS instructions may previously have been undefined at EL0. Fall
 571          * back to our usual undefined instruction handler so that we handle
 572          * these consistently.
 573          */
 574         do_undefinstr(regs);
 575 }
 576
 577 long compat_arm_syscall(struct pt_regs *regs);
 578
 579 asmlinkage long do_ni_syscall(struct pt_regs *regs)
 580 {
 581 #ifdef CONFIG_COMPAT
 582         long ret;
 583         if (is_compat_task()) {
 584                 ret = compat_arm_syscall(regs);
 585                 if (ret != -ENOSYS)
 586                         return ret;
 587         }
 588 #endif
 589
 590         if (show_unhandled_signals_ratelimited()) {
 591                 pr_info("%s[%d]: syscall %d\n", current->comm,
 592                         task_pid_nr(current), (int)regs->syscallno);
 593                 dump_instr("", regs);
 594                 if (user_mode(regs))
 595                         __show_regs(regs);
 596         }
 597
 598         return sys_ni_syscall();
 599 }
 600
 601 static const char *esr_class_str[] = {
 602         [0 ... ESR_ELx_EC_MAX]          = "UNRECOGNIZED EC",
 603         [ESR_ELx_EC_UNKNOWN]            = "Unknown/Uncategorized",
 604         [ESR_ELx_EC_WFx]                = "WFI/WFE",
 605         [ESR_ELx_EC_CP15_32]            = "CP15 MCR/MRC",
 606         [ESR_ELx_EC_CP15_64]            = "CP15 MCRR/MRRC",
 607         [ESR_ELx_EC_CP14_MR]            = "CP14 MCR/MRC",
 608         [ESR_ELx_EC_CP14_LS]            = "CP14 LDC/STC",
 609         [ESR_ELx_EC_FP_ASIMD]           = "ASIMD",
 610         [ESR_ELx_EC_CP10_ID]            = "CP10 MRC/VMRS",
 611         [ESR_ELx_EC_CP14_64]            = "CP14 MCRR/MRRC",
 612         [ESR_ELx_EC_ILL]                = "PSTATE.IL",
 613         [ESR_ELx_EC_SVC32]              = "SVC (AArch32)",
 614         [ESR_ELx_EC_HVC32]              = "HVC (AArch32)",
 615         [ESR_ELx_EC_SMC32]              = "SMC (AArch32)",
 616         [ESR_ELx_EC_SVC64]              = "SVC (AArch64)",
 617         [ESR_ELx_EC_HVC64]              = "HVC (AArch64)",
 618         [ESR_ELx_EC_SMC64]              = "SMC (AArch64)",
 619         [ESR_ELx_EC_SYS64]              = "MSR/MRS (AArch64)",
 620         [ESR_ELx_EC_IMP_DEF]            = "EL3 IMP DEF",
 621         [ESR_ELx_EC_IABT_LOW]           = "IABT (lower EL)",
 622         [ESR_ELx_EC_IABT_CUR]           = "IABT (current EL)",
 623         [ESR_ELx_EC_PC_ALIGN]           = "PC Alignment",
 624         [ESR_ELx_EC_DABT_LOW]           = "DABT (lower EL)",
 625         [ESR_ELx_EC_DABT_CUR]           = "DABT (current EL)",
 626         [ESR_ELx_EC_SP_ALIGN]           = "SP Alignment",
 627         [ESR_ELx_EC_FP_EXC32]           = "FP (AArch32)",
 628         [ESR_ELx_EC_FP_EXC64]           = "FP (AArch64)",
 629         [ESR_ELx_EC_SERROR]             = "SError",
 630         [ESR_ELx_EC_BREAKPT_LOW]        = "Breakpoint (lower EL)",
 631         [ESR_ELx_EC_BREAKPT_CUR]        = "Breakpoint (current EL)",
 632         [ESR_ELx_EC_SOFTSTP_LOW]        = "Software Step (lower EL)",
 633         [ESR_ELx_EC_SOFTSTP_CUR]        = "Software Step (current EL)",
 634         [ESR_ELx_EC_WATCHPT_LOW]        = "Watchpoint (lower EL)",
 635         [ESR_ELx_EC_WATCHPT_CUR]        = "Watchpoint (current EL)",
 636         [ESR_ELx_EC_BKPT32]             = "BKPT (AArch32)",
 637         [ESR_ELx_EC_VECTOR32]           = "Vector catch (AArch32)",
 638         [ESR_ELx_EC_BRK64]              = "BRK (AArch64)",
 639 };
 640
 641 const char *esr_get_class_string(u32 esr)
 642 {
 643         return esr_class_str[ESR_ELx_EC(esr)];
 644 }
 645
 646 /*
 647  * bad_mode handles the impossible case in the exception vector. This is always
 648  * fatal.
 649  */
 650 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
 651 {
 652         console_verbose();
 653
 654         pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
 655                 handler[reason], smp_processor_id(), esr,
 656                 esr_get_class_string(esr));
 657
 658         die("Oops - bad mode", regs, 0);
 659         local_irq_disable();
 660         panic("bad mode");
 661 }
 662
 663 /*
 664  * bad_el0_sync handles unexpected, but potentially recoverable synchronous
 665  * exceptions taken from EL0. Unlike bad_mode, this returns.
 666  */
 667 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
 668 {
 669         siginfo_t info;
 670         void __user *pc = (void __user *)instruction_pointer(regs);
 671         console_verbose();
 672
 673         pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
 674                 smp_processor_id(), esr, esr_get_class_string(esr));
 675         __show_regs(regs);
 676
 677         info.si_signo = SIGILL;
 678         info.si_errno = 0;
 679         info.si_code  = ILL_ILLOPC;
 680         info.si_addr  = pc;
 681
 682         current->thread.fault_address = 0;
 683         current->thread.fault_code = 0;
 684
 685         force_sig_info(info.si_signo, &info, current);
 686 }
 687
 688 void __pte_error(const char *file, int line, unsigned long val)
 689 {
 690         pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
 691 }
 692
 693 void __pmd_error(const char *file, int line, unsigned long val)
 694 {
 695         pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
 696 }
 697
 698 void __pud_error(const char *file, int line, unsigned long val)
 699 {
 700         pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
 701 }
 702
 703 void __pgd_error(const char *file, int line, unsigned long val)
 704 {
 705         pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
 706 }
 707
 708 /* GENERIC_BUG traps */
 709
 710 int is_valid_bugaddr(unsigned long addr)
 711 {
 712         /*
 713          * bug_handler() only called for BRK #BUG_BRK_IMM.
 714          * So the answer is trivial -- any spurious instances with no
 715          * bug table entry will be rejected by report_bug() and passed
 716          * back to the debug-monitors code and handled as a fatal
 717          * unexpected debug exception.
 718          */
 719         return 1;
 720 }
 721
 722 static int bug_handler(struct pt_regs *regs, unsigned int esr)
 723 {
 724         if (user_mode(regs))
 725                 return DBG_HOOK_ERROR;
 726
 727         switch (report_bug(regs->pc, regs)) {
 728         case BUG_TRAP_TYPE_BUG:
 729                 die("Oops - BUG", regs, 0);
 730                 break;
 731
 732         case BUG_TRAP_TYPE_WARN:
 733                 break;
 734
 735         default:
 736                 /* unknown/unrecognised bug trap type */
 737                 return DBG_HOOK_ERROR;
 738         }
 739
 740         /* If thread survives, skip over the BUG instruction and continue: */
 741         regs->pc += AARCH64_INSN_SIZE;  /* skip BRK and resume */
 742         return DBG_HOOK_HANDLED;
 743 }
 744
 745 static struct break_hook bug_break_hook = {
 746         .esr_val = 0xf2000000 | BUG_BRK_IMM,
 747         .esr_mask = 0xffffffff,
 748         .fn = bug_handler,
 749 };
 750
 751 /*
 752  * Initial handler for AArch64 BRK exceptions
 753  * This handler only used until debug_traps_init().
 754  */
 755 int __init early_brk64(unsigned long addr, unsigned int esr,
 756                 struct pt_regs *regs)
 757 {
 758         return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
 759 }
 760
 761 /* This registration must happen early, before debug_traps_init(). */
 762 void __init trap_init(void)
 763 {
 764         register_break_hook(&bug_break_hook);
 765 }