2 * Favr-32 board-specific setup code.
4 * Copyright (C) 2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/clk.h>
11 #include <linux/etherdevice.h>
12 #include <linux/bootmem.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/types.h>
17 #include <linux/linkage.h>
18 #include <linux/gpio.h>
19 #include <linux/leds.h>
20 #include <linux/atmel-mci.h>
21 #include <linux/atmel-pwm-bl.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/ads7846.h>
25 #include <video/atmel_lcdc.h>
27 #include <asm/setup.h>
29 #include <mach/at32ap700x.h>
30 #include <mach/init.h>
31 #include <mach/board.h>
32 #include <mach/portmux.h>
34 /* Oscillator frequencies. These are board-specific */
35 unsigned long at32_board_osc_rates[3] = {
36 [0] = 32768, /* 32.768 kHz on RTC osc */
37 [1] = 20000000, /* 20 MHz on osc0 */
38 [2] = 12000000, /* 12 MHz on osc1 */
41 /* Initialized by bootloader-specific startup code. */
42 struct tag *bootloader_tags __initdata;
47 static struct eth_addr __initdata hw_addr[1];
48 static struct eth_platform_data __initdata eth_data[1] = {
50 .phy_mask = ~(1U << 1),
54 static int ads7843_get_pendown_state(void)
56 return !gpio_get_value(GPIO_PIN_PB(3));
59 static struct ads7846_platform_data ads7843_data = {
61 .get_pendown_state = ads7843_get_pendown_state,
64 * Values below are for debounce filtering, these can be experimented
72 static struct spi_board_info __initdata spi1_board_info[] = {
74 /* ADS7843 touch controller */
75 .modalias = "ads7846",
76 .max_speed_hz = 2000000,
79 .platform_data = &ads7843_data,
83 static struct mci_platform_data __initdata mci0_data = {
86 .detect_pin = -ENODEV,
91 static struct fb_videomode __initdata lb104v03_modes[] = {
93 .name = "640x480 @ 50",
95 .xres = 640, .yres = 480,
96 .pixclock = KHZ2PICOS(25100),
98 .left_margin = 90, .right_margin = 70,
99 .upper_margin = 30, .lower_margin = 15,
100 .hsync_len = 12, .vsync_len = 2,
103 .vmode = FB_VMODE_NONINTERLACED,
107 static struct fb_monspecs __initdata favr32_default_monspecs = {
108 .manufacturer = "LG",
109 .monitor = "LB104V03",
110 .modedb = lb104v03_modes,
111 .modedb_len = ARRAY_SIZE(lb104v03_modes),
119 struct atmel_lcdfb_info __initdata favr32_lcdc_data = {
121 .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
122 .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
123 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
124 | ATMEL_LCDC_MEMOR_BIG),
125 .default_monspecs = &favr32_default_monspecs,
129 static struct gpio_led favr32_leds[] = {
132 .gpio = GPIO_PIN_PE(19),
133 .default_trigger = "heartbeat",
138 .gpio = GPIO_PIN_PE(20),
143 static struct gpio_led_platform_data favr32_led_data = {
144 .num_leds = ARRAY_SIZE(favr32_leds),
148 static struct platform_device favr32_led_dev = {
152 .platform_data = &favr32_led_data,
157 * The next two functions should go away as the boot loader is
158 * supposed to initialize the macb address registers with a valid
159 * ethernet address. But we need to keep it around for a while until
160 * we can be reasonably sure the boot loader does this.
162 * The phy_id is ignored as the driver will probe for it.
164 static int __init parse_tag_ethernet(struct tag *tag)
168 i = tag->u.ethernet.mac_index;
169 if (i < ARRAY_SIZE(hw_addr))
170 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
171 sizeof(hw_addr[i].addr));
175 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
177 static void __init set_hw_addr(struct platform_device *pdev)
179 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
186 if (pdev->id >= ARRAY_SIZE(hw_addr))
189 addr = hw_addr[pdev->id].addr;
190 if (!is_valid_ether_addr(addr))
194 * Since this is board-specific code, we'll cheat and use the
195 * physical address directly as we happen to know that it's
196 * the same as the virtual address.
198 regs = (void __iomem __force *)res->start;
199 pclk = clk_get(&pdev->dev, "pclk");
204 __raw_writel((addr[3] << 24) | (addr[2] << 16)
205 | (addr[1] << 8) | addr[0], regs + 0x98);
206 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
211 void __init favr32_setup_leds(void)
215 for (i = 0; i < ARRAY_SIZE(favr32_leds); i++)
216 at32_select_gpio(favr32_leds[i].gpio, AT32_GPIOF_OUTPUT);
218 platform_device_register(&favr32_led_dev);
221 static struct atmel_pwm_bl_platform_data atmel_pwm_bl_pdata = {
223 .pwm_frequency = 200000,
224 .pwm_compare_max = 345,
228 .gpio_on = GPIO_PIN_PA(28),
232 static struct platform_device atmel_pwm_bl_dev = {
233 .name = "atmel-pwm-bl",
236 .platform_data = &atmel_pwm_bl_pdata,
240 static void __init favr32_setup_atmel_pwm_bl(void)
242 platform_device_register(&atmel_pwm_bl_dev);
243 at32_select_gpio(atmel_pwm_bl_pdata.gpio_on, 0);
246 void __init setup_board(void)
248 at32_map_usart(3, 0); /* USART 3 => /dev/ttyS0 */
249 at32_setup_serial_console(0);
252 static int __init set_abdac_rate(struct platform_device *pdev)
262 osc1 = clk_get(NULL, "osc1");
264 retval = PTR_ERR(osc1);
268 pll1 = clk_get(NULL, "pll1");
270 retval = PTR_ERR(pll1);
274 abdac = clk_get(&pdev->dev, "sample_clk");
276 retval = PTR_ERR(abdac);
280 retval = clk_set_parent(pll1, osc1);
285 * Rate is 32000 to 50000 and ABDAC oversamples 256x. Multiply, in
286 * power of 2, to a value above 80 MHz. Power of 2 so it is possible
287 * for the generic clock to divide it down again and 80 MHz is the
288 * lowest frequency for the PLL.
290 retval = clk_round_rate(pll1,
291 CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16);
295 retval = clk_set_rate(pll1, retval);
299 retval = clk_set_parent(abdac, pll1);
313 static int __init favr32_init(void)
316 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
317 * pins so that nobody messes with them.
319 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
321 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
323 at32_add_device_usart(0);
325 set_hw_addr(at32_add_device_eth(0, ð_data[0]));
327 spi1_board_info[0].irq = gpio_to_irq(GPIO_PIN_PB(3));
329 set_abdac_rate(at32_add_device_abdac(0));
331 at32_add_device_pwm(1 << atmel_pwm_bl_pdata.pwm_channel);
332 at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
333 at32_add_device_mci(0, &mci0_data);
334 at32_add_device_usba(0, NULL);
335 at32_add_device_lcdc(0, &favr32_lcdc_data, fbmem_start, fbmem_size, 0);
339 favr32_setup_atmel_pwm_bl();
343 postcore_initcall(favr32_init);