2 * Blackfin low-level cache routines
4 * Copyright 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
9 #ifndef _BLACKFIN_CACHEFLUSH_H
10 #define _BLACKFIN_CACHEFLUSH_H
12 #include <asm/blackfin.h> /* for SSYNC() */
13 #include <asm/sections.h> /* for _ramend */
15 extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
16 extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
17 extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
18 extern void blackfin_dflush_page(void *page);
19 extern void blackfin_invalidate_entire_dcache(void);
20 extern void blackfin_invalidate_entire_icache(void);
22 #define flush_dcache_mmap_lock(mapping) do { } while (0)
23 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
24 #define flush_cache_mm(mm) do { } while (0)
25 #define flush_cache_range(vma, start, end) do { } while (0)
26 #define flush_cache_page(vma, vmaddr) do { } while (0)
27 #define flush_cache_vmap(start, end) do { } while (0)
28 #define flush_cache_vunmap(start, end) do { } while (0)
31 #define flush_icache_range_others(start, end) \
32 smp_icache_flush_range_others((start), (end))
34 #define flush_icache_range_others(start, end) do { } while (0)
37 static inline void flush_icache_range(unsigned start, unsigned end)
39 #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
40 blackfin_dcache_flush_range(start, end);
43 /* Make sure all write buffers in the data side of the core
44 * are flushed before trying to invalidate the icache. This
45 * needs to be after the data flush and before the icache
46 * flush so that the SSYNC does the right thing in preventing
47 * the instruction prefetcher from hitting things in cached
48 * memory at the wrong time -- it runs much further ahead than
52 #if defined(CONFIG_BFIN_ICACHE)
53 blackfin_icache_flush_range(start, end);
54 flush_icache_range_others(start, end);
58 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
59 do { memcpy(dst, src, len); \
60 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
63 #define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len)
65 #if defined(CONFIG_BFIN_DCACHE)
66 # define invalidate_dcache_range(start,end) blackfin_dcache_invalidate_range((start), (end))
68 # define invalidate_dcache_range(start,end) do { } while (0)
70 #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
71 # define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end))
72 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
73 # define flush_dcache_page(page) blackfin_dflush_page(page_address(page))
75 # define flush_dcache_range(start,end) do { } while (0)
76 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
77 # define flush_dcache_page(page) do { } while (0)
80 extern unsigned long reserved_mem_dcache_on;
81 extern unsigned long reserved_mem_icache_on;
83 static inline int bfin_addr_dcacheable(unsigned long addr)
85 #ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE
86 if (addr < (_ramend - DMA_UNCACHED_REGION))
90 if (reserved_mem_dcache_on &&
91 addr >= _ramend && addr < physical_mem_end)
94 #ifdef CONFIG_BFIN_L2_DCACHEABLE
95 if (addr >= L2_START && addr < L2_START + L2_LENGTH)
102 #endif /* _BLACKFIN_ICACHEFLUSH_H */