2 * Copyright 2004-2009 Analog Devices Inc.
4 * Licensed under the GPL-2 or later.
7 #ifndef __BLACKFIN_MMU_CONTEXT_H__
8 #define __BLACKFIN_MMU_CONTEXT_H__
10 #include <linux/slab.h>
11 #include <linux/sched.h>
12 #include <asm/setup.h>
14 #include <asm/pgalloc.h>
15 #include <asm/cplbinit.h>
16 #include <asm/sections.h>
18 /* Note: L1 stacks are CPU-private things, so we bluntly disable this
19 feature in SMP mode, and use the per-CPU scratch SRAM bank only to
20 store the PDA instead. */
22 extern void *current_l1_stack_save;
23 extern int nr_l1stack_tasks;
24 extern void *l1_stack_base;
25 extern unsigned long l1_stack_len;
27 extern int l1sram_free(const void*);
28 extern void *l1sram_alloc_max(void*);
30 static inline void free_l1stack(void)
33 if (nr_l1stack_tasks == 0)
34 l1sram_free(l1_stack_base);
37 static inline unsigned long
38 alloc_l1stack(unsigned long length, unsigned long *stack_base)
40 if (nr_l1stack_tasks == 0) {
41 l1_stack_base = l1sram_alloc_max(&l1_stack_len);
46 if (l1_stack_len < length) {
47 if (nr_l1stack_tasks == 0)
48 l1sram_free(l1_stack_base);
51 *stack_base = (unsigned long)l1_stack_base;
57 activate_l1stack(struct mm_struct *mm, unsigned long sp_base)
59 if (current_l1_stack_save)
60 memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len);
61 mm->context.l1_stack_save = current_l1_stack_save = (void*)sp_base;
62 memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len);
66 #define deactivate_mm(tsk,mm) do { } while (0)
68 #define activate_mm(prev, next) switch_mm(prev, next, NULL)
70 static inline void __switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,
71 struct task_struct *tsk)
74 unsigned int cpu = smp_processor_id();
76 if (prev_mm == next_mm)
79 if (prev_mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
80 flush_switched_cplbs(cpu);
81 set_mask_dcplbs(next_mm->context.page_rwx_mask, cpu);
85 #ifdef CONFIG_APP_STACK_L1
86 /* L1 stack switching. */
87 if (!next_mm->context.l1_stack_save)
89 if (next_mm->context.l1_stack_save == current_l1_stack_save)
91 if (current_l1_stack_save) {
92 memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len);
94 current_l1_stack_save = next_mm->context.l1_stack_save;
95 memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len);
100 #define lock_mm_switch(flags) flags = hard_local_irq_save_cond()
101 #define unlock_mm_switch(flags) hard_local_irq_restore_cond(flags)
103 #define lock_mm_switch(flags) do { (void)(flags); } while (0)
104 #define unlock_mm_switch(flags) do { (void)(flags); } while (0)
105 #endif /* CONFIG_IPIPE */
108 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
109 struct task_struct *tsk)
112 lock_mm_switch(flags);
113 __switch_mm(prev, next, tsk);
114 unlock_mm_switch(flags);
117 static inline void protect_page(struct mm_struct *mm, unsigned long addr,
120 unsigned long *mask = mm->context.page_rwx_mask;
125 if (unlikely(addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE))
126 page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> 12;
130 bit = 1 << (page & 31);
136 mask += page_mask_nelts;
137 if (flags & VM_WRITE)
141 mask += page_mask_nelts;
148 static inline void update_protections(struct mm_struct *mm)
150 unsigned int cpu = smp_processor_id();
151 if (mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
152 flush_switched_cplbs(cpu);
153 set_mask_dcplbs(mm->context.page_rwx_mask, cpu);
156 #else /* !CONFIG_MPU */
157 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
158 struct task_struct *tsk)
160 __switch_mm(prev, next, tsk);
164 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
168 /* Called when creating a new context during fork() or execve(). */
170 init_new_context(struct task_struct *tsk, struct mm_struct *mm)
173 unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order);
174 mm->context.page_rwx_mask = (unsigned long *)p;
175 memset(mm->context.page_rwx_mask, 0,
176 page_mask_nelts * 3 * sizeof(long));
181 static inline void destroy_context(struct mm_struct *mm)
183 struct sram_list_struct *tmp;
185 unsigned int cpu = smp_processor_id();
188 #ifdef CONFIG_APP_STACK_L1
189 if (current_l1_stack_save == mm->context.l1_stack_save)
190 current_l1_stack_save = 0;
191 if (mm->context.l1_stack_save)
195 while ((tmp = mm->context.sram_list)) {
196 mm->context.sram_list = tmp->next;
197 sram_free(tmp->addr);
201 if (current_rwx_mask[cpu] == mm->context.page_rwx_mask)
202 current_rwx_mask[cpu] = NULL;
203 free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order);
207 #define ipipe_mm_switch_protect(flags) \
208 flags = hard_local_irq_save_cond()
210 #define ipipe_mm_switch_unprotect(flags) \
211 hard_local_irq_restore_cond(flags)