2 * File: include/asm/system.h
4 * Author: Tony Kou (tonyko@lineo.ca)
5 * Copyright (c) 2002 Arcturus Networks Inc.
6 * (www.arcturusnetworks.com)
7 * Copyright (c) 2003 Metrowerks (www.metrowerks.com)
8 * Copyright (c) 2004 Analog Device Inc.
9 * Created: 25Jan2001 - Tony Kou
10 * Description: system.h include file
12 * Modified: 22Sep2006 - Robin Getz
13 * - move include blackfin.h down, so I can get access to
14 * irq functions in other include files.
16 * Bugs: Enter bugs at http://blackfin.uclinux.org/
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; see the file COPYING.
30 * If not, write to the Free Software Foundation,
31 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34 #ifndef _BLACKFIN_SYSTEM_H
35 #define _BLACKFIN_SYSTEM_H
37 #include <linux/linkage.h>
38 #include <linux/compiler.h>
39 #include <mach/anomaly.h>
41 #include <asm/processor.h>
45 * Force strict CPU ordering.
47 #define nop() asm volatile ("nop;\n\t"::)
48 #define mb() asm volatile ("" : : :"memory")
49 #define rmb() asm volatile ("" : : :"memory")
50 #define wmb() asm volatile ("" : : :"memory")
51 #define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
52 #define read_barrier_depends() do { } while(0)
55 asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
56 asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
57 asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
58 asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
59 unsigned long new, unsigned long old);
60 asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
61 unsigned long new, unsigned long old);
62 asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
63 unsigned long new, unsigned long old);
65 #ifdef __ARCH_SYNC_CORE_DCACHE
66 # define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
67 # define smp_rmb() do { barrier(); smp_check_barrier(); } while (0)
68 # define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0)
70 # define smp_mb() barrier()
71 # define smp_rmb() barrier()
72 # define smp_wmb() barrier()
75 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
82 tmp = __raw_xchg_1_asm(ptr, x);
85 tmp = __raw_xchg_2_asm(ptr, x);
88 tmp = __raw_xchg_4_asm(ptr, x);
96 * Atomic compare and exchange. Compare OLD with MEM, if identical,
97 * store NEW in MEM. Return the initial value in MEM. Success is
98 * indicated by comparing RETURN with OLD.
100 static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
101 unsigned long new, int size)
107 tmp = __raw_cmpxchg_1_asm(ptr, new, old);
110 tmp = __raw_cmpxchg_2_asm(ptr, new, old);
113 tmp = __raw_cmpxchg_4_asm(ptr, new, old);
119 #define cmpxchg(ptr, o, n) \
120 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
121 (unsigned long)(n), sizeof(*(ptr))))
123 #define smp_read_barrier_depends() smp_check_barrier()
125 #else /* !CONFIG_SMP */
127 #define smp_mb() barrier()
128 #define smp_rmb() barrier()
129 #define smp_wmb() barrier()
130 #define smp_read_barrier_depends() do { } while(0)
132 struct __xchg_dummy {
133 unsigned long a[100];
135 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
137 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
140 unsigned long tmp = 0;
141 unsigned long flags = 0;
143 local_irq_save(flags);
150 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
156 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
162 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
165 local_irq_restore(flags);
169 #include <asm-generic/cmpxchg-local.h>
172 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
175 #define cmpxchg_local(ptr, o, n) \
176 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
177 (unsigned long)(n), sizeof(*(ptr))))
178 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
180 #include <asm-generic/cmpxchg.h>
182 #endif /* !CONFIG_SMP */
184 #define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
185 #define tas(ptr) ((void)xchg((ptr), 1))
187 #define prepare_to_switch() do { } while(0)
190 * switch_to(n) should switch tasks to task ptr, first checking that
191 * ptr isn't the current task, in which case it does nothing.
194 #include <asm/l1layout.h>
196 asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
198 #define switch_to(prev,next,last) \
200 memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
201 sizeof *L1_SCRATCH_TASK_INFO); \
202 memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
203 sizeof *L1_SCRATCH_TASK_INFO); \
204 (last) = resume (prev, next); \
207 #endif /* _BLACKFIN_SYSTEM_H */