2 * GPIO Abstraction Layer
4 * Copyright 2006-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later
9 #include <linux/delay.h>
10 #include <linux/module.h>
11 #include <linux/err.h>
12 #include <linux/proc_fs.h>
13 #include <asm/blackfin.h>
15 #include <asm/portmux.h>
16 #include <linux/irq.h>
18 #if ANOMALY_05000311 || ANOMALY_05000323
21 AWA_data_clear = SYSCR,
24 AWA_maska = BFIN_UART_SCR,
25 AWA_maska_clear = BFIN_UART_SCR,
26 AWA_maska_set = BFIN_UART_SCR,
27 AWA_maska_toggle = BFIN_UART_SCR,
28 AWA_maskb = BFIN_UART_GCTL,
29 AWA_maskb_clear = BFIN_UART_GCTL,
30 AWA_maskb_set = BFIN_UART_GCTL,
31 AWA_maskb_toggle = BFIN_UART_GCTL,
32 AWA_dir = SPORT1_STAT,
33 AWA_polar = SPORT1_STAT,
34 AWA_edge = SPORT1_STAT,
35 AWA_both = SPORT1_STAT,
37 AWA_inen = TIMER_ENABLE,
38 #elif ANOMALY_05000323
39 AWA_inen = DMA1_1_CONFIG,
42 /* Anomaly Workaround */
43 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
45 #define AWA_DUMMY_READ(...) do { } while (0)
48 static struct gpio_port_t * const gpio_array[] = {
49 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
50 (struct gpio_port_t *) FIO_FLAG_D,
51 #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
52 (struct gpio_port_t *) PORTFIO,
53 (struct gpio_port_t *) PORTGIO,
54 (struct gpio_port_t *) PORTHIO,
55 #elif defined(BF561_FAMILY)
56 (struct gpio_port_t *) FIO0_FLAG_D,
57 (struct gpio_port_t *) FIO1_FLAG_D,
58 (struct gpio_port_t *) FIO2_FLAG_D,
59 #elif defined(CONFIG_BF54x)
60 (struct gpio_port_t *)PORTA_FER,
61 (struct gpio_port_t *)PORTB_FER,
62 (struct gpio_port_t *)PORTC_FER,
63 (struct gpio_port_t *)PORTD_FER,
64 (struct gpio_port_t *)PORTE_FER,
65 (struct gpio_port_t *)PORTF_FER,
66 (struct gpio_port_t *)PORTG_FER,
67 (struct gpio_port_t *)PORTH_FER,
68 (struct gpio_port_t *)PORTI_FER,
69 (struct gpio_port_t *)PORTJ_FER,
71 # error no gpio arrays defined
75 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
76 static unsigned short * const port_fer[] = {
77 (unsigned short *) PORTF_FER,
78 (unsigned short *) PORTG_FER,
79 (unsigned short *) PORTH_FER,
82 # if !defined(BF537_FAMILY)
83 static unsigned short * const port_mux[] = {
84 (unsigned short *) PORTF_MUX,
85 (unsigned short *) PORTG_MUX,
86 (unsigned short *) PORTH_MUX,
90 u8 pmux_offset[][16] = {
91 # if defined(CONFIG_BF52x)
92 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
93 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
94 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
95 # elif defined(CONFIG_BF51x)
96 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
97 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
98 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
103 #elif defined(BF538_FAMILY)
104 static unsigned short * const port_fer[] = {
105 (unsigned short *) PORTCIO_FER,
106 (unsigned short *) PORTDIO_FER,
107 (unsigned short *) PORTEIO_FER,
111 #define RESOURCE_LABEL_SIZE 16
113 static struct str_ident {
114 char name[RESOURCE_LABEL_SIZE];
115 } str_ident[MAX_RESOURCES];
117 #if defined(CONFIG_PM)
118 static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
121 static void gpio_error(unsigned gpio)
123 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
126 static void set_label(unsigned short ident, const char *label)
129 strncpy(str_ident[ident].name, label,
130 RESOURCE_LABEL_SIZE);
131 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
135 static char *get_label(unsigned short ident)
137 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
140 static int cmp_label(unsigned short ident, const char *label)
144 printk(KERN_ERR "Please provide none-null label\n");
148 return strcmp(str_ident[ident].name, label);
153 #define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
154 #define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
155 #define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
156 #define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
157 #define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
159 DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
160 DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE));
161 DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM);
163 inline int check_gpio(unsigned gpio)
165 #if defined(CONFIG_BF54x)
166 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
167 || gpio == GPIO_PH14 || gpio == GPIO_PH15
168 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
171 if (gpio >= MAX_BLACKFIN_GPIOS)
176 static void port_setup(unsigned gpio, unsigned short usage)
178 #if defined(BF538_FAMILY)
180 * BF538/9 Port C,D and E are special.
181 * Inverted PORT_FER polarity on CDE and no PORF_FER on F
182 * Regular PORT F GPIOs are handled here, CDE are exclusively
186 if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
189 gpio -= MAX_BLACKFIN_GPIOS;
191 if (usage == GPIO_USAGE)
192 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
194 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
199 if (check_gpio(gpio))
202 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
203 if (usage == GPIO_USAGE)
204 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
206 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
208 #elif defined(CONFIG_BF54x)
209 if (usage == GPIO_USAGE)
210 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
212 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
220 unsigned short offset;
222 {.res = P_PPI0_D13, .offset = 11},
223 {.res = P_PPI0_D14, .offset = 11},
224 {.res = P_PPI0_D15, .offset = 11},
225 {.res = P_SPORT1_TFS, .offset = 11},
226 {.res = P_SPORT1_TSCLK, .offset = 11},
227 {.res = P_SPORT1_DTPRI, .offset = 11},
228 {.res = P_PPI0_D10, .offset = 10},
229 {.res = P_PPI0_D11, .offset = 10},
230 {.res = P_PPI0_D12, .offset = 10},
231 {.res = P_SPORT1_RSCLK, .offset = 10},
232 {.res = P_SPORT1_RFS, .offset = 10},
233 {.res = P_SPORT1_DRPRI, .offset = 10},
234 {.res = P_PPI0_D8, .offset = 9},
235 {.res = P_PPI0_D9, .offset = 9},
236 {.res = P_SPORT1_DRSEC, .offset = 9},
237 {.res = P_SPORT1_DTSEC, .offset = 9},
238 {.res = P_TMR2, .offset = 8},
239 {.res = P_PPI0_FS3, .offset = 8},
240 {.res = P_TMR3, .offset = 7},
241 {.res = P_SPI0_SSEL4, .offset = 7},
242 {.res = P_TMR4, .offset = 6},
243 {.res = P_SPI0_SSEL5, .offset = 6},
244 {.res = P_TMR5, .offset = 5},
245 {.res = P_SPI0_SSEL6, .offset = 5},
246 {.res = P_UART1_RX, .offset = 4},
247 {.res = P_UART1_TX, .offset = 4},
248 {.res = P_TMR6, .offset = 4},
249 {.res = P_TMR7, .offset = 4},
250 {.res = P_UART0_RX, .offset = 3},
251 {.res = P_UART0_TX, .offset = 3},
252 {.res = P_DMAR0, .offset = 3},
253 {.res = P_DMAR1, .offset = 3},
254 {.res = P_SPORT0_DTSEC, .offset = 1},
255 {.res = P_SPORT0_DRSEC, .offset = 1},
256 {.res = P_CAN0_RX, .offset = 1},
257 {.res = P_CAN0_TX, .offset = 1},
258 {.res = P_SPI0_SSEL7, .offset = 1},
259 {.res = P_SPORT0_TFS, .offset = 0},
260 {.res = P_SPORT0_DTPRI, .offset = 0},
261 {.res = P_SPI0_SSEL2, .offset = 0},
262 {.res = P_SPI0_SSEL3, .offset = 0},
265 static void portmux_setup(unsigned short per)
267 u16 y, offset, muxreg;
268 u16 function = P_FUNCT2MUX(per);
270 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
271 if (port_mux_lut[y].res == per) {
273 /* SET PORTMUX REG */
275 offset = port_mux_lut[y].offset;
276 muxreg = bfin_read_PORT_MUX();
279 muxreg &= ~(1 << offset);
283 muxreg |= (function << offset);
284 bfin_write_PORT_MUX(muxreg);
288 #elif defined(CONFIG_BF54x)
289 inline void portmux_setup(unsigned short per)
292 u16 ident = P_IDENT(per);
293 u16 function = P_FUNCT2MUX(per);
295 pmux = gpio_array[gpio_bank(ident)]->port_mux;
297 pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
298 pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
300 gpio_array[gpio_bank(ident)]->port_mux = pmux;
303 inline u16 get_portmux(unsigned short per)
306 u16 ident = P_IDENT(per);
308 pmux = gpio_array[gpio_bank(ident)]->port_mux;
310 return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
312 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
313 inline void portmux_setup(unsigned short per)
315 u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
316 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
318 pmux = *port_mux[gpio_bank(ident)];
319 pmux &= ~(3 << offset);
320 pmux |= (function & 3) << offset;
321 *port_mux[gpio_bank(ident)] = pmux;
325 # define portmux_setup(...) do { } while (0)
329 /***********************************************************
331 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
334 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
337 * DESCRIPTION: These functions abstract direct register access
338 * to Blackfin processor General Purpose
341 * CAUTION: These functions do not belong to the GPIO Driver API
342 *************************************************************
343 * MODIFICATION HISTORY :
344 **************************************************************/
346 /* Set a specific bit */
348 #define SET_GPIO(name) \
349 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
351 unsigned long flags; \
352 local_irq_save_hw(flags); \
354 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
356 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
357 AWA_DUMMY_READ(name); \
358 local_irq_restore_hw(flags); \
360 EXPORT_SYMBOL(set_gpio_ ## name);
362 SET_GPIO(dir) /* set_gpio_dir() */
363 SET_GPIO(inen) /* set_gpio_inen() */
364 SET_GPIO(polar) /* set_gpio_polar() */
365 SET_GPIO(edge) /* set_gpio_edge() */
366 SET_GPIO(both) /* set_gpio_both() */
369 #define SET_GPIO_SC(name) \
370 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
372 unsigned long flags; \
373 if (ANOMALY_05000311 || ANOMALY_05000323) \
374 local_irq_save_hw(flags); \
376 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
378 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
379 if (ANOMALY_05000311 || ANOMALY_05000323) { \
380 AWA_DUMMY_READ(name); \
381 local_irq_restore_hw(flags); \
384 EXPORT_SYMBOL(set_gpio_ ## name);
390 void set_gpio_toggle(unsigned gpio)
393 if (ANOMALY_05000311 || ANOMALY_05000323)
394 local_irq_save_hw(flags);
395 gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
396 if (ANOMALY_05000311 || ANOMALY_05000323) {
397 AWA_DUMMY_READ(toggle);
398 local_irq_restore_hw(flags);
401 EXPORT_SYMBOL(set_gpio_toggle);
404 /*Set current PORT date (16-bit word)*/
406 #define SET_GPIO_P(name) \
407 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
409 unsigned long flags; \
410 if (ANOMALY_05000311 || ANOMALY_05000323) \
411 local_irq_save_hw(flags); \
412 gpio_array[gpio_bank(gpio)]->name = arg; \
413 if (ANOMALY_05000311 || ANOMALY_05000323) { \
414 AWA_DUMMY_READ(name); \
415 local_irq_restore_hw(flags); \
418 EXPORT_SYMBOL(set_gpiop_ ## name);
429 /* Get a specific bit */
430 #define GET_GPIO(name) \
431 unsigned short get_gpio_ ## name(unsigned gpio) \
433 unsigned long flags; \
434 unsigned short ret; \
435 if (ANOMALY_05000311 || ANOMALY_05000323) \
436 local_irq_save_hw(flags); \
437 ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
438 if (ANOMALY_05000311 || ANOMALY_05000323) { \
439 AWA_DUMMY_READ(name); \
440 local_irq_restore_hw(flags); \
444 EXPORT_SYMBOL(get_gpio_ ## name);
455 /*Get current PORT date (16-bit word)*/
457 #define GET_GPIO_P(name) \
458 unsigned short get_gpiop_ ## name(unsigned gpio) \
460 unsigned long flags; \
461 unsigned short ret; \
462 if (ANOMALY_05000311 || ANOMALY_05000323) \
463 local_irq_save_hw(flags); \
464 ret = (gpio_array[gpio_bank(gpio)]->name); \
465 if (ANOMALY_05000311 || ANOMALY_05000323) { \
466 AWA_DUMMY_READ(name); \
467 local_irq_restore_hw(flags); \
471 EXPORT_SYMBOL(get_gpiop_ ## name);
484 DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM);
486 static const unsigned int sic_iwr_irqs[] = {
487 #if defined(BF533_FAMILY)
489 #elif defined(BF537_FAMILY)
490 IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
491 #elif defined(BF538_FAMILY)
493 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
494 IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
495 #elif defined(BF561_FAMILY)
496 IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
498 # error no SIC_IWR defined
502 /***********************************************************
504 * FUNCTIONS: Blackfin PM Setup API
507 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
515 * DESCRIPTION: Blackfin PM Driver API
518 *************************************************************
519 * MODIFICATION HISTORY :
520 **************************************************************/
521 int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
525 if (check_gpio(gpio) < 0)
528 local_irq_save_hw(flags);
530 reserve(wakeup, gpio);
532 unreserve(wakeup, gpio);
534 set_gpio_maskb(gpio, ctrl);
535 local_irq_restore_hw(flags);
540 int bfin_pm_standby_ctrl(unsigned ctrl)
544 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
545 mask = map_entry(wakeup, i);
549 bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
554 void bfin_gpio_pm_hibernate_suspend(void)
558 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
561 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
562 gpio_bank_saved[bank].fer = *port_fer[bank];
563 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
564 gpio_bank_saved[bank].mux = *port_mux[bank];
567 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
570 gpio_bank_saved[bank].data = gpio_array[bank]->data;
571 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
572 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
573 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
574 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
575 gpio_bank_saved[bank].both = gpio_array[bank]->both;
576 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
579 AWA_DUMMY_READ(maska);
582 void bfin_gpio_pm_hibernate_restore(void)
586 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
589 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
590 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
591 *port_mux[bank] = gpio_bank_saved[bank].mux;
594 bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
596 *port_fer[bank] = gpio_bank_saved[bank].fer;
598 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
599 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
600 & gpio_bank_saved[bank].dir;
601 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
602 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
603 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
604 gpio_array[bank]->both = gpio_bank_saved[bank].both;
605 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
607 AWA_DUMMY_READ(maska);
612 #else /* CONFIG_BF54x */
615 int bfin_pm_standby_ctrl(unsigned ctrl)
620 void bfin_gpio_pm_hibernate_suspend(void)
624 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
627 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
628 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
629 gpio_bank_saved[bank].data = gpio_array[bank]->data;
630 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
631 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
635 void bfin_gpio_pm_hibernate_restore(void)
639 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
642 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
643 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
644 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
645 gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
646 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
647 | gpio_bank_saved[bank].dir;
652 unsigned short get_gpio_dir(unsigned gpio)
654 return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
656 EXPORT_SYMBOL(get_gpio_dir);
658 #endif /* CONFIG_BF54x */
660 /***********************************************************
662 * FUNCTIONS: Blackfin Peripheral Resource Allocation
666 * per Peripheral Identifier
669 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
672 *************************************************************
673 * MODIFICATION HISTORY :
674 **************************************************************/
676 int peripheral_request(unsigned short per, const char *label)
679 unsigned short ident = P_IDENT(per);
682 * Don't cares are pins with only one dedicated function
685 if (per & P_DONTCARE)
688 if (!(per & P_DEFINED))
691 BUG_ON(ident >= MAX_RESOURCES);
693 local_irq_save_hw(flags);
695 /* If a pin can be muxed as either GPIO or peripheral, make
696 * sure it is not already a GPIO pin when we request it.
698 if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
699 if (system_state == SYSTEM_BOOTING)
702 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
703 __func__, ident, get_label(ident));
704 local_irq_restore_hw(flags);
708 if (unlikely(is_reserved(peri, ident, 1))) {
711 * Pin functions like AMC address strobes my
712 * be requested and used by several drivers
716 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
718 if (!(per & P_MAYSHARE)) {
721 * Allow that the identical pin function can
722 * be requested from the same driver twice
725 if (cmp_label(ident, label) == 0)
728 if (system_state == SYSTEM_BOOTING)
731 "%s: Peripheral %d function %d is already reserved by %s !\n",
732 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
733 local_irq_restore_hw(flags);
739 reserve(peri, ident);
742 port_setup(ident, PERIPHERAL_USAGE);
744 local_irq_restore_hw(flags);
745 set_label(ident, label);
749 EXPORT_SYMBOL(peripheral_request);
751 int peripheral_request_list(const unsigned short per[], const char *label)
756 for (cnt = 0; per[cnt] != 0; cnt++) {
758 ret = peripheral_request(per[cnt], label);
761 for ( ; cnt > 0; cnt--)
762 peripheral_free(per[cnt - 1]);
770 EXPORT_SYMBOL(peripheral_request_list);
772 void peripheral_free(unsigned short per)
775 unsigned short ident = P_IDENT(per);
777 if (per & P_DONTCARE)
780 if (!(per & P_DEFINED))
783 local_irq_save_hw(flags);
785 if (unlikely(!is_reserved(peri, ident, 0))) {
786 local_irq_restore_hw(flags);
790 if (!(per & P_MAYSHARE))
791 port_setup(ident, GPIO_USAGE);
793 unreserve(peri, ident);
795 set_label(ident, "free");
797 local_irq_restore_hw(flags);
799 EXPORT_SYMBOL(peripheral_free);
801 void peripheral_free_list(const unsigned short per[])
804 for (cnt = 0; per[cnt] != 0; cnt++)
805 peripheral_free(per[cnt]);
807 EXPORT_SYMBOL(peripheral_free_list);
809 /***********************************************************
811 * FUNCTIONS: Blackfin GPIO Driver
814 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
817 * DESCRIPTION: Blackfin GPIO Driver API
820 *************************************************************
821 * MODIFICATION HISTORY :
822 **************************************************************/
824 int bfin_gpio_request(unsigned gpio, const char *label)
828 if (check_gpio(gpio) < 0)
831 local_irq_save_hw(flags);
834 * Allow that the identical GPIO can
835 * be requested from the same driver twice
836 * Do nothing and return -
839 if (cmp_label(gpio, label) == 0) {
840 local_irq_restore_hw(flags);
844 if (unlikely(is_reserved(gpio, gpio, 1))) {
845 if (system_state == SYSTEM_BOOTING)
847 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
848 gpio, get_label(gpio));
849 local_irq_restore_hw(flags);
852 if (unlikely(is_reserved(peri, gpio, 1))) {
853 if (system_state == SYSTEM_BOOTING)
856 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
857 gpio, get_label(gpio));
858 local_irq_restore_hw(flags);
861 if (unlikely(is_reserved(gpio_irq, gpio, 1))) {
862 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
863 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
866 else { /* Reset POLAR setting when acquiring a gpio for the first time */
867 set_gpio_polar(gpio, 0);
872 set_label(gpio, label);
874 local_irq_restore_hw(flags);
876 port_setup(gpio, GPIO_USAGE);
880 EXPORT_SYMBOL(bfin_gpio_request);
882 void bfin_gpio_free(unsigned gpio)
886 if (check_gpio(gpio) < 0)
891 local_irq_save_hw(flags);
893 if (unlikely(!is_reserved(gpio, gpio, 0))) {
894 if (system_state == SYSTEM_BOOTING)
897 local_irq_restore_hw(flags);
901 unreserve(gpio, gpio);
903 set_label(gpio, "free");
905 local_irq_restore_hw(flags);
907 EXPORT_SYMBOL(bfin_gpio_free);
909 #ifdef BFIN_SPECIAL_GPIO_BANKS
910 DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
912 int bfin_special_gpio_request(unsigned gpio, const char *label)
916 local_irq_save_hw(flags);
919 * Allow that the identical GPIO can
920 * be requested from the same driver twice
921 * Do nothing and return -
924 if (cmp_label(gpio, label) == 0) {
925 local_irq_restore_hw(flags);
929 if (unlikely(is_reserved(special_gpio, gpio, 1))) {
930 local_irq_restore_hw(flags);
931 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
932 gpio, get_label(gpio));
936 if (unlikely(is_reserved(peri, gpio, 1))) {
937 local_irq_restore_hw(flags);
939 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
940 gpio, get_label(gpio));
945 reserve(special_gpio, gpio);
948 set_label(gpio, label);
949 local_irq_restore_hw(flags);
950 port_setup(gpio, GPIO_USAGE);
954 EXPORT_SYMBOL(bfin_special_gpio_request);
956 void bfin_special_gpio_free(unsigned gpio)
962 local_irq_save_hw(flags);
964 if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
966 local_irq_restore_hw(flags);
970 unreserve(special_gpio, gpio);
971 unreserve(peri, gpio);
972 set_label(gpio, "free");
973 local_irq_restore_hw(flags);
975 EXPORT_SYMBOL(bfin_special_gpio_free);
979 int bfin_gpio_irq_request(unsigned gpio, const char *label)
983 if (check_gpio(gpio) < 0)
986 local_irq_save_hw(flags);
988 if (unlikely(is_reserved(peri, gpio, 1))) {
989 if (system_state == SYSTEM_BOOTING)
992 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
993 gpio, get_label(gpio));
994 local_irq_restore_hw(flags);
997 if (unlikely(is_reserved(gpio, gpio, 1)))
998 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
999 "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
1000 gpio, get_label(gpio));
1002 reserve(gpio_irq, gpio);
1003 set_label(gpio, label);
1005 local_irq_restore_hw(flags);
1007 port_setup(gpio, GPIO_USAGE);
1012 void bfin_gpio_irq_free(unsigned gpio)
1014 unsigned long flags;
1016 if (check_gpio(gpio) < 0)
1019 local_irq_save_hw(flags);
1021 if (unlikely(!is_reserved(gpio_irq, gpio, 0))) {
1022 if (system_state == SYSTEM_BOOTING)
1025 local_irq_restore_hw(flags);
1029 unreserve(gpio_irq, gpio);
1031 set_label(gpio, "free");
1033 local_irq_restore_hw(flags);
1036 static inline void __bfin_gpio_direction_input(unsigned gpio)
1039 gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1041 gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1043 gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1046 int bfin_gpio_direction_input(unsigned gpio)
1048 unsigned long flags;
1050 if (unlikely(!is_reserved(gpio, gpio, 0))) {
1055 local_irq_save_hw(flags);
1056 __bfin_gpio_direction_input(gpio);
1057 AWA_DUMMY_READ(inen);
1058 local_irq_restore_hw(flags);
1062 EXPORT_SYMBOL(bfin_gpio_direction_input);
1064 void bfin_gpio_irq_prepare(unsigned gpio)
1067 unsigned long flags;
1070 port_setup(gpio, GPIO_USAGE);
1073 local_irq_save_hw(flags);
1074 __bfin_gpio_direction_input(gpio);
1075 local_irq_restore_hw(flags);
1079 void bfin_gpio_set_value(unsigned gpio, int arg)
1082 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1084 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1086 EXPORT_SYMBOL(bfin_gpio_set_value);
1088 int bfin_gpio_direction_output(unsigned gpio, int value)
1090 unsigned long flags;
1092 if (unlikely(!is_reserved(gpio, gpio, 0))) {
1097 local_irq_save_hw(flags);
1099 gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1100 gpio_set_value(gpio, value);
1102 gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1104 gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1107 AWA_DUMMY_READ(dir);
1108 local_irq_restore_hw(flags);
1112 EXPORT_SYMBOL(bfin_gpio_direction_output);
1114 int bfin_gpio_get_value(unsigned gpio)
1117 return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1119 unsigned long flags;
1121 if (unlikely(get_gpio_edge(gpio))) {
1123 local_irq_save_hw(flags);
1124 set_gpio_edge(gpio, 0);
1125 ret = get_gpio_data(gpio);
1126 set_gpio_edge(gpio, 1);
1127 local_irq_restore_hw(flags);
1130 return get_gpio_data(gpio);
1133 EXPORT_SYMBOL(bfin_gpio_get_value);
1135 /* If we are booting from SPI and our board lacks a strong enough pull up,
1136 * the core can reset and execute the bootrom faster than the resistor can
1137 * pull the signal logically high. To work around this (common) error in
1138 * board design, we explicitly set the pin back to GPIO mode, force /CS
1139 * high, and wait for the electrons to do their thing.
1141 * This function only makes sense to be called from reset code, but it
1142 * lives here as we need to force all the GPIO states w/out going through
1143 * BUG() checks and such.
1145 void bfin_reset_boot_spi_cs(unsigned short pin)
1147 unsigned short gpio = P_IDENT(pin);
1148 port_setup(gpio, GPIO_USAGE);
1149 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1150 AWA_DUMMY_READ(data_set);
1154 #if defined(CONFIG_PROC_FS)
1155 static int gpio_proc_read(char *buf, char **start, off_t offset,
1156 int len, int *unused_i, void *unused_v)
1158 int c, irq, gpio, outlen = 0;
1160 for (c = 0; c < MAX_RESOURCES; c++) {
1161 irq = is_reserved(gpio_irq, c, 1);
1162 gpio = is_reserved(gpio, c, 1);
1163 if (!check_gpio(c) && (gpio || irq))
1164 len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
1165 get_label(c), (gpio && irq) ? " *" : "",
1166 get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1167 else if (is_reserved(peri, c, 1))
1168 len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1177 static __init int gpio_register_proc(void)
1179 struct proc_dir_entry *proc_gpio;
1181 proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1183 proc_gpio->read_proc = gpio_proc_read;
1184 return proc_gpio != NULL;
1186 __initcall(gpio_register_proc);
1189 #ifdef CONFIG_GPIOLIB
1190 static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1192 return bfin_gpio_direction_input(gpio);
1195 static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1197 return bfin_gpio_direction_output(gpio, level);
1200 static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1202 return bfin_gpio_get_value(gpio);
1205 static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1207 return bfin_gpio_set_value(gpio, value);
1210 static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1212 return bfin_gpio_request(gpio, chip->label);
1215 static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1217 return bfin_gpio_free(gpio);
1220 static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
1222 return gpio + GPIO_IRQ_BASE;
1225 static struct gpio_chip bfin_chip = {
1226 .label = "BFIN-GPIO",
1227 .direction_input = bfin_gpiolib_direction_input,
1228 .get = bfin_gpiolib_get_value,
1229 .direction_output = bfin_gpiolib_direction_output,
1230 .set = bfin_gpiolib_set_value,
1231 .request = bfin_gpiolib_gpio_request,
1232 .free = bfin_gpiolib_gpio_free,
1233 .to_irq = bfin_gpiolib_gpio_to_irq,
1235 .ngpio = MAX_BLACKFIN_GPIOS,
1238 static int __init bfin_gpiolib_setup(void)
1240 return gpiochip_add(&bfin_chip);
1242 arch_initcall(bfin_gpiolib_setup);