2 * File: arch/blackfin/kernel/bfin_gpio.c
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
7 * Description: GPIO Abstraction Layer
10 * Copyright 2007 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
33 * GPIO_0 PF0 PF0 PF0 PA0...PJ13
43 * GPIO_10 PF10 PF10 PF10
44 * GPIO_11 PF11 PF11 PF11
45 * GPIO_12 PF12 PF12 PF12
46 * GPIO_13 PF13 PF13 PF13
47 * GPIO_14 PF14 PF14 PF14
48 * GPIO_15 PF15 PF15 PF15
83 #include <linux/delay.h>
84 #include <linux/module.h>
85 #include <linux/err.h>
86 #include <linux/proc_fs.h>
87 #include <asm/blackfin.h>
89 #include <asm/portmux.h>
90 #include <linux/irq.h>
92 #if ANOMALY_05000311 || ANOMALY_05000323
95 AWA_data_clear = SYSCR,
99 AWA_maska_clear = UART_SCR,
100 AWA_maska_set = UART_SCR,
101 AWA_maska_toggle = UART_SCR,
102 AWA_maskb = UART_GCTL,
103 AWA_maskb_clear = UART_GCTL,
104 AWA_maskb_set = UART_GCTL,
105 AWA_maskb_toggle = UART_GCTL,
106 AWA_dir = SPORT1_STAT,
107 AWA_polar = SPORT1_STAT,
108 AWA_edge = SPORT1_STAT,
109 AWA_both = SPORT1_STAT,
111 AWA_inen = TIMER_ENABLE,
112 #elif ANOMALY_05000323
113 AWA_inen = DMA1_1_CONFIG,
116 /* Anomaly Workaround */
117 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
119 #define AWA_DUMMY_READ(...) do { } while (0)
123 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
124 (struct gpio_port_t *) FIO_FLAG_D,
128 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
129 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
130 (struct gpio_port_t *) PORTFIO,
131 (struct gpio_port_t *) PORTGIO,
132 (struct gpio_port_t *) PORTHIO,
135 static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
136 (unsigned short *) PORTF_FER,
137 (unsigned short *) PORTG_FER,
138 (unsigned short *) PORTH_FER,
144 static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
145 (unsigned short *) PORTF_MUX,
146 (unsigned short *) PORTG_MUX,
147 (unsigned short *) PORTH_MUX,
151 u8 pmux_offset[][16] =
152 {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
153 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
154 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
159 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
160 (struct gpio_port_t *) FIO0_FLAG_D,
161 (struct gpio_port_t *) FIO1_FLAG_D,
162 (struct gpio_port_t *) FIO2_FLAG_D,
167 static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
168 (struct gpio_port_t *)PORTA_FER,
169 (struct gpio_port_t *)PORTB_FER,
170 (struct gpio_port_t *)PORTC_FER,
171 (struct gpio_port_t *)PORTD_FER,
172 (struct gpio_port_t *)PORTE_FER,
173 (struct gpio_port_t *)PORTF_FER,
174 (struct gpio_port_t *)PORTG_FER,
175 (struct gpio_port_t *)PORTH_FER,
176 (struct gpio_port_t *)PORTI_FER,
177 (struct gpio_port_t *)PORTJ_FER,
181 static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
182 static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
184 #define MAX_RESOURCES 256
185 #define RESOURCE_LABEL_SIZE 16
188 char name[RESOURCE_LABEL_SIZE];
193 static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
194 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
195 static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
198 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
202 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
206 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
210 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
213 #endif /* CONFIG_PM */
215 #if defined(BF548_FAMILY)
216 inline int check_gpio(unsigned short gpio)
218 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
219 || gpio == GPIO_PH14 || gpio == GPIO_PH15
220 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
221 || gpio > MAX_BLACKFIN_GPIOS)
226 inline int check_gpio(unsigned short gpio)
228 if (gpio >= MAX_BLACKFIN_GPIOS)
234 static void set_label(unsigned short ident, const char *label)
237 if (label && str_ident) {
238 strncpy(str_ident[ident].name, label,
239 RESOURCE_LABEL_SIZE);
240 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
244 static char *get_label(unsigned short ident)
249 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
252 static int cmp_label(unsigned short ident, const char *label)
254 if (label && str_ident)
255 return strncmp(str_ident[ident].name,
256 label, strlen(label));
261 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
262 static void port_setup(unsigned short gpio, unsigned short usage)
264 if (!check_gpio(gpio)) {
265 if (usage == GPIO_USAGE)
266 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
268 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
272 #elif defined(BF548_FAMILY)
273 static void port_setup(unsigned short gpio, unsigned short usage)
275 if (usage == GPIO_USAGE)
276 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
278 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
282 # define port_setup(...) do { } while (0)
288 unsigned short offset;
290 {.res = P_PPI0_D13, .offset = 11},
291 {.res = P_PPI0_D14, .offset = 11},
292 {.res = P_PPI0_D15, .offset = 11},
293 {.res = P_SPORT1_TFS, .offset = 11},
294 {.res = P_SPORT1_TSCLK, .offset = 11},
295 {.res = P_SPORT1_DTPRI, .offset = 11},
296 {.res = P_PPI0_D10, .offset = 10},
297 {.res = P_PPI0_D11, .offset = 10},
298 {.res = P_PPI0_D12, .offset = 10},
299 {.res = P_SPORT1_RSCLK, .offset = 10},
300 {.res = P_SPORT1_RFS, .offset = 10},
301 {.res = P_SPORT1_DRPRI, .offset = 10},
302 {.res = P_PPI0_D8, .offset = 9},
303 {.res = P_PPI0_D9, .offset = 9},
304 {.res = P_SPORT1_DRSEC, .offset = 9},
305 {.res = P_SPORT1_DTSEC, .offset = 9},
306 {.res = P_TMR2, .offset = 8},
307 {.res = P_PPI0_FS3, .offset = 8},
308 {.res = P_TMR3, .offset = 7},
309 {.res = P_SPI0_SSEL4, .offset = 7},
310 {.res = P_TMR4, .offset = 6},
311 {.res = P_SPI0_SSEL5, .offset = 6},
312 {.res = P_TMR5, .offset = 5},
313 {.res = P_SPI0_SSEL6, .offset = 5},
314 {.res = P_UART1_RX, .offset = 4},
315 {.res = P_UART1_TX, .offset = 4},
316 {.res = P_TMR6, .offset = 4},
317 {.res = P_TMR7, .offset = 4},
318 {.res = P_UART0_RX, .offset = 3},
319 {.res = P_UART0_TX, .offset = 3},
320 {.res = P_DMAR0, .offset = 3},
321 {.res = P_DMAR1, .offset = 3},
322 {.res = P_SPORT0_DTSEC, .offset = 1},
323 {.res = P_SPORT0_DRSEC, .offset = 1},
324 {.res = P_CAN0_RX, .offset = 1},
325 {.res = P_CAN0_TX, .offset = 1},
326 {.res = P_SPI0_SSEL7, .offset = 1},
327 {.res = P_SPORT0_TFS, .offset = 0},
328 {.res = P_SPORT0_DTPRI, .offset = 0},
329 {.res = P_SPI0_SSEL2, .offset = 0},
330 {.res = P_SPI0_SSEL3, .offset = 0},
333 static void portmux_setup(unsigned short per, unsigned short function)
335 u16 y, offset, muxreg;
337 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
338 if (port_mux_lut[y].res == per) {
340 /* SET PORTMUX REG */
342 offset = port_mux_lut[y].offset;
343 muxreg = bfin_read_PORT_MUX();
346 muxreg &= ~(1 << offset);
351 muxreg |= (function << offset);
352 bfin_write_PORT_MUX(muxreg);
356 #elif defined(BF548_FAMILY)
357 inline void portmux_setup(unsigned short portno, unsigned short function)
361 pmux = gpio_array[gpio_bank(portno)]->port_mux;
363 pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
364 pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
366 gpio_array[gpio_bank(portno)]->port_mux = pmux;
369 inline u16 get_portmux(unsigned short portno)
373 pmux = gpio_array[gpio_bank(portno)]->port_mux;
375 return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
377 #elif defined(BF527_FAMILY)
378 inline void portmux_setup(unsigned short portno, unsigned short function)
380 u16 pmux, ident = P_IDENT(portno);
381 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
383 pmux = *port_mux[gpio_bank(ident)];
384 pmux &= ~(3 << offset);
385 pmux |= (function & 3) << offset;
386 *port_mux[gpio_bank(ident)] = pmux;
390 # define portmux_setup(...) do { } while (0)
394 static void default_gpio(unsigned short gpio)
396 unsigned short bank, bitmask;
399 bank = gpio_bank(gpio);
400 bitmask = gpio_bit(gpio);
402 local_irq_save(flags);
404 gpio_bankb[bank]->maska_clear = bitmask;
405 gpio_bankb[bank]->maskb_clear = bitmask;
407 gpio_bankb[bank]->inen &= ~bitmask;
408 gpio_bankb[bank]->dir &= ~bitmask;
409 gpio_bankb[bank]->polar &= ~bitmask;
410 gpio_bankb[bank]->both &= ~bitmask;
411 gpio_bankb[bank]->edge &= ~bitmask;
412 AWA_DUMMY_READ(edge);
413 local_irq_restore(flags);
417 # define default_gpio(...) do { } while (0)
420 static int __init bfin_gpio_init(void)
422 str_ident = kcalloc(MAX_RESOURCES,
423 sizeof(struct str_ident), GFP_KERNEL);
424 if (str_ident == NULL)
427 memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident));
429 printk(KERN_INFO "Blackfin GPIO Controller\n");
434 arch_initcall(bfin_gpio_init);
438 /***********************************************************
440 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
443 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
446 * DESCRIPTION: These functions abstract direct register access
447 * to Blackfin processor General Purpose
450 * CAUTION: These functions do not belong to the GPIO Driver API
451 *************************************************************
452 * MODIFICATION HISTORY :
453 **************************************************************/
455 /* Set a specific bit */
457 #define SET_GPIO(name) \
458 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
460 unsigned long flags; \
461 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
462 local_irq_save(flags); \
464 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
466 gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
467 AWA_DUMMY_READ(name); \
468 local_irq_restore(flags); \
470 EXPORT_SYMBOL(set_gpio_ ## name);
479 #if ANOMALY_05000311 || ANOMALY_05000323
480 #define SET_GPIO_SC(name) \
481 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
483 unsigned long flags; \
484 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
485 local_irq_save(flags); \
487 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
489 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
490 AWA_DUMMY_READ(name); \
491 local_irq_restore(flags); \
493 EXPORT_SYMBOL(set_gpio_ ## name);
495 #define SET_GPIO_SC(name) \
496 void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
498 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
500 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
502 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
504 EXPORT_SYMBOL(set_gpio_ ## name);
511 #if ANOMALY_05000311 || ANOMALY_05000323
512 void set_gpio_toggle(unsigned short gpio)
515 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
516 local_irq_save(flags);
517 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
518 AWA_DUMMY_READ(toggle);
519 local_irq_restore(flags);
522 void set_gpio_toggle(unsigned short gpio)
524 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
525 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
528 EXPORT_SYMBOL(set_gpio_toggle);
531 /*Set current PORT date (16-bit word)*/
533 #if ANOMALY_05000311 || ANOMALY_05000323
534 #define SET_GPIO_P(name) \
535 void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
537 unsigned long flags; \
538 local_irq_save(flags); \
539 gpio_bankb[gpio_bank(gpio)]->name = arg; \
540 AWA_DUMMY_READ(name); \
541 local_irq_restore(flags); \
543 EXPORT_SYMBOL(set_gpiop_ ## name);
545 #define SET_GPIO_P(name) \
546 void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
548 gpio_bankb[gpio_bank(gpio)]->name = arg; \
550 EXPORT_SYMBOL(set_gpiop_ ## name);
563 /* Get a specific bit */
564 #if ANOMALY_05000311 || ANOMALY_05000323
565 #define GET_GPIO(name) \
566 unsigned short get_gpio_ ## name(unsigned short gpio) \
568 unsigned long flags; \
569 unsigned short ret; \
570 local_irq_save(flags); \
571 ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
572 AWA_DUMMY_READ(name); \
573 local_irq_restore(flags); \
576 EXPORT_SYMBOL(get_gpio_ ## name);
578 #define GET_GPIO(name) \
579 unsigned short get_gpio_ ## name(unsigned short gpio) \
581 return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
583 EXPORT_SYMBOL(get_gpio_ ## name);
595 /*Get current PORT date (16-bit word)*/
597 #if ANOMALY_05000311 || ANOMALY_05000323
598 #define GET_GPIO_P(name) \
599 unsigned short get_gpiop_ ## name(unsigned short gpio) \
601 unsigned long flags; \
602 unsigned short ret; \
603 local_irq_save(flags); \
604 ret = (gpio_bankb[gpio_bank(gpio)]->name); \
605 AWA_DUMMY_READ(name); \
606 local_irq_restore(flags); \
609 EXPORT_SYMBOL(get_gpiop_ ## name);
611 #define GET_GPIO_P(name) \
612 unsigned short get_gpiop_ ## name(unsigned short gpio) \
614 return (gpio_bankb[gpio_bank(gpio)]->name);\
616 EXPORT_SYMBOL(get_gpiop_ ## name);
630 /***********************************************************
632 * FUNCTIONS: Blackfin PM Setup API
635 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
643 * DESCRIPTION: Blackfin PM Driver API
646 *************************************************************
647 * MODIFICATION HISTORY :
648 **************************************************************/
649 int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
653 if ((check_gpio(gpio) < 0) || !type)
656 local_irq_save(flags);
658 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
659 wakeup_flags_map[gpio] = type;
660 local_irq_restore(flags);
664 EXPORT_SYMBOL(gpio_pm_wakeup_request);
666 void gpio_pm_wakeup_free(unsigned short gpio)
670 if (check_gpio(gpio) < 0)
673 local_irq_save(flags);
675 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
677 local_irq_restore(flags);
679 EXPORT_SYMBOL(gpio_pm_wakeup_free);
681 static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
683 port_setup(gpio, GPIO_USAGE);
684 set_gpio_dir(gpio, 0);
685 set_gpio_inen(gpio, 1);
687 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
688 set_gpio_edge(gpio, 1);
690 set_gpio_edge(gpio, 0);
692 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
693 set_gpio_both(gpio, 1);
695 set_gpio_both(gpio, 0);
697 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
698 set_gpio_polar(gpio, 1);
700 set_gpio_polar(gpio, 0);
707 u32 gpio_pm_setup(void)
710 u16 bank, mask, i, gpio;
712 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
713 mask = wakeup_map[gpio_bank(i)];
716 gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
717 gpio_bankb[bank]->maskb = 0;
721 gpio_bank_saved[bank].fer = *port_fer[bank];
723 gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
724 gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
725 gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
726 gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
727 gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
728 gpio_bank_saved[bank].reserved =
729 reserved_gpio_map[bank];
735 reserved_gpio_map[gpio_bank(gpio)] |=
737 bfin_gpio_wakeup_type(gpio,
738 wakeup_flags_map[gpio]);
739 set_gpio_data(gpio, 0); /*Clear*/
746 (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
747 gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
751 AWA_DUMMY_READ(maskb_set);
756 return IWR_ENABLE_ALL;
759 void gpio_pm_restore(void)
763 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
764 mask = wakeup_map[gpio_bank(i)];
769 *port_fer[bank] = gpio_bank_saved[bank].fer;
771 gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
772 gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
773 gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
774 gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
775 gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
777 reserved_gpio_map[bank] =
778 gpio_bank_saved[bank].reserved;
782 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
784 AWA_DUMMY_READ(maskb);
788 #endif /* BF548_FAMILY */
790 /***********************************************************
792 * FUNCTIONS: Blackfin Peripheral Resource Allocation
796 * per Peripheral Identifier
799 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
802 *************************************************************
803 * MODIFICATION HISTORY :
804 **************************************************************/
807 int peripheral_request(unsigned short per, const char *label)
810 unsigned short ident = P_IDENT(per);
813 * Don't cares are pins with only one dedicated function
816 if (per & P_DONTCARE)
819 if (!(per & P_DEFINED))
822 if (check_gpio(ident) < 0)
825 local_irq_save(flags);
827 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
829 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
830 __FUNCTION__, ident, get_label(ident));
832 local_irq_restore(flags);
836 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
838 u16 funct = get_portmux(ident);
841 * Pin functions like AMC address strobes my
842 * be requested and used by several drivers
845 if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
848 * Allow that the identical pin function can
849 * be requested from the same driver twice
852 if (cmp_label(ident, label) == 0)
856 "%s: Peripheral %d function %d is already reserved by %s !\n",
857 __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
859 local_irq_restore(flags);
865 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
867 portmux_setup(ident, P_FUNCT2MUX(per));
868 port_setup(ident, PERIPHERAL_USAGE);
870 local_irq_restore(flags);
871 set_label(ident, label);
875 EXPORT_SYMBOL(peripheral_request);
878 int peripheral_request(unsigned short per, const char *label)
881 unsigned short ident = P_IDENT(per);
884 * Don't cares are pins with only one dedicated function
887 if (per & P_DONTCARE)
890 if (!(per & P_DEFINED))
893 local_irq_save(flags);
895 if (!check_gpio(ident)) {
897 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
899 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
900 __FUNCTION__, ident, get_label(ident));
902 local_irq_restore(flags);
908 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
911 * Pin functions like AMC address strobes my
912 * be requested and used by several drivers
915 if (!(per & P_MAYSHARE)) {
918 * Allow that the identical pin function can
919 * be requested from the same driver twice
922 if (cmp_label(ident, label) == 0)
926 "%s: Peripheral %d function %d is already"
927 " reserved by %s !\n",
928 __FUNCTION__, ident, P_FUNCT2MUX(per),
931 local_irq_restore(flags);
938 portmux_setup(per, P_FUNCT2MUX(per));
940 port_setup(ident, PERIPHERAL_USAGE);
942 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
943 local_irq_restore(flags);
944 set_label(ident, label);
948 EXPORT_SYMBOL(peripheral_request);
951 int peripheral_request_list(unsigned short per[], const char *label)
956 for (cnt = 0; per[cnt] != 0; cnt++) {
958 ret = peripheral_request(per[cnt], label);
961 for ( ; cnt > 0; cnt--) {
962 peripheral_free(per[cnt - 1]);
970 EXPORT_SYMBOL(peripheral_request_list);
972 void peripheral_free(unsigned short per)
975 unsigned short ident = P_IDENT(per);
977 if (per & P_DONTCARE)
980 if (!(per & P_DEFINED))
983 if (check_gpio(ident) < 0)
986 local_irq_save(flags);
988 if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
989 & gpio_bit(ident)))) {
990 local_irq_restore(flags);
994 if (!(per & P_MAYSHARE)) {
995 port_setup(ident, GPIO_USAGE);
998 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
1000 set_label(ident, "free");
1002 local_irq_restore(flags);
1004 EXPORT_SYMBOL(peripheral_free);
1006 void peripheral_free_list(unsigned short per[])
1010 for (cnt = 0; per[cnt] != 0; cnt++) {
1011 peripheral_free(per[cnt]);
1015 EXPORT_SYMBOL(peripheral_free_list);
1017 /***********************************************************
1019 * FUNCTIONS: Blackfin GPIO Driver
1022 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
1025 * DESCRIPTION: Blackfin GPIO Driver API
1028 *************************************************************
1029 * MODIFICATION HISTORY :
1030 **************************************************************/
1032 int gpio_request(unsigned short gpio, const char *label)
1034 unsigned long flags;
1036 if (check_gpio(gpio) < 0)
1039 local_irq_save(flags);
1042 * Allow that the identical GPIO can
1043 * be requested from the same driver twice
1044 * Do nothing and return -
1047 if (cmp_label(gpio, label) == 0) {
1048 local_irq_restore(flags);
1052 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1053 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1054 gpio, get_label(gpio));
1056 local_irq_restore(flags);
1059 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1061 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1062 gpio, get_label(gpio));
1064 local_irq_restore(flags);
1068 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1070 local_irq_restore(flags);
1072 port_setup(gpio, GPIO_USAGE);
1073 set_label(gpio, label);
1077 EXPORT_SYMBOL(gpio_request);
1079 void gpio_free(unsigned short gpio)
1081 unsigned long flags;
1083 if (check_gpio(gpio) < 0)
1086 local_irq_save(flags);
1088 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1089 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
1091 local_irq_restore(flags);
1097 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1099 set_label(gpio, "free");
1101 local_irq_restore(flags);
1103 EXPORT_SYMBOL(gpio_free);
1106 void gpio_direction_input(unsigned short gpio)
1108 unsigned long flags;
1110 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1112 local_irq_save(flags);
1113 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1114 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1115 local_irq_restore(flags);
1117 EXPORT_SYMBOL(gpio_direction_input);
1119 void gpio_direction_output(unsigned short gpio)
1121 unsigned long flags;
1123 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1125 local_irq_save(flags);
1126 gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
1127 gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
1128 local_irq_restore(flags);
1130 EXPORT_SYMBOL(gpio_direction_output);
1132 void gpio_set_value(unsigned short gpio, unsigned short arg)
1135 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
1137 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
1140 EXPORT_SYMBOL(gpio_set_value);
1142 unsigned short gpio_get_value(unsigned short gpio)
1144 return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
1146 EXPORT_SYMBOL(gpio_get_value);
1150 void gpio_direction_input(unsigned short gpio)
1152 unsigned long flags;
1154 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1156 local_irq_save(flags);
1157 gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1158 gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1159 AWA_DUMMY_READ(inen);
1160 local_irq_restore(flags);
1162 EXPORT_SYMBOL(gpio_direction_input);
1164 void gpio_direction_output(unsigned short gpio)
1166 unsigned long flags;
1168 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1170 local_irq_save(flags);
1171 gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1172 gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1173 AWA_DUMMY_READ(dir);
1174 local_irq_restore(flags);
1176 EXPORT_SYMBOL(gpio_direction_output);
1178 /* If we are booting from SPI and our board lacks a strong enough pull up,
1179 * the core can reset and execute the bootrom faster than the resistor can
1180 * pull the signal logically high. To work around this (common) error in
1181 * board design, we explicitly set the pin back to GPIO mode, force /CS
1182 * high, and wait for the electrons to do their thing.
1184 * This function only makes sense to be called from reset code, but it
1185 * lives here as we need to force all the GPIO states w/out going through
1186 * BUG() checks and such.
1188 void bfin_gpio_reset_spi0_ssel1(void)
1190 u16 gpio = P_IDENT(P_SPI0_SSEL1);
1192 port_setup(gpio, GPIO_USAGE);
1193 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1197 #endif /*BF548_FAMILY */
1199 #if defined(CONFIG_PROC_FS)
1200 static int gpio_proc_read(char *buf, char **start, off_t offset,
1201 int len, int *unused_i, void *unused_v)
1205 for (c = 0; c < MAX_RESOURCES; c++) {
1206 if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
1207 len = sprintf(buf, "GPIO_%d: %s \tGPIO %s\n", c,
1208 get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1209 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1210 len = sprintf(buf, "GPIO_%d: %s \tPeripheral\n", c, get_label(c));
1219 static __init int gpio_register_proc(void)
1221 struct proc_dir_entry *proc_gpio;
1223 proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1225 proc_gpio->read_proc = gpio_proc_read;
1226 return proc_gpio != NULL;
1229 __initcall(gpio_register_proc);