2 * linux/arch/blackfin/kernel/ipipe.c
4 * Copyright (C) 2005-2007 Philippe Gerum.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
9 * USA; either version 2 of the License, or (at your option) any later
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 * Architecture-dependent I-pipe support for the Blackfin.
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
26 #include <linux/module.h>
27 #include <linux/interrupt.h>
28 #include <linux/percpu.h>
29 #include <linux/bitops.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/kthread.h>
33 #include <linux/unistd.h>
35 #include <asm/system.h>
36 #include <asm/atomic.h>
38 DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
40 asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
42 static void __ipipe_no_irqtail(void);
44 unsigned long __ipipe_irq_tail_hook = (unsigned long)&__ipipe_no_irqtail;
45 EXPORT_SYMBOL(__ipipe_irq_tail_hook);
47 unsigned long __ipipe_core_clock;
48 EXPORT_SYMBOL(__ipipe_core_clock);
50 unsigned long __ipipe_freq_scale;
51 EXPORT_SYMBOL(__ipipe_freq_scale);
53 atomic_t __ipipe_irq_lvdepth[IVG15 + 1];
55 unsigned long __ipipe_irq_lvmask = bfin_no_irqs;
56 EXPORT_SYMBOL(__ipipe_irq_lvmask);
58 static void __ipipe_ack_irq(unsigned irq, struct irq_desc *desc)
60 desc->ipipe_ack(irq, desc);
64 * __ipipe_enable_pipeline() -- We are running on the boot CPU, hw
65 * interrupts are off, and secondary CPUs are still lost in space.
67 void __ipipe_enable_pipeline(void)
71 __ipipe_core_clock = get_cclk(); /* Fetch this once. */
72 __ipipe_freq_scale = 1000000000UL / __ipipe_core_clock;
74 for (irq = 0; irq < NR_IRQS; ++irq)
75 ipipe_virtualize_irq(ipipe_root_domain,
77 (ipipe_irq_handler_t)&asm_do_IRQ,
80 IPIPE_HANDLE_MASK | IPIPE_PASS_MASK);
84 * __ipipe_handle_irq() -- IPIPE's generic IRQ handler. An optimistic
85 * interrupt protection log is maintained here for each domain. Hw
86 * interrupts are masked on entry.
88 void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
90 struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
91 struct ipipe_domain *this_domain, *next_domain;
92 struct list_head *head, *pos;
93 struct ipipe_irqdesc *idesc;
97 * Software-triggered IRQs do not need any ack. The contents
98 * of the register frame should only be used when processing
99 * the timer interrupt, but not for handling any other
102 m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
103 this_domain = __ipipe_current_domain;
104 idesc = &this_domain->irqs[irq];
106 if (unlikely(test_bit(IPIPE_STICKY_FLAG, &idesc->control)))
107 head = &this_domain->p_link;
109 head = __ipipe_pipeline.next;
110 next_domain = list_entry(head, struct ipipe_domain, p_link);
111 idesc = &next_domain->irqs[irq];
112 if (likely(test_bit(IPIPE_WIRED_FLAG, &idesc->control))) {
113 if (!m_ack && idesc->acknowledge != NULL)
114 idesc->acknowledge(irq, irq_to_desc(irq));
115 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
116 s = __test_and_set_bit(IPIPE_STALL_FLAG,
118 __ipipe_dispatch_wired(next_domain, irq);
123 /* Ack the interrupt. */
126 while (pos != &__ipipe_pipeline) {
127 next_domain = list_entry(pos, struct ipipe_domain, p_link);
128 idesc = &next_domain->irqs[irq];
129 if (test_bit(IPIPE_HANDLE_FLAG, &idesc->control)) {
130 __ipipe_set_irq_pending(next_domain, irq);
131 if (!m_ack && idesc->acknowledge != NULL) {
132 idesc->acknowledge(irq, irq_to_desc(irq));
136 if (!test_bit(IPIPE_PASS_FLAG, &idesc->control))
138 pos = next_domain->p_link.next;
142 * Now walk the pipeline, yielding control to the highest
143 * priority domain that has pending interrupt(s) or
144 * immediately to the current domain if the interrupt has been
145 * marked as 'sticky'. This search does not go beyond the
146 * current domain in the pipeline. We also enforce the
147 * additional root stage lock (blackfin-specific).
149 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
150 s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
153 * If the interrupt preempted the head domain, then do not
154 * even try to walk the pipeline, unless an interrupt is
157 if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) &&
158 ipipe_head_cpudom_var(irqpend_himask) == 0)
161 __ipipe_walk_pipeline(head);
164 __clear_bit(IPIPE_STALL_FLAG, &p->status);
167 void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
169 struct irq_desc *desc = irq_to_desc(irq);
170 int prio = __ipipe_get_irq_priority(irq);
173 if (ipd != &ipipe_root &&
174 atomic_inc_return(&__ipipe_irq_lvdepth[prio]) == 1)
175 __set_bit(prio, &__ipipe_irq_lvmask);
177 EXPORT_SYMBOL(__ipipe_enable_irqdesc);
179 void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
181 int prio = __ipipe_get_irq_priority(irq);
183 if (ipd != &ipipe_root &&
184 atomic_dec_and_test(&__ipipe_irq_lvdepth[prio]))
185 __clear_bit(prio, &__ipipe_irq_lvmask);
187 EXPORT_SYMBOL(__ipipe_disable_irqdesc);
189 int __ipipe_syscall_root(struct pt_regs *regs)
191 struct ipipe_percpu_domain_data *p;
196 * We need to run the IRQ tail hook whenever we don't
197 * propagate a syscall to higher domains, because we know that
198 * important operations might be pending there (e.g. Xenomai
199 * deferred rescheduling).
202 if (regs->orig_p0 < NR_syscalls) {
203 void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
205 if ((current->flags & PF_EVNOTIFY) == 0)
210 * This routine either returns:
211 * 0 -- if the syscall is to be passed to Linux;
212 * >0 -- if the syscall should not be passed to Linux, and no
213 * tail work should be performed;
214 * <0 -- if the syscall should not be passed to Linux but the
215 * tail work has to be performed (for handling signals etc).
218 if (!__ipipe_event_monitored_p(IPIPE_EVENT_SYSCALL))
221 ret = __ipipe_dispatch_event(IPIPE_EVENT_SYSCALL, regs);
223 local_irq_save_hw(flags);
225 if (!__ipipe_root_domain_p) {
226 local_irq_restore_hw(flags);
230 p = ipipe_root_cpudom_ptr();
231 if ((p->irqpend_himask & IPIPE_IRQMASK_VIRT) != 0)
232 __ipipe_sync_pipeline(IPIPE_IRQMASK_VIRT);
234 local_irq_restore_hw(flags);
239 unsigned long ipipe_critical_enter(void (*syncfn) (void))
243 local_irq_save_hw(flags);
248 void ipipe_critical_exit(unsigned long flags)
250 local_irq_restore_hw(flags);
253 static void __ipipe_no_irqtail(void)
257 int ipipe_get_sysinfo(struct ipipe_sysinfo *info)
259 info->ncpus = num_online_cpus();
260 info->cpufreq = ipipe_cpu_freq();
261 info->archdep.tmirq = IPIPE_TIMER_IRQ;
262 info->archdep.tmfreq = info->cpufreq;
268 * ipipe_trigger_irq() -- Push the interrupt at front of the pipeline
269 * just like if it has been actually received from a hw source. Also
270 * works for virtual interrupts.
272 int ipipe_trigger_irq(unsigned irq)
276 #ifdef CONFIG_IPIPE_DEBUG
277 if (irq >= IPIPE_NR_IRQS ||
278 (ipipe_virtual_irq_p(irq)
279 && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map)))
283 local_irq_save_hw(flags);
284 __ipipe_handle_irq(irq, NULL);
285 local_irq_restore_hw(flags);
290 asmlinkage void __ipipe_sync_root(void)
292 void (*irq_tail_hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
295 BUG_ON(irqs_disabled());
297 local_irq_save_hw(flags);
302 clear_thread_flag(TIF_IRQ_SYNC);
304 if (ipipe_root_cpudom_var(irqpend_himask) != 0)
305 __ipipe_sync_pipeline(IPIPE_IRQMASK_ANY);
307 local_irq_restore_hw(flags);
310 void ___ipipe_sync_pipeline(unsigned long syncmask)
312 if (__ipipe_root_domain_p &&
313 test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
316 __ipipe_sync_stage(syncmask);
319 void __ipipe_disable_root_irqs_hw(void)
322 * This code is called by the ins{bwl} routines (see
323 * arch/blackfin/lib/ins.S), which are heavily used by the
324 * network stack. It masks all interrupts but those handled by
325 * non-root domains, so that we keep decent network transfer
326 * rates for Linux without inducing pathological jitter for
327 * the real-time domain.
329 bfin_sti(__ipipe_irq_lvmask);
330 __set_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status));
333 void __ipipe_enable_root_irqs_hw(void)
335 __clear_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status));
336 bfin_sti(bfin_irq_flags);
340 * We could use standard atomic bitops in the following root status
341 * manipulation routines, but let's prepare for SMP support in the
342 * same move, preventing CPU migration as required.
344 void __ipipe_stall_root(void)
346 unsigned long *p, flags;
348 local_irq_save_hw(flags);
349 p = &__ipipe_root_status;
350 __set_bit(IPIPE_STALL_FLAG, p);
351 local_irq_restore_hw(flags);
353 EXPORT_SYMBOL(__ipipe_stall_root);
355 unsigned long __ipipe_test_and_stall_root(void)
357 unsigned long *p, flags;
360 local_irq_save_hw(flags);
361 p = &__ipipe_root_status;
362 x = __test_and_set_bit(IPIPE_STALL_FLAG, p);
363 local_irq_restore_hw(flags);
367 EXPORT_SYMBOL(__ipipe_test_and_stall_root);
369 unsigned long __ipipe_test_root(void)
371 const unsigned long *p;
375 local_irq_save_hw_smp(flags);
376 p = &__ipipe_root_status;
377 x = test_bit(IPIPE_STALL_FLAG, p);
378 local_irq_restore_hw_smp(flags);
382 EXPORT_SYMBOL(__ipipe_test_root);
384 void __ipipe_lock_root(void)
386 unsigned long *p, flags;
388 local_irq_save_hw(flags);
389 p = &__ipipe_root_status;
390 __set_bit(IPIPE_SYNCDEFER_FLAG, p);
391 local_irq_restore_hw(flags);
393 EXPORT_SYMBOL(__ipipe_lock_root);
395 void __ipipe_unlock_root(void)
397 unsigned long *p, flags;
399 local_irq_save_hw(flags);
400 p = &__ipipe_root_status;
401 __clear_bit(IPIPE_SYNCDEFER_FLAG, p);
402 local_irq_restore_hw(flags);
404 EXPORT_SYMBOL(__ipipe_unlock_root);