2 * Blackfin nmi_watchdog Driver
4 * Originally based on bfin_wdt.c
5 * Copyright 2010-2010 Analog Devices Inc.
6 * Graff Yang <graf.yang@analog.com>
8 * Enter bugs at http://blackfin.uclinux.org/
10 * Licensed under the GPL-2 or later.
13 #include <linux/bitops.h>
14 #include <linux/hardirq.h>
15 #include <linux/sysdev.h>
17 #include <linux/nmi.h>
18 #include <linux/smp.h>
19 #include <linux/timer.h>
20 #include <asm/blackfin.h>
21 #include <asm/atomic.h>
22 #include <asm/cacheflush.h>
23 #include <asm/bfin_watchdog.h>
25 #define DRV_NAME "nmi-wdt"
27 #define NMI_WDT_TIMEOUT 5 /* 5 seconds */
28 #define NMI_CHECK_TIMEOUT (4 * HZ) /* 4 seconds in jiffies */
29 static int nmi_wdt_cpu = 1;
31 static unsigned int timeout = NMI_WDT_TIMEOUT;
32 static int nmi_active;
34 static unsigned short wdoga_ctl;
35 static unsigned int wdoga_cnt;
36 static struct corelock_slot saved_corelock;
37 static atomic_t nmi_touched[NR_CPUS];
38 static struct timer_list ntimer;
47 static unsigned long nmi_event __attribute__ ((__section__(".l2.bss")));
49 /* we are in nmi, non-atomic bit ops is safe */
50 static inline void set_nmi_event(int event)
52 __set_bit(event, &nmi_event);
55 static inline void wait_nmi_event(int event)
57 while (!test_bit(event, &nmi_event))
59 __clear_bit(event, &nmi_event);
62 static inline void send_corea_nmi(void)
64 wdoga_ctl = bfin_read_WDOGA_CTL();
65 wdoga_cnt = bfin_read_WDOGA_CNT();
67 bfin_write_WDOGA_CTL(WDEN_DISABLE);
68 bfin_write_WDOGA_CNT(0);
69 bfin_write_WDOGA_CTL(WDEN_ENABLE | ICTL_NMI);
72 static inline void restore_corea_nmi(void)
74 bfin_write_WDOGA_CTL(WDEN_DISABLE);
75 bfin_write_WDOGA_CTL(WDOG_EXPIRED | WDEN_DISABLE | ICTL_NONE);
77 bfin_write_WDOGA_CNT(wdoga_cnt);
78 bfin_write_WDOGA_CTL(wdoga_ctl);
81 static inline void save_corelock(void)
83 saved_corelock = corelock;
87 static inline void restore_corelock(void)
89 corelock = saved_corelock;
93 static inline void nmi_wdt_keepalive(void)
95 bfin_write_WDOGB_STAT(0);
98 static inline void nmi_wdt_stop(void)
100 bfin_write_WDOGB_CTL(WDEN_DISABLE);
103 /* before calling this function, you must stop the WDT */
104 static inline void nmi_wdt_clear(void)
106 /* clear TRO bit, disable event generation */
107 bfin_write_WDOGB_CTL(WDOG_EXPIRED | WDEN_DISABLE | ICTL_NONE);
110 static inline void nmi_wdt_start(void)
112 bfin_write_WDOGB_CTL(WDEN_ENABLE | ICTL_NMI);
115 static inline int nmi_wdt_running(void)
117 return ((bfin_read_WDOGB_CTL() & WDEN_MASK) != WDEN_DISABLE);
120 static inline int nmi_wdt_set_timeout(unsigned long t)
122 u32 cnt, max_t, sclk;
129 pr_warning("NMI: timeout value is too large\n");
133 run = nmi_wdt_running();
135 bfin_write_WDOGB_CNT(cnt);
144 int check_nmi_wdt_touched(void)
146 unsigned int this_cpu = smp_processor_id();
149 cpumask_t mask = cpu_online_map;
151 if (!atomic_read(&nmi_touched[this_cpu]))
154 atomic_set(&nmi_touched[this_cpu], 0);
156 cpu_clear(this_cpu, mask);
157 for_each_cpu_mask(cpu, mask) {
158 invalidate_dcache_range((unsigned long)(&nmi_touched[cpu]),
159 (unsigned long)(&nmi_touched[cpu]));
160 if (!atomic_read(&nmi_touched[cpu]))
162 atomic_set(&nmi_touched[cpu], 0);
168 static void nmi_wdt_timer(unsigned long data)
170 if (check_nmi_wdt_touched())
173 mod_timer(&ntimer, jiffies + NMI_CHECK_TIMEOUT);
176 static int __init init_nmi_wdt(void)
178 nmi_wdt_set_timeout(timeout);
183 ntimer.function = nmi_wdt_timer;
184 ntimer.expires = jiffies + NMI_CHECK_TIMEOUT;
187 pr_info("nmi_wdt: initialized: timeout=%d sec\n", timeout);
190 device_initcall(init_nmi_wdt);
192 void touch_nmi_watchdog(void)
194 atomic_set(&nmi_touched[smp_processor_id()], 1);
197 /* Suspend/resume support */
199 static int nmi_wdt_suspend(struct sys_device *dev, pm_message_t state)
205 static int nmi_wdt_resume(struct sys_device *dev)
212 static struct sysdev_class nmi_sysclass = {
214 .resume = nmi_wdt_resume,
215 .suspend = nmi_wdt_suspend,
218 static struct sys_device device_nmi_wdt = {
220 .cls = &nmi_sysclass,
223 static int __init init_nmi_wdt_sysfs(void)
230 error = sysdev_class_register(&nmi_sysclass);
232 error = sysdev_register(&device_nmi_wdt);
235 late_initcall(init_nmi_wdt_sysfs);
237 #endif /* CONFIG_PM */
240 asmlinkage notrace void do_nmi(struct pt_regs *fp)
242 unsigned int cpu = smp_processor_id();
245 cpu_pda[cpu].__nmi_count += 1;
247 if (cpu == nmi_wdt_cpu) {
248 /* CoreB goes here first */
250 /* reload the WDOG_STAT */
253 /* clear nmi interrupt for CoreB */
257 /* trigger NMI interrupt of CoreA */
260 /* waiting CoreB to enter NMI */
261 wait_nmi_event(COREA_ENTER_NMI);
263 /* recover WDOGA's settings */
268 /* corelock is save/cleared, CoreA is dummping messages */
270 wait_nmi_event(COREA_EXIT_NMI);
272 /* OK, CoreA entered NMI */
273 set_nmi_event(COREA_ENTER_NMI);
276 pr_emerg("\nNMI Watchdog detected LOCKUP, dump for CPU %d\n", cpu);
277 dump_bfin_process(fp);
280 dump_bfin_trace_buffer();
281 show_stack(current, (unsigned long *)fp);
283 if (cpu == nmi_wdt_cpu) {
284 pr_emerg("This fault is not recoverable, sorry!\n");
286 /* CoreA dump finished, restore the corelock */
289 set_nmi_event(COREB_EXIT_NMI);
291 /* CoreB dump finished, notice the CoreA we are done */
292 set_nmi_event(COREA_EXIT_NMI);
294 /* synchronize with CoreA */
295 wait_nmi_event(COREB_EXIT_NMI);