2 * File: arch/blackfin/kernel/setup.c
10 * Copyright 2004-2006 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 #include <linux/delay.h>
31 #include <linux/console.h>
32 #include <linux/bootmem.h>
33 #include <linux/seq_file.h>
34 #include <linux/cpu.h>
35 #include <linux/module.h>
36 #include <linux/tty.h>
38 #include <linux/ext2_fs.h>
39 #include <linux/cramfs_fs.h>
40 #include <linux/romfs_fs.h>
42 #include <asm/cacheflush.h>
43 #include <asm/blackfin.h>
44 #include <asm/cplbinit.h>
46 unsigned long memory_start, memory_end, physical_mem_end;
47 unsigned long reserved_mem_dcache_on;
48 unsigned long reserved_mem_icache_on;
49 EXPORT_SYMBOL(memory_start);
50 EXPORT_SYMBOL(memory_end);
51 EXPORT_SYMBOL(physical_mem_end);
52 EXPORT_SYMBOL(_ramend);
54 #ifdef CONFIG_MTD_UCLINUX
55 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
57 EXPORT_SYMBOL(memory_mtd_end);
58 EXPORT_SYMBOL(memory_mtd_start);
59 EXPORT_SYMBOL(mtd_size);
62 char command_line[COMMAND_LINE_SIZE];
64 #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
65 static void generate_cpl_tables(void);
68 void __init bf53x_cache_init(void)
70 #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
71 generate_cpl_tables();
74 #ifdef CONFIG_BLKFIN_CACHE
76 printk(KERN_INFO "Instruction Cache Enabled\n");
79 #ifdef CONFIG_BLKFIN_DCACHE
81 printk(KERN_INFO "Data Cache Enabled"
82 # if defined CONFIG_BLKFIN_WB
84 # elif defined CONFIG_BLKFIN_WT
91 void bf53x_relocate_l1_mem(void)
93 unsigned long l1_code_length;
94 unsigned long l1_data_a_length;
95 unsigned long l1_data_b_length;
97 l1_code_length = _etext_l1 - _stext_l1;
98 if (l1_code_length > L1_CODE_LENGTH)
99 l1_code_length = L1_CODE_LENGTH;
100 /* cannot complain as printk is not available as yet.
101 * But we can continue booting and complain later!
104 /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
105 dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
107 l1_data_a_length = _ebss_l1 - _sdata_l1;
108 if (l1_data_a_length > L1_DATA_A_LENGTH)
109 l1_data_a_length = L1_DATA_A_LENGTH;
111 /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
112 dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
114 l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
115 if (l1_data_b_length > L1_DATA_B_LENGTH)
116 l1_data_b_length = L1_DATA_B_LENGTH;
118 /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
119 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
120 l1_data_a_length, l1_data_b_length);
125 * Initial parsing of the command line. Currently, we support:
126 * - Controlling the linux memory size: mem=xxx[KMG]
127 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
128 * $ -> reserved memory is dcacheable
129 * # -> reserved memory is icacheable
131 static __init void parse_cmdline_early(char *cmdline_p)
133 char c = ' ', *to = cmdline_p;
134 unsigned int memsize;
138 if (!memcmp(to, "mem=", 4)) {
140 memsize = memparse(to, &to);
144 } else if (!memcmp(to, "max_mem=", 8)) {
146 memsize = memparse(to, &to);
148 physical_mem_end = memsize;
152 reserved_mem_dcache_on =
156 reserved_mem_icache_on =
169 void __init setup_arch(char **cmdline_p)
172 unsigned long l1_length, sclk, cclk;
173 #ifdef CONFIG_MTD_UCLINUX
174 unsigned long mtd_phys = 0;
177 #ifdef CONFIG_DUMMY_CONSOLE
178 conswitchp = &dummy_con;
183 #if !defined(CONFIG_BFIN_KERNEL_CLOCK) && defined(ANOMALY_05000273)
185 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
188 #if defined(ANOMALY_05000266)
189 bfin_read_IMDMA_D0_IRQ_STATUS();
190 bfin_read_IMDMA_D1_IRQ_STATUS();
193 #ifdef DEBUG_SERIAL_EARLY_INIT
194 bfin_console_init(); /* early console registration */
195 /* this give a chance to get printk() working before crash. */
198 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
199 /* we need to initialize the Flashrom device here since we might
200 * do things with flash early on in the boot
205 #if defined(CONFIG_CMDLINE_BOOL)
206 memset(command_line, 0, sizeof(command_line));
207 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
208 command_line[sizeof(command_line) - 1] = 0;
211 /* Keep a copy of command line */
212 *cmdline_p = &command_line[0];
213 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
214 boot_command_line[COMMAND_LINE_SIZE - 1] = 0;
216 /* setup memory defaults from the user config */
217 physical_mem_end = 0;
218 _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
220 parse_cmdline_early(&command_line[0]);
222 if (physical_mem_end == 0)
223 physical_mem_end = _ramend;
225 /* by now the stack is part of the init task */
226 memory_end = _ramend - DMA_UNCACHED_REGION;
228 _ramstart = (unsigned long)__bss_stop;
229 memory_start = PAGE_ALIGN(_ramstart);
231 #if defined(CONFIG_MTD_UCLINUX)
232 /* generic memory mapped MTD driver */
233 memory_mtd_end = memory_end;
235 mtd_phys = _ramstart;
236 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
238 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
239 if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
241 PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
244 # if defined(CONFIG_CRAMFS)
245 if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
246 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
249 # if defined(CONFIG_ROMFS_FS)
250 if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
251 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
253 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
254 # if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
255 /* Due to a Hardware Anomaly we need to limit the size of usable
256 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
257 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
259 # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
260 if (memory_end >= 56 * 1024 * 1024)
261 memory_end = 56 * 1024 * 1024;
263 if (memory_end >= 60 * 1024 * 1024)
264 memory_end = 60 * 1024 * 1024;
265 # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
266 # endif /* ANOMALY_05000263 */
267 # endif /* CONFIG_ROMFS_FS */
269 memory_end -= mtd_size;
273 panic("Don't boot kernel without rootfs attached.\n");
276 /* Relocate MTD image to the top of memory after the uncached memory area */
277 dma_memcpy((char *)memory_end, __bss_stop, mtd_size);
279 memory_mtd_start = memory_end;
280 _ebss = memory_mtd_start; /* define _ebss for compatible */
281 #endif /* CONFIG_MTD_UCLINUX */
283 #if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
284 /* Due to a Hardware Anomaly we need to limit the size of usable
285 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
286 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
288 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
289 if (memory_end >= 56 * 1024 * 1024)
290 memory_end = 56 * 1024 * 1024;
292 if (memory_end >= 60 * 1024 * 1024)
293 memory_end = 60 * 1024 * 1024;
294 #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
295 printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
296 #endif /* ANOMALY_05000263 */
298 #if !defined(CONFIG_MTD_UCLINUX)
299 memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
301 init_mm.start_code = (unsigned long)_stext;
302 init_mm.end_code = (unsigned long)_etext;
303 init_mm.end_data = (unsigned long)_edata;
304 init_mm.brk = (unsigned long)0;
308 printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
309 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
310 if (bfin_revid() != bfin_compiled_revid())
311 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
312 bfin_compiled_revid(), bfin_revid());
313 if (bfin_revid() < SUPPORTED_REVID)
314 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
316 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
318 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu Mhz System Clock\n",
319 cclk / 1000000, sclk / 1000000);
321 #if defined(ANOMALY_05000273)
322 if ((cclk >> 1) <= sclk)
323 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
326 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
327 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
329 printk(KERN_INFO "Memory map:\n"
330 KERN_INFO " text = 0x%p-0x%p\n"
331 KERN_INFO " init = 0x%p-0x%p\n"
332 KERN_INFO " data = 0x%p-0x%p\n"
333 KERN_INFO " stack = 0x%p-0x%p\n"
334 KERN_INFO " bss = 0x%p-0x%p\n"
335 KERN_INFO " available = 0x%p-0x%p\n"
336 #ifdef CONFIG_MTD_UCLINUX
337 KERN_INFO " rootfs = 0x%p-0x%p\n"
339 #if DMA_UNCACHED_REGION > 0
340 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
343 __init_begin, __init_end,
345 (void*)&init_thread_union, (void*)((int)(&init_thread_union) + 0x2000),
346 __bss_start, __bss_stop,
347 (void*)_ramstart, (void*)memory_end
348 #ifdef CONFIG_MTD_UCLINUX
349 , (void*)memory_mtd_start, (void*)(memory_mtd_start + mtd_size)
351 #if DMA_UNCACHED_REGION > 0
352 , (void*)(_ramend - DMA_UNCACHED_REGION), (void*)(_ramend)
357 * give all the memory to the bootmap allocator, tell it to put the
358 * boot mem_map at the start of memory
360 bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */
361 PAGE_OFFSET >> PAGE_SHIFT,
362 memory_end >> PAGE_SHIFT);
364 * free the usable memory, we have to make sure we do not free
365 * the bootmem bitmap so we then reserve it after freeing it :-)
367 free_bootmem(memory_start, memory_end - memory_start);
369 reserve_bootmem(memory_start, bootmap_size);
371 * get kmalloc into gear
375 /* check the size of the l1 area */
376 l1_length = _etext_l1 - _stext_l1;
377 if (l1_length > L1_CODE_LENGTH)
378 panic("L1 memory overflow\n");
380 l1_length = _ebss_l1 - _sdata_l1;
381 if (l1_length > L1_DATA_A_LENGTH)
382 panic("L1 memory overflow\n");
386 printk(KERN_INFO "Hardware Trace Enabled\n");
387 bfin_write_TBUFCTL(0x03);
390 static int __init topology_init(void)
392 #if defined (CONFIG_BF561)
393 static struct cpu cpu[2];
394 register_cpu(&cpu[0], 0);
395 register_cpu(&cpu[1], 1);
398 static struct cpu cpu[1];
399 return register_cpu(cpu, 0);
403 subsys_initcall(topology_init);
405 #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
406 u16 lock_kernel_check(u32 start, u32 end)
408 if ((start <= (u32) _stext && end >= (u32) _end)
409 || (start >= (u32) _stext && end <= (u32) _end))
414 static unsigned short __init
415 fill_cplbtab(struct cplb_tab *table,
416 unsigned long start, unsigned long end,
417 unsigned long block_size, unsigned long cplb_data)
421 switch (block_size) {
437 cplb_data = (cplb_data & ~(3 << 16)) | (i << 16);
439 while ((start < end) && (table->pos < table->size)) {
441 table->tab[table->pos++] = start;
443 if (lock_kernel_check(start, start + block_size) == IN_KERNEL)
444 table->tab[table->pos++] =
445 cplb_data | CPLB_LOCK | CPLB_DIRTY;
447 table->tab[table->pos++] = cplb_data;
454 static unsigned short __init
455 close_cplbtab(struct cplb_tab *table)
458 while (table->pos < table->size) {
460 table->tab[table->pos++] = 0;
461 table->tab[table->pos++] = 0; /* !CPLB_VALID */
466 static void __init generate_cpl_tables(void)
470 u32 a_start, a_end, as, ae, as_1m;
472 struct cplb_tab *t_i = NULL;
473 struct cplb_tab *t_d = NULL;
476 cplb.init_i.size = MAX_CPLBS;
477 cplb.init_d.size = MAX_CPLBS;
478 cplb.switch_i.size = MAX_SWITCH_I_CPLBS;
479 cplb.switch_d.size = MAX_SWITCH_D_CPLBS;
483 cplb.switch_i.pos = 0;
484 cplb.switch_d.pos = 0;
486 cplb.init_i.tab = icplb_table;
487 cplb.init_d.tab = dcplb_table;
488 cplb.switch_i.tab = ipdt_table;
489 cplb.switch_d.tab = dpdt_table;
491 cplb_data[SDRAM_KERN].end = memory_end;
493 #ifdef CONFIG_MTD_UCLINUX
494 cplb_data[SDRAM_RAM_MTD].start = memory_mtd_start;
495 cplb_data[SDRAM_RAM_MTD].end = memory_mtd_start + mtd_size;
496 cplb_data[SDRAM_RAM_MTD].valid = mtd_size > 0;
497 # if defined(CONFIG_ROMFS_FS)
498 cplb_data[SDRAM_RAM_MTD].attr |= I_CPLB;
501 * The ROMFS_FS size is often not multiple of 1MB.
502 * This can cause multiple CPLB sets covering the same memory area.
503 * This will then cause multiple CPLB hit exceptions.
504 * Workaround: We ensure a contiguous memory area by extending the kernel
505 * memory section over the mtd section.
506 * For ROMFS_FS memory must be covered with ICPLBs anyways.
507 * So there is no difference between kernel and mtd memory setup.
510 cplb_data[SDRAM_KERN].end = memory_mtd_start + mtd_size;;
511 cplb_data[SDRAM_RAM_MTD].valid = 0;
515 cplb_data[SDRAM_RAM_MTD].valid = 0;
518 cplb_data[SDRAM_DMAZ].start = _ramend - DMA_UNCACHED_REGION;
519 cplb_data[SDRAM_DMAZ].end = _ramend;
521 cplb_data[RES_MEM].start = _ramend;
522 cplb_data[RES_MEM].end = physical_mem_end;
524 if (reserved_mem_dcache_on)
525 cplb_data[RES_MEM].d_conf = SDRAM_DGENERIC;
527 cplb_data[RES_MEM].d_conf = SDRAM_DNON_CHBL;
529 if (reserved_mem_icache_on)
530 cplb_data[RES_MEM].i_conf = SDRAM_IGENERIC;
532 cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL;
534 for (i = ZERO_P; i <= L2_MEM; i++) {
536 if (cplb_data[i].valid) {
538 as_1m = cplb_data[i].start % SIZE_1M;
540 /* We need to make sure all sections are properly 1M aligned
541 * However between Kernel Memory and the Kernel mtd section, depending on the
542 * rootfs size, there can be overlapping memory areas.
545 if (as_1m && i!=L1I_MEM && i!=L1D_MEM) {
546 #ifdef CONFIG_MTD_UCLINUX
547 if (i == SDRAM_RAM_MTD) {
548 if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start)
549 cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M;
551 cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M));
554 printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n",
555 cplb_data[i].name, cplb_data[i].start);
558 as = cplb_data[i].start % SIZE_4M;
559 ae = cplb_data[i].end % SIZE_4M;
562 a_start = cplb_data[i].start + (SIZE_4M - (as));
564 a_start = cplb_data[i].start;
566 a_end = cplb_data[i].end - ae;
568 for (j = INITIAL_T; j <= SWITCH_T; j++) {
572 if (cplb_data[i].attr & INITIAL_T) {
580 if (cplb_data[i].attr & SWITCH_T) {
581 t_i = &cplb.switch_i;
582 t_d = &cplb.switch_d;
593 if (cplb_data[i].attr & I_CPLB) {
595 if (cplb_data[i].psize) {
600 cplb_data[i].i_conf);
603 #if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
604 if (i == SDRAM_KERN) {
609 cplb_data[i].i_conf);
617 cplb_data[i].i_conf);
622 cplb_data[i].i_conf);
623 fill_cplbtab(t_i, a_end,
626 cplb_data[i].i_conf);
631 if (cplb_data[i].attr & D_CPLB) {
633 if (cplb_data[i].psize) {
638 cplb_data[i].d_conf);
644 cplb_data[i].d_conf);
645 fill_cplbtab(t_d, a_start,
647 cplb_data[i].d_conf);
648 fill_cplbtab(t_d, a_end,
651 cplb_data[i].d_conf);
664 close_cplbtab(&cplb.init_i);
665 close_cplbtab(&cplb.init_d);
667 cplb.init_i.tab[cplb.init_i.pos] = -1;
668 cplb.init_d.tab[cplb.init_d.pos] = -1;
669 cplb.switch_i.tab[cplb.switch_i.pos] = -1;
670 cplb.switch_d.tab[cplb.switch_d.pos] = -1;
676 static inline u_long get_vco(void)
681 msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
685 vco = CONFIG_CLKIN_HZ;
686 vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */
691 /*Get the Core clock*/
692 u_long get_cclk(void)
695 if (bfin_read_PLL_STAT() & 0x1)
696 return CONFIG_CLKIN_HZ;
698 ssel = bfin_read_PLL_DIV();
699 csel = ((ssel >> 4) & 0x03);
701 if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
702 return get_vco() / ssel;
703 return get_vco() >> csel;
706 EXPORT_SYMBOL(get_cclk);
708 /* Get the System clock */
709 u_long get_sclk(void)
713 if (bfin_read_PLL_STAT() & 0x1)
714 return CONFIG_CLKIN_HZ;
716 ssel = (bfin_read_PLL_DIV() & 0xf);
718 printk(KERN_WARNING "Invalid System Clock\n");
722 return get_vco() / ssel;
725 EXPORT_SYMBOL(get_sclk);
728 * Get CPU information for use by the procfs.
730 static int show_cpuinfo(struct seq_file *m, void *v)
732 char *cpu, *mmu, *fpu, *name;
735 u_long cclk = 0, sclk = 0;
736 u_int dcache_size = 0, dsup_banks = 0;
741 revid = bfin_revid();
742 name = bfin_board_name;
747 seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
750 "Core Clock:\t%9lu Hz\n"
751 "System Clock:\t%9lu Hz\n"
752 "BogoMips:\t%lu.%02lu\n"
753 "Calibration:\t%lu loops\n",
754 cpu, revid, mmu, fpu,
757 (loops_per_jiffy * HZ) / 500000,
758 ((loops_per_jiffy * HZ) / 5000) % 100,
759 (loops_per_jiffy * HZ));
760 seq_printf(m, "Board Name:\t%s\n", name);
761 seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20);
762 seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20);
763 if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC))
764 seq_printf(m, "I-CACHE:\tON\n");
766 seq_printf(m, "I-CACHE:\tOFF\n");
767 if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
768 seq_printf(m, "D-CACHE:\tON"
769 #if defined CONFIG_BLKFIN_WB
771 #elif defined CONFIG_BLKFIN_WT
776 seq_printf(m, "D-CACHE:\tOFF\n");
779 switch(bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
781 seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
786 seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
791 seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
800 seq_printf(m, "I-CACHE Size:\t%dKB\n", BLKFIN_ICACHESIZE / 1024);
801 seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
802 seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
803 BLKFIN_ISUBBANKS, BLKFIN_IWAYS, BLKFIN_ILINES);
805 "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
806 dsup_banks, BLKFIN_DSUBBANKS, BLKFIN_DWAYS,
808 #ifdef CONFIG_BLKFIN_CACHE_LOCK
809 switch (read_iloc()) {
811 seq_printf(m, "Way0 Locked-Down\n");
814 seq_printf(m, "Way1 Locked-Down\n");
817 seq_printf(m, "Way0,Way1 Locked-Down\n");
820 seq_printf(m, "Way2 Locked-Down\n");
823 seq_printf(m, "Way0,Way2 Locked-Down\n");
826 seq_printf(m, "Way1,Way2 Locked-Down\n");
829 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
832 seq_printf(m, "Way3 Locked-Down\n");
835 seq_printf(m, "Way0,Way3 Locked-Down\n");
838 seq_printf(m, "Way1,Way3 Locked-Down\n");
841 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
844 seq_printf(m, "Way3,Way2 Locked-Down\n");
847 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
850 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
853 seq_printf(m, "All Ways are locked\n");
856 seq_printf(m, "No Ways are locked\n");
862 static void *c_start(struct seq_file *m, loff_t *pos)
864 return *pos < NR_CPUS ? ((void *)0x12345678) : NULL;
867 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
870 return c_start(m, pos);
873 static void c_stop(struct seq_file *m, void *v)
877 struct seq_operations cpuinfo_op = {
881 .show = show_cpuinfo,
884 void cmdline_init(unsigned long r0)
887 strncpy(command_line, (char *)r0, COMMAND_LINE_SIZE);