2 * Copyright 2008 Analog Devices Inc.
4 * Licensed under the GPL-2 or later
10 #include <asm/blackfin.h>
11 #include <asm/irqflags.h>
13 /* Writing to PLL_CTL initiates a PLL relock sequence. */
14 static __inline__ void bfin_write_PLL_CTL(unsigned int val)
16 unsigned long flags, iwr0, iwr1;
18 if (val == bfin_read_PLL_CTL())
21 flags = hard_local_irq_save();
22 /* Enable the PLL Wakeup bit in SIC IWR */
23 iwr0 = bfin_read32(SIC_IWR0);
24 iwr1 = bfin_read32(SIC_IWR1);
25 /* Only allow PPL Wakeup) */
26 bfin_write32(SIC_IWR0, IWR_ENABLE(0));
27 bfin_write32(SIC_IWR1, 0);
29 bfin_write16(PLL_CTL, val);
33 bfin_write32(SIC_IWR0, iwr0);
34 bfin_write32(SIC_IWR1, iwr1);
35 hard_local_irq_restore(flags);
38 /* Writing to VR_CTL initiates a PLL relock sequence. */
39 static __inline__ void bfin_write_VR_CTL(unsigned int val)
41 unsigned long flags, iwr0, iwr1;
43 if (val == bfin_read_VR_CTL())
46 flags = hard_local_irq_save();
47 /* Enable the PLL Wakeup bit in SIC IWR */
48 iwr0 = bfin_read32(SIC_IWR0);
49 iwr1 = bfin_read32(SIC_IWR1);
50 /* Only allow PPL Wakeup) */
51 bfin_write32(SIC_IWR0, IWR_ENABLE(0));
52 bfin_write32(SIC_IWR1, 0);
54 bfin_write16(VR_CTL, val);
58 bfin_write32(SIC_IWR0, iwr0);
59 bfin_write32(SIC_IWR1, iwr1);
60 hard_local_irq_restore(flags);
63 #endif /* _MACH_PLL_H */