2 * Copyright 2005-2008 Analog Devices Inc.
4 * Licensed under the GPL-2 or later
10 #include <asm/blackfin.h>
11 #include <asm/irqflags.h>
13 /* Writing to PLL_CTL initiates a PLL relock sequence. */
14 static __inline__ void bfin_write_PLL_CTL(unsigned int val)
16 unsigned long flags, iwr;
18 if (val == bfin_read_PLL_CTL())
21 flags = hard_local_irq_save();
22 /* Enable the PLL Wakeup bit in SIC IWR */
23 iwr = bfin_read32(SIC_IWR);
24 /* Only allow PPL Wakeup) */
25 bfin_write32(SIC_IWR, IWR_ENABLE(0));
27 bfin_write16(PLL_CTL, val);
31 bfin_write32(SIC_IWR, iwr);
32 hard_local_irq_restore(flags);
35 /* Writing to VR_CTL initiates a PLL relock sequence. */
36 static __inline__ void bfin_write_VR_CTL(unsigned int val)
38 unsigned long flags, iwr;
40 if (val == bfin_read_VR_CTL())
43 flags = hard_local_irq_save();
44 /* Enable the PLL Wakeup bit in SIC IWR */
45 iwr = bfin_read32(SIC_IWR);
46 /* Only allow PPL Wakeup) */
47 bfin_write32(SIC_IWR, IWR_ENABLE(0));
49 bfin_write16(VR_CTL, val);
53 bfin_write32(SIC_IWR, iwr);
54 hard_local_irq_restore(flags);
57 #endif /* _MACH_PLL_H */