2 * IPI management based on arch/arm/kernel/smp.c (Copyright 2002 ARM Limited)
4 * Copyright 2007-2009 Analog Devices Inc.
5 * Philippe Gerum <rpm@xenomai.org>
7 * Licensed under the GPL-2.
10 #include <linux/module.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched.h>
15 #include <linux/interrupt.h>
16 #include <linux/cache.h>
17 #include <linux/profile.h>
18 #include <linux/errno.h>
20 #include <linux/cpu.h>
21 #include <linux/smp.h>
22 #include <linux/seq_file.h>
23 #include <linux/irq.h>
24 #include <asm/atomic.h>
25 #include <asm/cacheflush.h>
26 #include <asm/mmu_context.h>
27 #include <asm/pgtable.h>
28 #include <asm/pgalloc.h>
29 #include <asm/processor.h>
30 #include <asm/ptrace.h>
33 #include <linux/err.h>
37 * 05000120 - we always define corelock as 32-bit integer in L2
39 struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
41 void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
42 *init_saved_seqstat_coreb, *init_saved_icplb_fault_addr_coreb,
43 *init_saved_dcplb_fault_addr_coreb;
45 cpumask_t cpu_possible_map;
46 EXPORT_SYMBOL(cpu_possible_map);
48 cpumask_t cpu_online_map;
49 EXPORT_SYMBOL(cpu_online_map);
51 #define BFIN_IPI_RESCHEDULE 0
52 #define BFIN_IPI_CALL_FUNC 1
53 #define BFIN_IPI_CPU_STOP 2
55 struct blackfin_flush_data {
60 void *secondary_stack;
63 struct smp_call_struct {
64 void (*func)(void *info);
71 static struct blackfin_flush_data smp_flush_data;
73 static DEFINE_SPINLOCK(stop_lock);
76 struct list_head list;
78 struct smp_call_struct call_struct;
81 struct ipi_message_queue {
82 struct list_head head;
87 static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue);
89 static void ipi_cpu_stop(unsigned int cpu)
91 spin_lock(&stop_lock);
92 printk(KERN_CRIT "CPU%u: stopping\n", cpu);
94 spin_unlock(&stop_lock);
96 cpu_clear(cpu, cpu_online_map);
104 static void ipi_flush_icache(void *info)
106 struct blackfin_flush_data *fdata = info;
108 /* Invalidate the memory holding the bounds of the flushed region. */
109 blackfin_dcache_invalidate_range((unsigned long)fdata,
110 (unsigned long)fdata + sizeof(*fdata));
112 blackfin_icache_flush_range(fdata->start, fdata->end);
115 static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
118 void (*func)(void *info);
120 func = msg->call_struct.func;
121 info = msg->call_struct.info;
122 wait = msg->call_struct.wait;
123 cpu_clear(cpu, msg->call_struct.pending);
126 cpu_clear(cpu, msg->call_struct.waitmask);
131 static irqreturn_t ipi_handler(int irq, void *dev_instance)
133 struct ipi_message *msg;
134 struct ipi_message_queue *msg_queue;
135 unsigned int cpu = smp_processor_id();
137 platform_clear_ipi(cpu);
139 msg_queue = &__get_cpu_var(ipi_msg_queue);
142 spin_lock(&msg_queue->lock);
143 while (!list_empty(&msg_queue->head)) {
144 msg = list_entry(msg_queue->head.next, typeof(*msg), list);
145 list_del(&msg->list);
147 case BFIN_IPI_RESCHEDULE:
148 /* That's the easiest one; leave it to
149 * return_from_int. */
152 case BFIN_IPI_CALL_FUNC:
153 spin_unlock(&msg_queue->lock);
154 ipi_call_function(cpu, msg);
155 spin_lock(&msg_queue->lock);
157 case BFIN_IPI_CPU_STOP:
158 spin_unlock(&msg_queue->lock);
160 spin_lock(&msg_queue->lock);
164 printk(KERN_CRIT "CPU%u: Unknown IPI message \
165 0x%lx\n", cpu, msg->type);
170 spin_unlock(&msg_queue->lock);
174 static void ipi_queue_init(void)
177 struct ipi_message_queue *msg_queue;
178 for_each_possible_cpu(cpu) {
179 msg_queue = &per_cpu(ipi_msg_queue, cpu);
180 INIT_LIST_HEAD(&msg_queue->head);
181 spin_lock_init(&msg_queue->lock);
182 msg_queue->count = 0;
186 int smp_call_function(void (*func)(void *info), void *info, int wait)
191 struct ipi_message_queue *msg_queue;
192 struct ipi_message *msg;
194 callmap = cpu_online_map;
195 cpu_clear(smp_processor_id(), callmap);
196 if (cpus_empty(callmap))
199 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
202 INIT_LIST_HEAD(&msg->list);
203 msg->call_struct.func = func;
204 msg->call_struct.info = info;
205 msg->call_struct.wait = wait;
206 msg->call_struct.pending = callmap;
207 msg->call_struct.waitmask = callmap;
208 msg->type = BFIN_IPI_CALL_FUNC;
210 for_each_cpu_mask(cpu, callmap) {
211 msg_queue = &per_cpu(ipi_msg_queue, cpu);
212 spin_lock_irqsave(&msg_queue->lock, flags);
213 list_add_tail(&msg->list, &msg_queue->head);
214 spin_unlock_irqrestore(&msg_queue->lock, flags);
215 platform_send_ipi_cpu(cpu);
218 while (!cpus_empty(msg->call_struct.waitmask))
219 blackfin_dcache_invalidate_range(
220 (unsigned long)(&msg->call_struct.waitmask),
221 (unsigned long)(&msg->call_struct.waitmask));
226 EXPORT_SYMBOL_GPL(smp_call_function);
228 int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
231 unsigned int cpu = cpuid;
234 struct ipi_message_queue *msg_queue;
235 struct ipi_message *msg;
237 if (cpu_is_offline(cpu))
240 cpu_set(cpu, callmap);
242 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
245 INIT_LIST_HEAD(&msg->list);
246 msg->call_struct.func = func;
247 msg->call_struct.info = info;
248 msg->call_struct.wait = wait;
249 msg->call_struct.pending = callmap;
250 msg->call_struct.waitmask = callmap;
251 msg->type = BFIN_IPI_CALL_FUNC;
253 msg_queue = &per_cpu(ipi_msg_queue, cpu);
254 spin_lock_irqsave(&msg_queue->lock, flags);
255 list_add_tail(&msg->list, &msg_queue->head);
256 spin_unlock_irqrestore(&msg_queue->lock, flags);
257 platform_send_ipi_cpu(cpu);
260 while (!cpus_empty(msg->call_struct.waitmask))
261 blackfin_dcache_invalidate_range(
262 (unsigned long)(&msg->call_struct.waitmask),
263 (unsigned long)(&msg->call_struct.waitmask));
268 EXPORT_SYMBOL_GPL(smp_call_function_single);
270 void smp_send_reschedule(int cpu)
273 struct ipi_message_queue *msg_queue;
274 struct ipi_message *msg;
276 if (cpu_is_offline(cpu))
279 msg = kzalloc(sizeof(*msg), GFP_ATOMIC);
282 INIT_LIST_HEAD(&msg->list);
283 msg->type = BFIN_IPI_RESCHEDULE;
285 msg_queue = &per_cpu(ipi_msg_queue, cpu);
286 spin_lock_irqsave(&msg_queue->lock, flags);
287 list_add_tail(&msg->list, &msg_queue->head);
288 spin_unlock_irqrestore(&msg_queue->lock, flags);
289 platform_send_ipi_cpu(cpu);
294 void smp_send_stop(void)
299 struct ipi_message_queue *msg_queue;
300 struct ipi_message *msg;
302 callmap = cpu_online_map;
303 cpu_clear(smp_processor_id(), callmap);
304 if (cpus_empty(callmap))
307 msg = kzalloc(sizeof(*msg), GFP_ATOMIC);
310 INIT_LIST_HEAD(&msg->list);
311 msg->type = BFIN_IPI_CPU_STOP;
313 for_each_cpu_mask(cpu, callmap) {
314 msg_queue = &per_cpu(ipi_msg_queue, cpu);
315 spin_lock_irqsave(&msg_queue->lock, flags);
316 list_add_tail(&msg->list, &msg_queue->head);
317 spin_unlock_irqrestore(&msg_queue->lock, flags);
318 platform_send_ipi_cpu(cpu);
323 int __cpuinit __cpu_up(unsigned int cpu)
325 struct task_struct *idle;
328 idle = fork_idle(cpu);
330 printk(KERN_ERR "CPU%u: fork() failed\n", cpu);
331 return PTR_ERR(idle);
334 secondary_stack = task_stack_page(idle) + THREAD_SIZE;
337 ret = platform_boot_secondary(cpu, idle);
339 secondary_stack = NULL;
344 static void __cpuinit setup_secondary(unsigned int cpu)
346 #if !defined(CONFIG_TICKSOURCE_GPTMR0)
347 struct irq_desc *timer_desc;
353 ilat = bfin_read_ILAT();
355 bfin_write_ILAT(ilat);
358 /* Enable interrupt levels IVG7-15. IARs have been already
359 * programmed by the boot CPU. */
360 bfin_irq_flags |= IMASK_IVG15 |
361 IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
362 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
364 #if defined(CONFIG_TICKSOURCE_GPTMR0)
365 /* Power down the core timer, just to play safe. */
368 /* system timer0 has been setup by CoreA. */
370 timer_desc = irq_desc + IRQ_CORETMR;
372 timer_desc->chip->enable(IRQ_CORETMR);
376 void __cpuinit secondary_start_kernel(void)
378 unsigned int cpu = smp_processor_id();
379 struct mm_struct *mm = &init_mm;
381 if (_bfin_swrst & SWRST_DBL_FAULT_B) {
382 printk(KERN_EMERG "CoreB Recovering from DOUBLE FAULT event\n");
383 #ifdef CONFIG_DEBUG_DOUBLEFAULT
384 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
385 (int)init_saved_seqstat_coreb & SEQSTAT_EXCAUSE, init_saved_retx_coreb);
386 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr_coreb);
387 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr_coreb);
389 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
394 * We want the D-cache to be enabled early, in case the atomic
395 * support code emulates cache coherence (see
396 * __ARCH_SYNC_CORE_DCACHE).
398 init_exception_vectors();
400 bfin_setup_caches(cpu);
404 /* Attach the new idle task to the global mm. */
405 atomic_inc(&mm->mm_users);
406 atomic_inc(&mm->mm_count);
407 current->active_mm = mm;
408 BUG_ON(current->mm); /* Can't be, but better be safe than sorry. */
412 setup_secondary(cpu);
414 platform_secondary_init(cpu);
419 * Calibrate loops per jiffy value.
420 * IRQs need to be enabled here - D-cache can be invalidated
421 * in timer irq handler, so core B can read correct jiffies.
428 void __init smp_prepare_boot_cpu(void)
432 void __init smp_prepare_cpus(unsigned int max_cpus)
434 platform_prepare_cpus(max_cpus);
436 platform_request_ipi(&ipi_handler);
439 void __init smp_cpus_done(unsigned int max_cpus)
441 unsigned long bogosum = 0;
444 for_each_online_cpu(cpu)
445 bogosum += loops_per_jiffy;
447 printk(KERN_INFO "SMP: Total of %d processors activated "
448 "(%lu.%02lu BogoMIPS).\n",
450 bogosum / (500000/HZ),
451 (bogosum / (5000/HZ)) % 100);
454 void smp_icache_flush_range_others(unsigned long start, unsigned long end)
456 smp_flush_data.start = start;
457 smp_flush_data.end = end;
459 if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
460 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
462 EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
464 #ifdef __ARCH_SYNC_CORE_ICACHE
465 void resync_core_icache(void)
467 unsigned int cpu = get_cpu();
468 blackfin_invalidate_entire_icache();
469 ++per_cpu(cpu_data, cpu).icache_invld_count;
472 EXPORT_SYMBOL(resync_core_icache);
475 #ifdef __ARCH_SYNC_CORE_DCACHE
476 unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
478 void resync_core_dcache(void)
480 unsigned int cpu = get_cpu();
481 blackfin_invalidate_entire_dcache();
482 ++per_cpu(cpu_data, cpu).dcache_invld_count;
485 EXPORT_SYMBOL(resync_core_dcache);